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1 /*
2 * BSD LICENSE
3 *
4 * Copyright (C) IBM Corporation 2014.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of IBM Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _RTE_CPUFLAGS_PPC_64_H_
34 #define _RTE_CPUFLAGS_PPC_64_H_
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /**
41 * Enumeration of all CPU features supported
42 */
43 enum rte_cpu_flag_t {
44 RTE_CPUFLAG_PPC_LE = 0,
45 RTE_CPUFLAG_TRUE_LE,
46 RTE_CPUFLAG_PSERIES_PERFMON_COMPAT,
47 RTE_CPUFLAG_VSX,
48 RTE_CPUFLAG_ARCH_2_06,
49 RTE_CPUFLAG_POWER6_EXT,
50 RTE_CPUFLAG_DFP,
51 RTE_CPUFLAG_PA6T,
52 RTE_CPUFLAG_ARCH_2_05,
53 RTE_CPUFLAG_ICACHE_SNOOP,
54 RTE_CPUFLAG_SMT,
55 RTE_CPUFLAG_BOOKE,
56 RTE_CPUFLAG_CELLBE,
57 RTE_CPUFLAG_POWER5_PLUS,
58 RTE_CPUFLAG_POWER5,
59 RTE_CPUFLAG_POWER4,
60 RTE_CPUFLAG_NOTB,
61 RTE_CPUFLAG_EFP_DOUBLE,
62 RTE_CPUFLAG_EFP_SINGLE,
63 RTE_CPUFLAG_SPE,
64 RTE_CPUFLAG_UNIFIED_CACHE,
65 RTE_CPUFLAG_4xxMAC,
66 RTE_CPUFLAG_MMU,
67 RTE_CPUFLAG_FPU,
68 RTE_CPUFLAG_ALTIVEC,
69 RTE_CPUFLAG_PPC601,
70 RTE_CPUFLAG_PPC64,
71 RTE_CPUFLAG_PPC32,
72 RTE_CPUFLAG_TAR,
73 RTE_CPUFLAG_LSEL,
74 RTE_CPUFLAG_EBB,
75 RTE_CPUFLAG_DSCR,
76 RTE_CPUFLAG_HTM,
77 RTE_CPUFLAG_ARCH_2_07,
78 /* The last item */
79 RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
80 };
81
82 #include "generic/rte_cpuflags.h"
83
84 #ifdef __cplusplus
85 }
86 #endif
87
88 #endif /* _RTE_CPUFLAGS_PPC_64_H_ */