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1 /*-
2 * BSD LICENSE
3 *
4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef _RTE_MEMORY_H_
35 #define _RTE_MEMORY_H_
36
37 /**
38 * @file
39 *
40 * Memory-related RTE API.
41 */
42
43 #include <stdint.h>
44 #include <stddef.h>
45 #include <stdio.h>
46
47 #include <rte_config.h>
48
49 #ifdef RTE_EXEC_ENV_LINUXAPP
50 #include <exec-env/rte_dom0_common.h>
51 #endif
52
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
56
57 #include <rte_common.h>
58
59 __extension__
60 enum rte_page_sizes {
61 RTE_PGSIZE_4K = 1ULL << 12,
62 RTE_PGSIZE_64K = 1ULL << 16,
63 RTE_PGSIZE_256K = 1ULL << 18,
64 RTE_PGSIZE_2M = 1ULL << 21,
65 RTE_PGSIZE_16M = 1ULL << 24,
66 RTE_PGSIZE_256M = 1ULL << 28,
67 RTE_PGSIZE_512M = 1ULL << 29,
68 RTE_PGSIZE_1G = 1ULL << 30,
69 RTE_PGSIZE_4G = 1ULL << 32,
70 RTE_PGSIZE_16G = 1ULL << 34,
71 };
72
73 #define SOCKET_ID_ANY -1 /**< Any NUMA socket. */
74 #define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
75
76 #define RTE_CACHE_LINE_ROUNDUP(size) \
77 (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
78 /**< Return the first cache-aligned value greater or equal to size. */
79
80 /**< Cache line size in terms of log2 */
81 #if RTE_CACHE_LINE_SIZE == 64
82 #define RTE_CACHE_LINE_SIZE_LOG2 6
83 #elif RTE_CACHE_LINE_SIZE == 128
84 #define RTE_CACHE_LINE_SIZE_LOG2 7
85 #else
86 #error "Unsupported cache line size"
87 #endif
88
89 #define RTE_CACHE_LINE_MIN_SIZE 64 /**< Minimum Cache line size. */
90
91 /**
92 * Force alignment to cache line.
93 */
94 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
95
96 /**
97 * Force minimum cache line alignment.
98 */
99 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
100
101 typedef uint64_t phys_addr_t; /**< Physical address definition. */
102 #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
103
104 /**
105 * Physical memory segment descriptor.
106 */
107 struct rte_memseg {
108 phys_addr_t phys_addr; /**< Start physical address. */
109 RTE_STD_C11
110 union {
111 void *addr; /**< Start virtual address. */
112 uint64_t addr_64; /**< Makes sure addr is always 64 bits */
113 };
114 size_t len; /**< Length of the segment. */
115 uint64_t hugepage_sz; /**< The pagesize of underlying memory */
116 int32_t socket_id; /**< NUMA socket ID. */
117 uint32_t nchannel; /**< Number of channels. */
118 uint32_t nrank; /**< Number of ranks. */
119 #ifdef RTE_LIBRTE_XEN_DOM0
120 /**< store segment MFNs */
121 uint64_t mfn[DOM0_NUM_MEMBLOCK];
122 #endif
123 } __rte_packed;
124
125 /**
126 * Lock page in physical memory and prevent from swapping.
127 *
128 * @param virt
129 * The virtual address.
130 * @return
131 * 0 on success, negative on error.
132 */
133 int rte_mem_lock_page(const void *virt);
134
135 /**
136 * Get physical address of any mapped virtual address in the current process.
137 * It is found by browsing the /proc/self/pagemap special file.
138 * The page must be locked.
139 *
140 * @param virt
141 * The virtual address.
142 * @return
143 * The physical address or RTE_BAD_PHYS_ADDR on error.
144 */
145 phys_addr_t rte_mem_virt2phy(const void *virt);
146
147 /**
148 * Get the layout of the available physical memory.
149 *
150 * It can be useful for an application to have the full physical
151 * memory layout to decide the size of a memory zone to reserve. This
152 * table is stored in rte_config (see rte_eal_get_configuration()).
153 *
154 * @return
155 * - On success, return a pointer to a read-only table of struct
156 * rte_physmem_desc elements, containing the layout of all
157 * addressable physical memory. The last element of the table
158 * contains a NULL address.
159 * - On error, return NULL. This should not happen since it is a fatal
160 * error that will probably cause the entire system to panic.
161 */
162 const struct rte_memseg *rte_eal_get_physmem_layout(void);
163
164 /**
165 * Dump the physical memory layout to a file.
166 *
167 * @param f
168 * A pointer to a file for output
169 */
170 void rte_dump_physmem_layout(FILE *f);
171
172 /**
173 * Get the total amount of available physical memory.
174 *
175 * @return
176 * The total amount of available physical memory in bytes.
177 */
178 uint64_t rte_eal_get_physmem_size(void);
179
180 /**
181 * Get the number of memory channels.
182 *
183 * @return
184 * The number of memory channels on the system. The value is 0 if unknown
185 * or not the same on all devices.
186 */
187 unsigned rte_memory_get_nchannel(void);
188
189 /**
190 * Get the number of memory ranks.
191 *
192 * @return
193 * The number of memory ranks on the system. The value is 0 if unknown or
194 * not the same on all devices.
195 */
196 unsigned rte_memory_get_nrank(void);
197
198 #ifdef RTE_LIBRTE_XEN_DOM0
199
200 /**< Internal use only - should DOM0 memory mapping be used */
201 int rte_xen_dom0_supported(void);
202
203 /**< Internal use only - phys to virt mapping for xen */
204 phys_addr_t rte_xen_mem_phy2mch(int32_t, const phys_addr_t);
205
206 /**
207 * Return the physical address of elt, which is an element of the pool mp.
208 *
209 * @param memseg_id
210 * Identifier of the memory segment owning the physical address. If
211 * set to -1, find it automatically.
212 * @param phy_addr
213 * physical address of elt.
214 *
215 * @return
216 * The physical address or RTE_BAD_PHYS_ADDR on error.
217 */
218 static inline phys_addr_t
219 rte_mem_phy2mch(int32_t memseg_id, const phys_addr_t phy_addr)
220 {
221 if (rte_xen_dom0_supported())
222 return rte_xen_mem_phy2mch(memseg_id, phy_addr);
223 else
224 return phy_addr;
225 }
226
227 /**
228 * Memory init for supporting application running on Xen domain0.
229 *
230 * @param void
231 *
232 * @return
233 * 0: successfully
234 * negative: error
235 */
236 int rte_xen_dom0_memory_init(void);
237
238 /**
239 * Attach to memory setments of primary process on Xen domain0.
240 *
241 * @param void
242 *
243 * @return
244 * 0: successfully
245 * negative: error
246 */
247 int rte_xen_dom0_memory_attach(void);
248 #else
249 static inline int rte_xen_dom0_supported(void)
250 {
251 return 0;
252 }
253
254 static inline phys_addr_t
255 rte_mem_phy2mch(int32_t memseg_id __rte_unused, const phys_addr_t phy_addr)
256 {
257 return phy_addr;
258 }
259 #endif
260
261 #ifdef __cplusplus
262 }
263 #endif
264
265 #endif /* _RTE_MEMORY_H_ */