ceph/src/dpdk/lib/librte_eal/linuxapp/kni/ethtool/igb/e1000_nvm.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "LICENSE.GPL".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include "e1000_api.h"
  29
  30 static void e1000_reload_nvm_generic(struct e1000_hw *hw);
  31
  32 /**
  33  *  e1000_init_nvm_ops_generic - Initialize NVM function pointers
  34  *  @hw: pointer to the HW structure
  35  *
  36  *  Setups up the function pointers to no-op functions
  37  **/
  38 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
  39 {
  40         struct e1000_nvm_info *nvm = &hw->nvm;
  41         DEBUGFUNC("e1000_init_nvm_ops_generic");
  42
  43         /* Initialize function pointers */
  44         nvm->ops.init_params = e1000_null_ops_generic;
  45         nvm->ops.acquire = e1000_null_ops_generic;
  46         nvm->ops.read = e1000_null_read_nvm;
  47         nvm->ops.release = e1000_null_nvm_generic;
  48         nvm->ops.reload = e1000_reload_nvm_generic;
  49         nvm->ops.update = e1000_null_ops_generic;
  50         nvm->ops.valid_led_default = e1000_null_led_default;
  51         nvm->ops.validate = e1000_null_ops_generic;
  52         nvm->ops.write = e1000_null_write_nvm;
  53 }
  54
  55 /**
  56  *  e1000_null_nvm_read - No-op function, return 0
  57  *  @hw: pointer to the HW structure
  58  **/
  59 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
  60                         u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
  61                         u16 E1000_UNUSEDARG *c)
  62 {
  63         DEBUGFUNC("e1000_null_read_nvm");
  64         return E1000_SUCCESS;
  65 }
  66
  67 /**
  68  *  e1000_null_nvm_generic - No-op function, return void
  69  *  @hw: pointer to the HW structure
  70  **/
  71 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
  72 {
  73         DEBUGFUNC("e1000_null_nvm_generic");
  74         return;
  75 }
  76
  77 /**
  78  *  e1000_null_led_default - No-op function, return 0
  79  *  @hw: pointer to the HW structure
  80  **/
  81 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
  82                            u16 E1000_UNUSEDARG *data)
  83 {
  84         DEBUGFUNC("e1000_null_led_default");
  85         return E1000_SUCCESS;
  86 }
  87
  88 /**
  89  *  e1000_null_write_nvm - No-op function, return 0
  90  *  @hw: pointer to the HW structure
  91  **/
  92 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
  93                          u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
  94                          u16 E1000_UNUSEDARG *c)
  95 {
  96         DEBUGFUNC("e1000_null_write_nvm");
  97         return E1000_SUCCESS;
  98 }
  99
 100 /**
 101  *  e1000_raise_eec_clk - Raise EEPROM clock
 102  *  @hw: pointer to the HW structure
 103  *  @eecd: pointer to the EEPROM
 104  *
 105  *  Enable/Raise the EEPROM clock bit.
 106  **/
 107 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
 108 {
 109         *eecd = *eecd | E1000_EECD_SK;
 110         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 111         E1000_WRITE_FLUSH(hw);
 112         usec_delay(hw->nvm.delay_usec);
 113 }
 114
 115 /**
 116  *  e1000_lower_eec_clk - Lower EEPROM clock
 117  *  @hw: pointer to the HW structure
 118  *  @eecd: pointer to the EEPROM
 119  *
 120  *  Clear/Lower the EEPROM clock bit.
 121  **/
 122 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
 123 {
 124         *eecd = *eecd & ~E1000_EECD_SK;
 125         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 126         E1000_WRITE_FLUSH(hw);
 127         usec_delay(hw->nvm.delay_usec);
 128 }
 129
 130 /**
 131  *  e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
 132  *  @hw: pointer to the HW structure
 133  *  @data: data to send to the EEPROM
 134  *  @count: number of bits to shift out
 135  *
 136  *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
 137  *  "data" parameter will be shifted out to the EEPROM one bit at a time.
 138  *  In order to do this, "data" must be broken down into bits.
 139  **/
 140 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
 141 {
 142         struct e1000_nvm_info *nvm = &hw->nvm;
 143         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 144         u32 mask;
 145
 146         DEBUGFUNC("e1000_shift_out_eec_bits");
 147
 148         mask = 0x01 << (count - 1);
 149         if (nvm->type == e1000_nvm_eeprom_spi)
 150                 eecd |= E1000_EECD_DO;
 151
 152         do {
 153                 eecd &= ~E1000_EECD_DI;
 154
 155                 if (data & mask)
 156                         eecd |= E1000_EECD_DI;
 157
 158                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 159                 E1000_WRITE_FLUSH(hw);
 160
 161                 usec_delay(nvm->delay_usec);
 162
 163                 e1000_raise_eec_clk(hw, &eecd);
 164                 e1000_lower_eec_clk(hw, &eecd);
 165
 166                 mask >>= 1;
 167         } while (mask);
 168
 169         eecd &= ~E1000_EECD_DI;
 170         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 171 }
 172
 173 /**
 174  *  e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
 175  *  @hw: pointer to the HW structure
 176  *  @count: number of bits to shift in
 177  *
 178  *  In order to read a register from the EEPROM, we need to shift 'count' bits
 179  *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
 180  *  the EEPROM (setting the SK bit), and then reading the value of the data out
 181  *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
 182  *  always be clear.
 183  **/
 184 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
 185 {
 186         u32 eecd;
 187         u32 i;
 188         u16 data;
 189
 190         DEBUGFUNC("e1000_shift_in_eec_bits");
 191
 192         eecd = E1000_READ_REG(hw, E1000_EECD);
 193
 194         eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
 195         data = 0;
 196
 197         for (i = 0; i < count; i++) {
 198                 data <<= 1;
 199                 e1000_raise_eec_clk(hw, &eecd);
 200
 201                 eecd = E1000_READ_REG(hw, E1000_EECD);
 202
 203                 eecd &= ~E1000_EECD_DI;
 204                 if (eecd & E1000_EECD_DO)
 205                         data |= 1;
 206
 207                 e1000_lower_eec_clk(hw, &eecd);
 208         }
 209
 210         return data;
 211 }
 212
 213 /**
 214  *  e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
 215  *  @hw: pointer to the HW structure
 216  *  @ee_reg: EEPROM flag for polling
 217  *
 218  *  Polls the EEPROM status bit for either read or write completion based
 219  *  upon the value of 'ee_reg'.
 220  **/
 221 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
 222 {
 223         u32 attempts = 100000;
 224         u32 i, reg = 0;
 225
 226         DEBUGFUNC("e1000_poll_eerd_eewr_done");
 227
 228         for (i = 0; i < attempts; i++) {
 229                 if (ee_reg == E1000_NVM_POLL_READ)
 230                         reg = E1000_READ_REG(hw, E1000_EERD);
 231                 else
 232                         reg = E1000_READ_REG(hw, E1000_EEWR);
 233
 234                 if (reg & E1000_NVM_RW_REG_DONE)
 235                         return E1000_SUCCESS;
 236
 237                 usec_delay(5);
 238         }
 239
 240         return -E1000_ERR_NVM;
 241 }
 242
 243 /**
 244  *  e1000_acquire_nvm_generic - Generic request for access to EEPROM
 245  *  @hw: pointer to the HW structure
 246  *
 247  *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
 248  *  Return successful if access grant bit set, else clear the request for
 249  *  EEPROM access and return -E1000_ERR_NVM (-1).
 250  **/
 251 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
 252 {
 253         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 254         s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
 255
 256         DEBUGFUNC("e1000_acquire_nvm_generic");
 257
 258         E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
 259         eecd = E1000_READ_REG(hw, E1000_EECD);
 260
 261         while (timeout) {
 262                 if (eecd & E1000_EECD_GNT)
 263                         break;
 264                 usec_delay(5);
 265                 eecd = E1000_READ_REG(hw, E1000_EECD);
 266                 timeout--;
 267         }
 268
 269         if (!timeout) {
 270                 eecd &= ~E1000_EECD_REQ;
 271                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 272                 DEBUGOUT("Could not acquire NVM grant\n");
 273                 return -E1000_ERR_NVM;
 274         }
 275
 276         return E1000_SUCCESS;
 277 }
 278
 279 /**
 280  *  e1000_standby_nvm - Return EEPROM to standby state
 281  *  @hw: pointer to the HW structure
 282  *
 283  *  Return the EEPROM to a standby state.
 284  **/
 285 static void e1000_standby_nvm(struct e1000_hw *hw)
 286 {
 287         struct e1000_nvm_info *nvm = &hw->nvm;
 288         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 289
 290         DEBUGFUNC("e1000_standby_nvm");
 291
 292         if (nvm->type == e1000_nvm_eeprom_spi) {
 293                 /* Toggle CS to flush commands */
 294                 eecd |= E1000_EECD_CS;
 295                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 296                 E1000_WRITE_FLUSH(hw);
 297                 usec_delay(nvm->delay_usec);
 298                 eecd &= ~E1000_EECD_CS;
 299                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 300                 E1000_WRITE_FLUSH(hw);
 301                 usec_delay(nvm->delay_usec);
 302         }
 303 }
 304
 305 /**
 306  *  e1000_stop_nvm - Terminate EEPROM command
 307  *  @hw: pointer to the HW structure
 308  *
 309  *  Terminates the current command by inverting the EEPROM's chip select pin.
 310  **/
 311 static void e1000_stop_nvm(struct e1000_hw *hw)
 312 {
 313         u32 eecd;
 314
 315         DEBUGFUNC("e1000_stop_nvm");
 316
 317         eecd = E1000_READ_REG(hw, E1000_EECD);
 318         if (hw->nvm.type == e1000_nvm_eeprom_spi) {
 319                 /* Pull CS high */
 320                 eecd |= E1000_EECD_CS;
 321                 e1000_lower_eec_clk(hw, &eecd);
 322         }
 323 }
 324
 325 /**
 326  *  e1000_release_nvm_generic - Release exclusive access to EEPROM
 327  *  @hw: pointer to the HW structure
 328  *
 329  *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
 330  **/
 331 void e1000_release_nvm_generic(struct e1000_hw *hw)
 332 {
 333         u32 eecd;
 334
 335         DEBUGFUNC("e1000_release_nvm_generic");
 336
 337         e1000_stop_nvm(hw);
 338
 339         eecd = E1000_READ_REG(hw, E1000_EECD);
 340         eecd &= ~E1000_EECD_REQ;
 341         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 342 }
 343
 344 /**
 345  *  e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
 346  *  @hw: pointer to the HW structure
 347  *
 348  *  Setups the EEPROM for reading and writing.
 349  **/
 350 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
 351 {
 352         struct e1000_nvm_info *nvm = &hw->nvm;
 353         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 354         u8 spi_stat_reg;
 355
 356         DEBUGFUNC("e1000_ready_nvm_eeprom");
 357
 358         if (nvm->type == e1000_nvm_eeprom_spi) {
 359                 u16 timeout = NVM_MAX_RETRY_SPI;
 360
 361                 /* Clear SK and CS */
 362                 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 363                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 364                 E1000_WRITE_FLUSH(hw);
 365                 usec_delay(1);
 366
 367                 /* Read "Status Register" repeatedly until the LSB is cleared.
 368                  * The EEPROM will signal that the command has been completed
 369                  * by clearing bit 0 of the internal status register.  If it's
 370                  * not cleared within 'timeout', then error out.
 371                  */
 372                 while (timeout) {
 373                         e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
 374                                                  hw->nvm.opcode_bits);
 375                         spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
 376                         if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
 377                                 break;
 378
 379                         usec_delay(5);
 380                         e1000_standby_nvm(hw);
 381                         timeout--;
 382                 }
 383
 384                 if (!timeout) {
 385                         DEBUGOUT("SPI NVM Status error\n");
 386                         return -E1000_ERR_NVM;
 387                 }
 388         }
 389
 390         return E1000_SUCCESS;
 391 }
 392
 393 /**
 394  *  e1000_read_nvm_spi - Read EEPROM's using SPI
 395  *  @hw: pointer to the HW structure
 396  *  @offset: offset of word in the EEPROM to read
 397  *  @words: number of words to read
 398  *  @data: word read from the EEPROM
 399  *
 400  *  Reads a 16 bit word from the EEPROM.
 401  **/
 402 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 403 {
 404         struct e1000_nvm_info *nvm = &hw->nvm;
 405         u32 i = 0;
 406         s32 ret_val;
 407         u16 word_in;
 408         u8 read_opcode = NVM_READ_OPCODE_SPI;
 409
 410         DEBUGFUNC("e1000_read_nvm_spi");
 411
 412         /* A check for invalid values:  offset too large, too many words,
 413          * and not enough words.
 414          */
 415         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 416             (words == 0)) {
 417                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 418                 return -E1000_ERR_NVM;
 419         }
 420
 421         ret_val = nvm->ops.acquire(hw);
 422         if (ret_val)
 423                 return ret_val;
 424
 425         ret_val = e1000_ready_nvm_eeprom(hw);
 426         if (ret_val)
 427                 goto release;
 428
 429         e1000_standby_nvm(hw);
 430
 431         if ((nvm->address_bits == 8) && (offset >= 128))
 432                 read_opcode |= NVM_A8_OPCODE_SPI;
 433
 434         /* Send the READ command (opcode + addr) */
 435         e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
 436         e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
 437
 438         /* Read the data.  SPI NVMs increment the address with each byte
 439          * read and will roll over if reading beyond the end.  This allows
 440          * us to read the whole NVM from any offset
 441          */
 442         for (i = 0; i < words; i++) {
 443                 word_in = e1000_shift_in_eec_bits(hw, 16);
 444                 data[i] = (word_in >> 8) | (word_in << 8);
 445         }
 446
 447 release:
 448         nvm->ops.release(hw);
 449
 450         return ret_val;
 451 }
 452
 453 /**
 454  *  e1000_read_nvm_eerd - Reads EEPROM using EERD register
 455  *  @hw: pointer to the HW structure
 456  *  @offset: offset of word in the EEPROM to read
 457  *  @words: number of words to read
 458  *  @data: word read from the EEPROM
 459  *
 460  *  Reads a 16 bit word from the EEPROM using the EERD register.
 461  **/
 462 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 463 {
 464         struct e1000_nvm_info *nvm = &hw->nvm;
 465         u32 i, eerd = 0;
 466         s32 ret_val = E1000_SUCCESS;
 467
 468         DEBUGFUNC("e1000_read_nvm_eerd");
 469
 470         /* A check for invalid values:  offset too large, too many words,
 471          * too many words for the offset, and not enough words.
 472          */
 473         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 474             (words == 0)) {
 475                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 476                 return -E1000_ERR_NVM;
 477         }
 478
 479         for (i = 0; i < words; i++) {
 480                 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
 481                        E1000_NVM_RW_REG_START;
 482
 483                 E1000_WRITE_REG(hw, E1000_EERD, eerd);
 484                 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
 485                 if (ret_val)
 486                         break;
 487
 488                 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
 489                            E1000_NVM_RW_REG_DATA);
 490         }
 491
 492         return ret_val;
 493 }
 494
 495 /**
 496  *  e1000_write_nvm_spi - Write to EEPROM using SPI
 497  *  @hw: pointer to the HW structure
 498  *  @offset: offset within the EEPROM to be written to
 499  *  @words: number of words to write
 500  *  @data: 16 bit word(s) to be written to the EEPROM
 501  *
 502  *  Writes data to EEPROM at offset using SPI interface.
 503  *
 504  *  If e1000_update_nvm_checksum is not called after this function , the
 505  *  EEPROM will most likely contain an invalid checksum.
 506  **/
 507 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 508 {
 509         struct e1000_nvm_info *nvm = &hw->nvm;
 510         s32 ret_val = -E1000_ERR_NVM;
 511         u16 widx = 0;
 512
 513         DEBUGFUNC("e1000_write_nvm_spi");
 514
 515         /* A check for invalid values:  offset too large, too many words,
 516          * and not enough words.
 517          */
 518         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 519             (words == 0)) {
 520                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 521                 return -E1000_ERR_NVM;
 522         }
 523
 524         while (widx < words) {
 525                 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
 526
 527                 ret_val = nvm->ops.acquire(hw);
 528                 if (ret_val)
 529                         return ret_val;
 530
 531                 ret_val = e1000_ready_nvm_eeprom(hw);
 532                 if (ret_val) {
 533                         nvm->ops.release(hw);
 534                         return ret_val;
 535                 }
 536
 537                 e1000_standby_nvm(hw);
 538
 539                 /* Send the WRITE ENABLE command (8 bit opcode) */
 540                 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
 541                                          nvm->opcode_bits);
 542
 543                 e1000_standby_nvm(hw);
 544
 545                 /* Some SPI eeproms use the 8th address bit embedded in the
 546                  * opcode
 547                  */
 548                 if ((nvm->address_bits == 8) && (offset >= 128))
 549                         write_opcode |= NVM_A8_OPCODE_SPI;
 550
 551                 /* Send the Write command (8-bit opcode + addr) */
 552                 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
 553                 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
 554                                          nvm->address_bits);
 555
 556                 /* Loop to allow for up to whole page write of eeprom */
 557                 while (widx < words) {
 558                         u16 word_out = data[widx];
 559                         word_out = (word_out >> 8) | (word_out << 8);
 560                         e1000_shift_out_eec_bits(hw, word_out, 16);
 561                         widx++;
 562
 563                         if ((((offset + widx) * 2) % nvm->page_size) == 0) {
 564                                 e1000_standby_nvm(hw);
 565                                 break;
 566                         }
 567                 }
 568                 msec_delay(10);
 569                 nvm->ops.release(hw);
 570         }
 571
 572         return ret_val;
 573 }
 574
 575 /**
 576  *  e1000_read_pba_string_generic - Read device part number
 577  *  @hw: pointer to the HW structure
 578  *  @pba_num: pointer to device part number
 579  *  @pba_num_size: size of part number buffer
 580  *
 581  *  Reads the product board assembly (PBA) number from the EEPROM and stores
 582  *  the value in pba_num.
 583  **/
 584 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 585                                   u32 pba_num_size)
 586 {
 587         s32 ret_val;
 588         u16 nvm_data;
 589         u16 pba_ptr;
 590         u16 offset;
 591         u16 length;
 592
 593         DEBUGFUNC("e1000_read_pba_string_generic");
 594
 595         if (pba_num == NULL) {
 596                 DEBUGOUT("PBA string buffer was null\n");
 597                 return -E1000_ERR_INVALID_ARGUMENT;
 598         }
 599
 600         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 601         if (ret_val) {
 602                 DEBUGOUT("NVM Read Error\n");
 603                 return ret_val;
 604         }
 605
 606         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 607         if (ret_val) {
 608                 DEBUGOUT("NVM Read Error\n");
 609                 return ret_val;
 610         }
 611
 612         /* if nvm_data is not ptr guard the PBA must be in legacy format which
 613          * means pba_ptr is actually our second data word for the PBA number
 614          * and we can decode it into an ascii string
 615          */
 616         if (nvm_data != NVM_PBA_PTR_GUARD) {
 617                 DEBUGOUT("NVM PBA number is not stored as string\n");
 618
 619                 /* make sure callers buffer is big enough to store the PBA */
 620                 if (pba_num_size < E1000_PBANUM_LENGTH) {
 621                         DEBUGOUT("PBA string buffer too small\n");
 622                         return E1000_ERR_NO_SPACE;
 623                 }
 624
 625                 /* extract hex string from data and pba_ptr */
 626                 pba_num[0] = (nvm_data >> 12) & 0xF;
 627                 pba_num[1] = (nvm_data >> 8) & 0xF;
 628                 pba_num[2] = (nvm_data >> 4) & 0xF;
 629                 pba_num[3] = nvm_data & 0xF;
 630                 pba_num[4] = (pba_ptr >> 12) & 0xF;
 631                 pba_num[5] = (pba_ptr >> 8) & 0xF;
 632                 pba_num[6] = '-';
 633                 pba_num[7] = 0;
 634                 pba_num[8] = (pba_ptr >> 4) & 0xF;
 635                 pba_num[9] = pba_ptr & 0xF;
 636
 637                 /* put a null character on the end of our string */
 638                 pba_num[10] = '\0';
 639
 640                 /* switch all the data but the '-' to hex char */
 641                 for (offset = 0; offset < 10; offset++) {
 642                         if (pba_num[offset] < 0xA)
 643                                 pba_num[offset] += '0';
 644                         else if (pba_num[offset] < 0x10)
 645                                 pba_num[offset] += 'A' - 0xA;
 646                 }
 647
 648                 return E1000_SUCCESS;
 649         }
 650
 651         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 652         if (ret_val) {
 653                 DEBUGOUT("NVM Read Error\n");
 654                 return ret_val;
 655         }
 656
 657         if (length == 0xFFFF || length == 0) {
 658                 DEBUGOUT("NVM PBA number section invalid length\n");
 659                 return -E1000_ERR_NVM_PBA_SECTION;
 660         }
 661         /* check if pba_num buffer is big enough */
 662         if (pba_num_size < (((u32)length * 2) - 1)) {
 663                 DEBUGOUT("PBA string buffer too small\n");
 664                 return -E1000_ERR_NO_SPACE;
 665         }
 666
 667         /* trim pba length from start of string */
 668         pba_ptr++;
 669         length--;
 670
 671         for (offset = 0; offset < length; offset++) {
 672                 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
 673                 if (ret_val) {
 674                         DEBUGOUT("NVM Read Error\n");
 675                         return ret_val;
 676                 }
 677                 pba_num[offset * 2] = (u8)(nvm_data >> 8);
 678                 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
 679         }
 680         pba_num[offset * 2] = '\0';
 681
 682         return E1000_SUCCESS;
 683 }
 684
 685 /**
 686  *  e1000_read_pba_length_generic - Read device part number length
 687  *  @hw: pointer to the HW structure
 688  *  @pba_num_size: size of part number buffer
 689  *
 690  *  Reads the product board assembly (PBA) number length from the EEPROM and
 691  *  stores the value in pba_num_size.
 692  **/
 693 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
 694 {
 695         s32 ret_val;
 696         u16 nvm_data;
 697         u16 pba_ptr;
 698         u16 length;
 699
 700         DEBUGFUNC("e1000_read_pba_length_generic");
 701
 702         if (pba_num_size == NULL) {
 703                 DEBUGOUT("PBA buffer size was null\n");
 704                 return -E1000_ERR_INVALID_ARGUMENT;
 705         }
 706
 707         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 708         if (ret_val) {
 709                 DEBUGOUT("NVM Read Error\n");
 710                 return ret_val;
 711         }
 712
 713         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 714         if (ret_val) {
 715                 DEBUGOUT("NVM Read Error\n");
 716                 return ret_val;
 717         }
 718
 719          /* if data is not ptr guard the PBA must be in legacy format */
 720         if (nvm_data != NVM_PBA_PTR_GUARD) {
 721                 *pba_num_size = E1000_PBANUM_LENGTH;
 722                 return E1000_SUCCESS;
 723         }
 724
 725         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 726         if (ret_val) {
 727                 DEBUGOUT("NVM Read Error\n");
 728                 return ret_val;
 729         }
 730
 731         if (length == 0xFFFF || length == 0) {
 732                 DEBUGOUT("NVM PBA number section invalid length\n");
 733                 return -E1000_ERR_NVM_PBA_SECTION;
 734         }
 735
 736         /* Convert from length in u16 values to u8 chars, add 1 for NULL,
 737          * and subtract 2 because length field is included in length.
 738          */
 739         *pba_num_size = ((u32)length * 2) - 1;
 740
 741         return E1000_SUCCESS;
 742 }
 743
 744
 745
 746
 747
 748 /**
 749  *  e1000_read_mac_addr_generic - Read device MAC address
 750  *  @hw: pointer to the HW structure
 751  *
 752  *  Reads the device MAC address from the EEPROM and stores the value.
 753  *  Since devices with two ports use the same EEPROM, we increment the
 754  *  last bit in the MAC address for the second port.
 755  **/
 756 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
 757 {
 758         u32 rar_high;
 759         u32 rar_low;
 760         u16 i;
 761
 762         rar_high = E1000_READ_REG(hw, E1000_RAH(0));
 763         rar_low = E1000_READ_REG(hw, E1000_RAL(0));
 764
 765         for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
 766                 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
 767
 768         for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
 769                 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
 770
 771         for (i = 0; i < ETH_ADDR_LEN; i++)
 772                 hw->mac.addr[i] = hw->mac.perm_addr[i];
 773
 774         return E1000_SUCCESS;
 775 }
 776
 777 /**
 778  *  e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
 779  *  @hw: pointer to the HW structure
 780  *
 781  *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
 782  *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
 783  **/
 784 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
 785 {
 786         s32 ret_val;
 787         u16 checksum = 0;
 788         u16 i, nvm_data;
 789
 790         DEBUGFUNC("e1000_validate_nvm_checksum_generic");
 791
 792         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
 793                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
 794                 if (ret_val) {
 795                         DEBUGOUT("NVM Read Error\n");
 796                         return ret_val;
 797                 }
 798                 checksum += nvm_data;
 799         }
 800
 801         if (checksum != (u16) NVM_SUM) {
 802                 DEBUGOUT("NVM Checksum Invalid\n");
 803                 return -E1000_ERR_NVM;
 804         }
 805
 806         return E1000_SUCCESS;
 807 }
 808
 809 /**
 810  *  e1000_update_nvm_checksum_generic - Update EEPROM checksum
 811  *  @hw: pointer to the HW structure
 812  *
 813  *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
 814  *  up to the checksum.  Then calculates the EEPROM checksum and writes the
 815  *  value to the EEPROM.
 816  **/
 817 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
 818 {
 819         s32 ret_val;
 820         u16 checksum = 0;
 821         u16 i, nvm_data;
 822
 823         DEBUGFUNC("e1000_update_nvm_checksum");
 824
 825         for (i = 0; i < NVM_CHECKSUM_REG; i++) {
 826                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
 827                 if (ret_val) {
 828                         DEBUGOUT("NVM Read Error while updating checksum.\n");
 829                         return ret_val;
 830                 }
 831                 checksum += nvm_data;
 832         }
 833         checksum = (u16) NVM_SUM - checksum;
 834         ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
 835         if (ret_val)
 836                 DEBUGOUT("NVM Write Error while updating checksum.\n");
 837
 838         return ret_val;
 839 }
 840
 841 /**
 842  *  e1000_reload_nvm_generic - Reloads EEPROM
 843  *  @hw: pointer to the HW structure
 844  *
 845  *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
 846  *  extended control register.
 847  **/
 848 static void e1000_reload_nvm_generic(struct e1000_hw *hw)
 849 {
 850         u32 ctrl_ext;
 851
 852         DEBUGFUNC("e1000_reload_nvm_generic");
 853
 854         usec_delay(10);
 855         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 856         ctrl_ext |= E1000_CTRL_EXT_EE_RST;
 857         E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
 858         E1000_WRITE_FLUSH(hw);
 859 }
 860
 861 /**
 862  *  e1000_get_fw_version - Get firmware version information
 863  *  @hw: pointer to the HW structure
 864  *  @fw_vers: pointer to output version structure
 865  *
 866  *  unsupported/not present features return 0 in version structure
 867  **/
 868 void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
 869 {
 870         u16 eeprom_verh, eeprom_verl, etrack_test, fw_version;
 871         u8 q, hval, rem, result;
 872         u16 comb_verh, comb_verl, comb_offset;
 873
 874         memset(fw_vers, 0, sizeof(struct e1000_fw_version));
 875
 876         /* basic eeprom version numbers, bits used vary by part and by tool
 877          * used to create the nvm images */
 878         /* Check which data format we have */
 879         hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
 880         switch (hw->mac.type) {
 881         case e1000_i211:
 882                 e1000_read_invm_version(hw, fw_vers);
 883                 return;
 884         case e1000_82575:
 885         case e1000_82576:
 886         case e1000_82580:
 887                 /* Use this format, unless EETRACK ID exists,
 888                  * then use alternate format
 889                  */
 890                 if ((etrack_test &  NVM_MAJOR_MASK) != NVM_ETRACK_VALID) {
 891                         hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
 892                         fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
 893                                               >> NVM_MAJOR_SHIFT;
 894                         fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)
 895                                               >> NVM_MINOR_SHIFT;
 896                         fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);
 897                         goto etrack_id;
 898                 }
 899                 break;
 900         case e1000_i210:
 901                 if (!(e1000_get_flash_presence_i210(hw))) {
 902                         e1000_read_invm_version(hw, fw_vers);
 903                         return;
 904                 }
 905                 /* fall through */
 906         case e1000_i350:
 907         case e1000_i354:
 908                 /* find combo image version */
 909                 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
 910                 if ((comb_offset != 0x0) &&
 911                     (comb_offset != NVM_VER_INVALID)) {
 912
 913                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
 914                                          + 1), 1, &comb_verh);
 915                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
 916                                          1, &comb_verl);
 917
 918                         /* get Option Rom version if it exists and is valid */
 919                         if ((comb_verh && comb_verl) &&
 920                             ((comb_verh != NVM_VER_INVALID) &&
 921                              (comb_verl != NVM_VER_INVALID))) {
 922
 923                                 fw_vers->or_valid = true;
 924                                 fw_vers->or_major =
 925                                         comb_verl >> NVM_COMB_VER_SHFT;
 926                                 fw_vers->or_build =
 927                                         (comb_verl << NVM_COMB_VER_SHFT)
 928                                         | (comb_verh >> NVM_COMB_VER_SHFT);
 929                                 fw_vers->or_patch =
 930                                         comb_verh & NVM_COMB_VER_MASK;
 931                         }
 932                 }
 933                 break;
 934         default:
 935                 return;
 936         }
 937         hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
 938         fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
 939                               >> NVM_MAJOR_SHIFT;
 940
 941         /* check for old style version format in newer images*/
 942         if ((fw_version & NVM_NEW_DEC_MASK) == 0x0) {
 943                 eeprom_verl = (fw_version & NVM_COMB_VER_MASK);
 944         } else {
 945                 eeprom_verl = (fw_version & NVM_MINOR_MASK)
 946                                 >> NVM_MINOR_SHIFT;
 947         }
 948         /* Convert minor value to hex before assigning to output struct
 949          * Val to be converted will not be higher than 99, per tool output
 950          */
 951         q = eeprom_verl / NVM_HEX_CONV;
 952         hval = q * NVM_HEX_TENS;
 953         rem = eeprom_verl % NVM_HEX_CONV;
 954         result = hval + rem;
 955         fw_vers->eep_minor = result;
 956
 957 etrack_id:
 958         if ((etrack_test &  NVM_MAJOR_MASK) == NVM_ETRACK_VALID) {
 959                 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);
 960                 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);
 961                 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)
 962                         | eeprom_verl;
 963         }
 964         return;
 965 }