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[ceph.git] / ceph / src / dpdk / lib / librte_eal / linuxapp / kni / ethtool / ixgbe / ixgbe_main.c
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "LICENSE.GPL".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /******************************************************************************
29 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
30 ******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/vmalloc.h>
36 #include <linux/highmem.h>
37 #include <linux/string.h>
38 #include <linux/in.h>
39 #include <linux/ip.h>
40 #include <linux/tcp.h>
41 #ifdef HAVE_SCTP
42 #include <linux/sctp.h>
43 #endif
44 #include <linux/pkt_sched.h>
45 #include <linux/ipv6.h>
46 #ifdef NETIF_F_TSO
47 #include <net/checksum.h>
48 #ifdef NETIF_F_TSO6
49 #include <net/ip6_checksum.h>
50 #endif
51 #endif
52 #ifdef SIOCETHTOOL
53 #include <linux/ethtool.h>
54 #endif
55
56 #include "ixgbe.h"
57
58 #undef CONFIG_DCA
59 #undef CONFIG_DCA_MODULE
60
61 char ixgbe_driver_name[] = "ixgbe";
62 #define DRV_HW_PERF
63
64 #ifndef CONFIG_IXGBE_NAPI
65 #define DRIVERNAPI
66 #else
67 #define DRIVERNAPI "-NAPI"
68 #endif
69
70 #define FPGA
71
72 #define VMDQ_TAG
73
74 #define MAJ 3
75 #define MIN 9
76 #define BUILD 17
77 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
78 __stringify(BUILD) DRIVERNAPI DRV_HW_PERF FPGA VMDQ_TAG
79 const char ixgbe_driver_version[] = DRV_VERSION;
80
81 /* ixgbe_pci_tbl - PCI Device ID Table
82 *
83 * Wildcard entries (PCI_ANY_ID) should come last
84 * Last entry must be all 0s
85 *
86 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
87 * Class, Class Mask, private data (not used) }
88 */
89 const struct pci_device_id ixgbe_pci_tbl[] = {
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598)},
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)},
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)},
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT)},
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2)},
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4)},
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)},
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)},
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)},
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR)},
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)},
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX)},
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4)},
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)},
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR)},
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP)},
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM)},
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)},
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4)},
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)},
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)},
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM)},
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)},
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T)},
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2)},
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS)},
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP)},
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)},
118 /* required last entry */
119 {0, }
120 };
121
122 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
124 void *p);
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
127 .next = NULL,
128 .priority = 0
129 };
130
131 #endif
132 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
133 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
134 MODULE_LICENSE("GPL");
135 MODULE_VERSION(DRV_VERSION);
136
137 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
138
139
140 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
141 {
142 u32 ctrl_ext;
143
144 /* Let firmware take over control of h/w */
145 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
146 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
147 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
148 }
149
150 #ifdef NO_VNIC
151 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
152 {
153 u32 ctrl_ext;
154
155 /* Let firmware know the driver has taken over */
156 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
157 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
158 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
159 }
160 #endif
161
162
163 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
164 {
165 struct ixgbe_hw *hw = &adapter->hw;
166 struct ixgbe_hw_stats *hwstats = &adapter->stats;
167 int i;
168 u32 data;
169
170 if ((hw->fc.current_mode != ixgbe_fc_full) &&
171 (hw->fc.current_mode != ixgbe_fc_rx_pause))
172 return;
173
174 switch (hw->mac.type) {
175 case ixgbe_mac_82598EB:
176 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
177 break;
178 default:
179 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
180 }
181 hwstats->lxoffrxc += data;
182
183 /* refill credits (no tx hang) if we received xoff */
184 if (!data)
185 return;
186
187 for (i = 0; i < adapter->num_tx_queues; i++)
188 clear_bit(__IXGBE_HANG_CHECK_ARMED,
189 &adapter->tx_ring[i]->state);
190 }
191
192 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
193 {
194 struct ixgbe_hw *hw = &adapter->hw;
195 struct ixgbe_hw_stats *hwstats = &adapter->stats;
196 u32 xoff[8] = {0};
197 int i;
198 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
199
200 #ifdef HAVE_DCBNL_IEEE
201 if (adapter->ixgbe_ieee_pfc)
202 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
203
204 #endif
205 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
206 ixgbe_update_xoff_rx_lfc(adapter);
207 return;
208 }
209
210 /* update stats for each tc, only valid with PFC enabled */
211 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
212 switch (hw->mac.type) {
213 case ixgbe_mac_82598EB:
214 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
215 break;
216 default:
217 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
218 }
219 hwstats->pxoffrxc[i] += xoff[i];
220 }
221
222 /* disarm tx queues that have received xoff frames */
223 for (i = 0; i < adapter->num_tx_queues; i++) {
224 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
225 u8 tc = tx_ring->dcb_tc;
226
227 if ((tc <= 7) && (xoff[tc]))
228 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
229 }
230 }
231
232
233
234
235 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
236
237
238
239
240 #ifdef HAVE_8021P_SUPPORT
241 /**
242 * ixgbe_vlan_stripping_disable - helper to disable vlan tag stripping
243 * @adapter: driver data
244 */
245 void ixgbe_vlan_stripping_disable(struct ixgbe_adapter *adapter)
246 {
247 struct ixgbe_hw *hw = &adapter->hw;
248 u32 vlnctrl;
249 int i;
250
251 /* leave vlan tag stripping enabled for DCB */
252 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
253 return;
254
255 switch (hw->mac.type) {
256 case ixgbe_mac_82598EB:
257 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
258 vlnctrl &= ~IXGBE_VLNCTRL_VME;
259 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
260 break;
261 case ixgbe_mac_82599EB:
262 case ixgbe_mac_X540:
263 for (i = 0; i < adapter->num_rx_queues; i++) {
264 u8 reg_idx = adapter->rx_ring[i]->reg_idx;
265 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
266 vlnctrl &= ~IXGBE_RXDCTL_VME;
267 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), vlnctrl);
268 }
269 break;
270 default:
271 break;
272 }
273 }
274
275 #endif
276 /**
277 * ixgbe_vlan_stripping_enable - helper to enable vlan tag stripping
278 * @adapter: driver data
279 */
280 void ixgbe_vlan_stripping_enable(struct ixgbe_adapter *adapter)
281 {
282 struct ixgbe_hw *hw = &adapter->hw;
283 u32 vlnctrl;
284 int i;
285
286 switch (hw->mac.type) {
287 case ixgbe_mac_82598EB:
288 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
289 vlnctrl |= IXGBE_VLNCTRL_VME;
290 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
291 break;
292 case ixgbe_mac_82599EB:
293 case ixgbe_mac_X540:
294 for (i = 0; i < adapter->num_rx_queues; i++) {
295 u8 reg_idx = adapter->rx_ring[i]->reg_idx;
296 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
297 vlnctrl |= IXGBE_RXDCTL_VME;
298 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), vlnctrl);
299 }
300 break;
301 default:
302 break;
303 }
304 }
305
306 #ifdef HAVE_VLAN_RX_REGISTER
307 void ixgbe_vlan_mode(struct net_device *netdev, struct vlan_group *grp)
308 #else
309 void ixgbe_vlan_mode(struct net_device *netdev, u32 features)
310 #endif
311 {
312 struct ixgbe_adapter *adapter = netdev_priv(netdev);
313 #ifdef HAVE_8021P_SUPPORT
314 bool enable;
315 #endif
316 #ifdef HAVE_VLAN_RX_REGISTER
317
318 //if (!test_bit(__IXGBE_DOWN, &adapter->state))
319 // ixgbe_irq_disable(adapter);
320
321 adapter->vlgrp = grp;
322
323 //if (!test_bit(__IXGBE_DOWN, &adapter->state))
324 // ixgbe_irq_enable(adapter, true, true);
325 #endif
326 #ifdef HAVE_8021P_SUPPORT
327 #ifdef HAVE_VLAN_RX_REGISTER
328 enable = (grp || (adapter->flags & IXGBE_FLAG_DCB_ENABLED));
329 #else
330 enable = !!(features & NETIF_F_HW_VLAN_RX);
331 #endif
332 if (enable)
333 /* enable VLAN tag insert/strip */
334 ixgbe_vlan_stripping_enable(adapter);
335 else
336 /* disable VLAN tag insert/strip */
337 ixgbe_vlan_stripping_disable(adapter);
338
339 #endif
340 }
341
342 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
343 {
344 #ifdef NETDEV_HW_ADDR_T_MULTICAST
345 struct netdev_hw_addr *mc_ptr;
346 #else
347 struct dev_mc_list *mc_ptr;
348 #endif
349 struct ixgbe_adapter *adapter = hw->back;
350 u8 *addr = *mc_addr_ptr;
351
352 *vmdq = adapter->num_vfs;
353
354 #ifdef NETDEV_HW_ADDR_T_MULTICAST
355 mc_ptr = container_of(addr, struct netdev_hw_addr, addr[0]);
356 if (mc_ptr->list.next) {
357 struct netdev_hw_addr *ha;
358
359 ha = list_entry(mc_ptr->list.next, struct netdev_hw_addr, list);
360 *mc_addr_ptr = ha->addr;
361 }
362 #else
363 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
364 if (mc_ptr->next)
365 *mc_addr_ptr = mc_ptr->next->dmi_addr;
366 #endif
367 else
368 *mc_addr_ptr = NULL;
369
370 return addr;
371 }
372
373 /**
374 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
375 * @netdev: network interface device structure
376 *
377 * Writes multicast address list to the MTA hash table.
378 * Returns: -ENOMEM on failure
379 * 0 on no addresses written
380 * X on writing X addresses to MTA
381 **/
382 int ixgbe_write_mc_addr_list(struct net_device *netdev)
383 {
384 struct ixgbe_adapter *adapter = netdev_priv(netdev);
385 struct ixgbe_hw *hw = &adapter->hw;
386 #ifdef NETDEV_HW_ADDR_T_MULTICAST
387 struct netdev_hw_addr *ha;
388 #endif
389 u8 *addr_list = NULL;
390 int addr_count = 0;
391
392 if (!hw->mac.ops.update_mc_addr_list)
393 return -ENOMEM;
394
395 if (!netif_running(netdev))
396 return 0;
397
398
399 hw->mac.ops.update_mc_addr_list(hw, NULL, 0,
400 ixgbe_addr_list_itr, true);
401
402 if (!netdev_mc_empty(netdev)) {
403 #ifdef NETDEV_HW_ADDR_T_MULTICAST
404 ha = list_first_entry(&netdev->mc.list,
405 struct netdev_hw_addr, list);
406 addr_list = ha->addr;
407 #else
408 addr_list = netdev->mc_list->dmi_addr;
409 #endif
410 addr_count = netdev_mc_count(netdev);
411
412 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
413 ixgbe_addr_list_itr, false);
414 }
415
416 #ifdef CONFIG_PCI_IOV
417 //ixgbe_restore_vf_multicasts(adapter);
418 #endif
419 return addr_count;
420 }
421
422
423 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
424 {
425 struct ixgbe_hw *hw = &adapter->hw;
426 int i;
427 for (i = 0; i < hw->mac.num_rar_entries; i++) {
428 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE) {
429 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
430 adapter->mac_table[i].queue,
431 IXGBE_RAH_AV);
432 } else {
433 hw->mac.ops.clear_rar(hw, i);
434 }
435 }
436 }
437
438 void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
439 {
440 struct ixgbe_hw *hw = &adapter->hw;
441 int i;
442 for (i = 0; i < hw->mac.num_rar_entries; i++) {
443 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
444 if (adapter->mac_table[i].state &
445 IXGBE_MAC_STATE_IN_USE) {
446 hw->mac.ops.set_rar(hw, i,
447 adapter->mac_table[i].addr,
448 adapter->mac_table[i].queue,
449 IXGBE_RAH_AV);
450 } else {
451 hw->mac.ops.clear_rar(hw, i);
452 }
453 adapter->mac_table[i].state &=
454 ~(IXGBE_MAC_STATE_MODIFIED);
455 }
456 }
457 }
458
459 int ixgbe_available_rars(struct ixgbe_adapter *adapter)
460 {
461 struct ixgbe_hw *hw = &adapter->hw;
462 int i, count = 0;
463
464 for (i = 0; i < hw->mac.num_rar_entries; i++) {
465 if (adapter->mac_table[i].state == 0)
466 count++;
467 }
468 return count;
469 }
470
471 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
472 {
473 struct ixgbe_hw *hw = &adapter->hw;
474 int i;
475
476 if (is_zero_ether_addr(addr))
477 return 0;
478
479 for (i = 0; i < hw->mac.num_rar_entries; i++) {
480 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
481 continue;
482 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
483 IXGBE_MAC_STATE_IN_USE);
484 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
485 adapter->mac_table[i].queue = queue;
486 ixgbe_sync_mac_table(adapter);
487 return i;
488 }
489 return -ENOMEM;
490 }
491
492 void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
493 {
494 int i;
495 struct ixgbe_hw *hw = &adapter->hw;
496
497 for (i = 0; i < hw->mac.num_rar_entries; i++) {
498 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
499 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
500 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
501 adapter->mac_table[i].queue = 0;
502 }
503 ixgbe_sync_mac_table(adapter);
504 }
505
506 void ixgbe_del_mac_filter_by_index(struct ixgbe_adapter *adapter, int index)
507 {
508 adapter->mac_table[index].state |= IXGBE_MAC_STATE_MODIFIED;
509 adapter->mac_table[index].state &= ~IXGBE_MAC_STATE_IN_USE;
510 memset(adapter->mac_table[index].addr, 0, ETH_ALEN);
511 adapter->mac_table[index].queue = 0;
512 ixgbe_sync_mac_table(adapter);
513 }
514
515 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8* addr, u16 queue)
516 {
517 /* search table for addr, if found, set to 0 and sync */
518 int i;
519 struct ixgbe_hw *hw = &adapter->hw;
520
521 if (is_zero_ether_addr(addr))
522 return 0;
523 for (i = 0; i < hw->mac.num_rar_entries; i++) {
524 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
525 adapter->mac_table[i].queue == queue) {
526 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
527 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
528 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
529 adapter->mac_table[i].queue = 0;
530 ixgbe_sync_mac_table(adapter);
531 return 0;
532 }
533 }
534 return -ENOMEM;
535 }
536 #ifdef HAVE_SET_RX_MODE
537 /**
538 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
539 * @netdev: network interface device structure
540 *
541 * Writes unicast address list to the RAR table.
542 * Returns: -ENOMEM on failure/insufficient address space
543 * 0 on no addresses written
544 * X on writing X addresses to the RAR table
545 **/
546 int ixgbe_write_uc_addr_list(struct ixgbe_adapter *adapter,
547 struct net_device *netdev, unsigned int vfn)
548 {
549 int count = 0;
550
551 /* return ENOMEM indicating insufficient memory for addresses */
552 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
553 return -ENOMEM;
554
555 if (!netdev_uc_empty(netdev)) {
556 #ifdef NETDEV_HW_ADDR_T_UNICAST
557 struct netdev_hw_addr *ha;
558 #else
559 struct dev_mc_list *ha;
560 #endif
561 netdev_for_each_uc_addr(ha, netdev) {
562 #ifdef NETDEV_HW_ADDR_T_UNICAST
563 ixgbe_del_mac_filter(adapter, ha->addr, (u16)vfn);
564 ixgbe_add_mac_filter(adapter, ha->addr, (u16)vfn);
565 #else
566 ixgbe_del_mac_filter(adapter, ha->da_addr, (u16)vfn);
567 ixgbe_add_mac_filter(adapter, ha->da_addr, (u16)vfn);
568 #endif
569 count++;
570 }
571 }
572 return count;
573 }
574
575 #endif
576 /**
577 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
578 * @netdev: network interface device structure
579 *
580 * The set_rx_method entry point is called whenever the unicast/multicast
581 * address list or the network interface flags are updated. This routine is
582 * responsible for configuring the hardware for proper unicast, multicast and
583 * promiscuous mode.
584 **/
585 void ixgbe_set_rx_mode(struct net_device *netdev)
586 {
587 struct ixgbe_adapter *adapter = netdev_priv(netdev);
588 struct ixgbe_hw *hw = &adapter->hw;
589 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
590 u32 vlnctrl;
591 int count;
592
593 /* Check for Promiscuous and All Multicast modes */
594 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
595 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
596
597 /* set all bits that we expect to always be set */
598 fctrl |= IXGBE_FCTRL_BAM;
599 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
600 fctrl |= IXGBE_FCTRL_PMCF;
601
602 /* clear the bits we are changing the status of */
603 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
604 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
605
606 if (netdev->flags & IFF_PROMISC) {
607 hw->addr_ctrl.user_set_promisc = true;
608 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
609 vmolr |= IXGBE_VMOLR_MPE;
610 } else {
611 if (netdev->flags & IFF_ALLMULTI) {
612 fctrl |= IXGBE_FCTRL_MPE;
613 vmolr |= IXGBE_VMOLR_MPE;
614 } else {
615 /*
616 * Write addresses to the MTA, if the attempt fails
617 * then we should just turn on promiscuous mode so
618 * that we can at least receive multicast traffic
619 */
620 count = ixgbe_write_mc_addr_list(netdev);
621 if (count < 0) {
622 fctrl |= IXGBE_FCTRL_MPE;
623 vmolr |= IXGBE_VMOLR_MPE;
624 } else if (count) {
625 vmolr |= IXGBE_VMOLR_ROMPE;
626 }
627 }
628 #ifdef NETIF_F_HW_VLAN_TX
629 /* enable hardware vlan filtering */
630 vlnctrl |= IXGBE_VLNCTRL_VFE;
631 #endif
632 hw->addr_ctrl.user_set_promisc = false;
633 #ifdef HAVE_SET_RX_MODE
634 /*
635 * Write addresses to available RAR registers, if there is not
636 * sufficient space to store all the addresses then enable
637 * unicast promiscuous mode
638 */
639 count = ixgbe_write_uc_addr_list(adapter, netdev,
640 adapter->num_vfs);
641 if (count < 0) {
642 fctrl |= IXGBE_FCTRL_UPE;
643 vmolr |= IXGBE_VMOLR_ROPE;
644 }
645 #endif
646 }
647
648 if (hw->mac.type != ixgbe_mac_82598EB) {
649 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
650 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
651 IXGBE_VMOLR_ROPE);
652 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
653 }
654
655 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
656 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
657 }
658
659
660
661
662
663
664
665
666 /* Additional bittime to account for IXGBE framing */
667 #define IXGBE_ETH_FRAMING 20
668
669 /*
670 * ixgbe_hpbthresh - calculate high water mark for flow control
671 *
672 * @adapter: board private structure to calculate for
673 * @pb - packet buffer to calculate
674 */
675 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
676 {
677 struct ixgbe_hw *hw = &adapter->hw;
678 struct net_device *dev = adapter->netdev;
679 int link, tc, kb, marker;
680 u32 dv_id, rx_pba;
681
682 /* Calculate max LAN frame size */
683 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
684
685 #ifdef IXGBE_FCOE
686 /* FCoE traffic class uses FCOE jumbo frames */
687 if (dev->features & NETIF_F_FCOE_MTU) {
688 int fcoe_pb = 0;
689
690 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
691
692 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
693 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
694 }
695 #endif
696
697 /* Calculate delay value for device */
698 switch (hw->mac.type) {
699 case ixgbe_mac_X540:
700 dv_id = IXGBE_DV_X540(link, tc);
701 break;
702 default:
703 dv_id = IXGBE_DV(link, tc);
704 break;
705 }
706
707 /* Loopback switch introduces additional latency */
708 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
709 dv_id += IXGBE_B2BT(tc);
710
711 /* Delay value is calculated in bit times convert to KB */
712 kb = IXGBE_BT2KB(dv_id);
713 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
714
715 marker = rx_pba - kb;
716
717 /* It is possible that the packet buffer is not large enough
718 * to provide required headroom. In this case throw an error
719 * to user and a do the best we can.
720 */
721 if (marker < 0) {
722 e_warn(drv, "Packet Buffer(%i) can not provide enough"
723 "headroom to suppport flow control."
724 "Decrease MTU or number of traffic classes\n", pb);
725 marker = tc + 1;
726 }
727
728 return marker;
729 }
730
731 /*
732 * ixgbe_lpbthresh - calculate low water mark for for flow control
733 *
734 * @adapter: board private structure to calculate for
735 * @pb - packet buffer to calculate
736 */
737 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
738 {
739 struct ixgbe_hw *hw = &adapter->hw;
740 struct net_device *dev = adapter->netdev;
741 int tc;
742 u32 dv_id;
743
744 /* Calculate max LAN frame size */
745 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
746
747 #ifdef IXGBE_FCOE
748 /* FCoE traffic class uses FCOE jumbo frames */
749 if (dev->features & NETIF_F_FCOE_MTU) {
750 int fcoe_pb = 0;
751
752 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
753
754 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
755 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
756 }
757 #endif
758
759 /* Calculate delay value for device */
760 switch (hw->mac.type) {
761 case ixgbe_mac_X540:
762 dv_id = IXGBE_LOW_DV_X540(tc);
763 break;
764 default:
765 dv_id = IXGBE_LOW_DV(tc);
766 break;
767 }
768
769 /* Delay value is calculated in bit times convert to KB */
770 return IXGBE_BT2KB(dv_id);
771 }
772
773 /*
774 * ixgbe_pbthresh_setup - calculate and setup high low water marks
775 */
776 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
777 {
778 struct ixgbe_hw *hw = &adapter->hw;
779 int num_tc = netdev_get_num_tc(adapter->netdev);
780 int i;
781
782 if (!num_tc)
783 num_tc = 1;
784 if (num_tc > IXGBE_DCB_MAX_TRAFFIC_CLASS)
785 num_tc = IXGBE_DCB_MAX_TRAFFIC_CLASS;
786
787 for (i = 0; i < num_tc; i++) {
788 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
789 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
790
791 /* Low water marks must not be larger than high water marks */
792 if (hw->fc.low_water[i] > hw->fc.high_water[i])
793 hw->fc.low_water[i] = 0;
794 }
795
796 for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++)
797 hw->fc.high_water[i] = 0;
798 }
799
800
801
802 #ifdef NO_VNIC
803 static void ixgbe_configure(struct ixgbe_adapter *adapter)
804 {
805 struct ixgbe_hw *hw = &adapter->hw;
806
807 ixgbe_configure_pb(adapter);
808 ixgbe_configure_dcb(adapter);
809
810 ixgbe_set_rx_mode(adapter->netdev);
811 #ifdef NETIF_F_HW_VLAN_TX
812 ixgbe_restore_vlan(adapter);
813 #endif
814
815 #ifdef IXGBE_FCOE
816 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
817 ixgbe_configure_fcoe(adapter);
818
819 #endif /* IXGBE_FCOE */
820
821 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
822 hw->mac.ops.disable_sec_rx_path(hw);
823
824 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
825 ixgbe_init_fdir_signature_82599(&adapter->hw,
826 adapter->fdir_pballoc);
827 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
828 ixgbe_init_fdir_perfect_82599(&adapter->hw,
829 adapter->fdir_pballoc);
830 ixgbe_fdir_filter_restore(adapter);
831 }
832
833 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
834 hw->mac.ops.enable_sec_rx_path(hw);
835
836 ixgbe_configure_virtualization(adapter);
837
838 ixgbe_configure_tx(adapter);
839 ixgbe_configure_rx(adapter);
840 }
841 #endif
842
843 static bool ixgbe_is_sfp(struct ixgbe_hw *hw)
844 {
845 switch (hw->phy.type) {
846 case ixgbe_phy_sfp_avago:
847 case ixgbe_phy_sfp_ftl:
848 case ixgbe_phy_sfp_intel:
849 case ixgbe_phy_sfp_unknown:
850 case ixgbe_phy_sfp_passive_tyco:
851 case ixgbe_phy_sfp_passive_unknown:
852 case ixgbe_phy_sfp_active_unknown:
853 case ixgbe_phy_sfp_ftl_active:
854 return true;
855 case ixgbe_phy_nl:
856 if (hw->mac.type == ixgbe_mac_82598EB)
857 return true;
858 default:
859 return false;
860 }
861 }
862
863
864 /**
865 * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset
866 * @adapter: board private structure
867 *
868 * On a reset we need to clear out the VF stats or accounting gets
869 * messed up because they're not clear on read.
870 **/
871 void ixgbe_clear_vf_stats_counters(struct ixgbe_adapter *adapter)
872 {
873 struct ixgbe_hw *hw = &adapter->hw;
874 int i;
875
876 for (i = 0; i < adapter->num_vfs; i++) {
877 adapter->vfinfo[i].last_vfstats.gprc =
878 IXGBE_READ_REG(hw, IXGBE_PVFGPRC(i));
879 adapter->vfinfo[i].saved_rst_vfstats.gprc +=
880 adapter->vfinfo[i].vfstats.gprc;
881 adapter->vfinfo[i].vfstats.gprc = 0;
882 adapter->vfinfo[i].last_vfstats.gptc =
883 IXGBE_READ_REG(hw, IXGBE_PVFGPTC(i));
884 adapter->vfinfo[i].saved_rst_vfstats.gptc +=
885 adapter->vfinfo[i].vfstats.gptc;
886 adapter->vfinfo[i].vfstats.gptc = 0;
887 adapter->vfinfo[i].last_vfstats.gorc =
888 IXGBE_READ_REG(hw, IXGBE_PVFGORC_LSB(i));
889 adapter->vfinfo[i].saved_rst_vfstats.gorc +=
890 adapter->vfinfo[i].vfstats.gorc;
891 adapter->vfinfo[i].vfstats.gorc = 0;
892 adapter->vfinfo[i].last_vfstats.gotc =
893 IXGBE_READ_REG(hw, IXGBE_PVFGOTC_LSB(i));
894 adapter->vfinfo[i].saved_rst_vfstats.gotc +=
895 adapter->vfinfo[i].vfstats.gotc;
896 adapter->vfinfo[i].vfstats.gotc = 0;
897 adapter->vfinfo[i].last_vfstats.mprc =
898 IXGBE_READ_REG(hw, IXGBE_PVFMPRC(i));
899 adapter->vfinfo[i].saved_rst_vfstats.mprc +=
900 adapter->vfinfo[i].vfstats.mprc;
901 adapter->vfinfo[i].vfstats.mprc = 0;
902 }
903 }
904
905
906
907 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
908 {
909 #ifdef NO_VNIC
910 WARN_ON(in_interrupt());
911 /* put off any impending NetWatchDogTimeout */
912 adapter->netdev->trans_start = jiffies;
913
914 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
915 usleep_range(1000, 2000);
916 ixgbe_down(adapter);
917 /*
918 * If SR-IOV enabled then wait a bit before bringing the adapter
919 * back up to give the VFs time to respond to the reset. The
920 * two second wait is based upon the watchdog timer cycle in
921 * the VF driver.
922 */
923 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
924 msleep(2000);
925 ixgbe_up(adapter);
926 clear_bit(__IXGBE_RESETTING, &adapter->state);
927 #endif
928 }
929
930 void ixgbe_up(struct ixgbe_adapter *adapter)
931 {
932 /* hardware has been reset, we need to reload some things */
933 //ixgbe_configure(adapter);
934
935 //ixgbe_up_complete(adapter);
936 }
937
938 void ixgbe_reset(struct ixgbe_adapter *adapter)
939 {
940 struct ixgbe_hw *hw = &adapter->hw;
941 struct net_device *netdev = adapter->netdev;
942 int err;
943
944 /* lock SFP init bit to prevent race conditions with the watchdog */
945 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
946 usleep_range(1000, 2000);
947
948 /* clear all SFP and link config related flags while holding SFP_INIT */
949 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
950 IXGBE_FLAG2_SFP_NEEDS_RESET);
951 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
952
953 err = hw->mac.ops.init_hw(hw);
954 switch (err) {
955 case 0:
956 case IXGBE_ERR_SFP_NOT_PRESENT:
957 case IXGBE_ERR_SFP_NOT_SUPPORTED:
958 break;
959 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
960 e_dev_err("master disable timed out\n");
961 break;
962 case IXGBE_ERR_EEPROM_VERSION:
963 /* We are running on a pre-production device, log a warning */
964 e_dev_warn("This device is a pre-production adapter/LOM. "
965 "Please be aware there may be issues associated "
966 "with your hardware. If you are experiencing "
967 "problems please contact your Intel or hardware "
968 "representative who provided you with this "
969 "hardware.\n");
970 break;
971 default:
972 e_dev_err("Hardware Error: %d\n", err);
973 }
974
975 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
976
977 ixgbe_flush_sw_mac_table(adapter);
978 memcpy(&adapter->mac_table[0].addr, hw->mac.perm_addr,
979 netdev->addr_len);
980 adapter->mac_table[0].queue = adapter->num_vfs;
981 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
982 IXGBE_MAC_STATE_IN_USE);
983 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
984 adapter->mac_table[0].queue,
985 IXGBE_RAH_AV);
986 }
987
988
989
990
991
992
993 void ixgbe_down(struct ixgbe_adapter *adapter)
994 {
995 #ifdef NO_VNIC
996 struct net_device *netdev = adapter->netdev;
997 struct ixgbe_hw *hw = &adapter->hw;
998 u32 rxctrl;
999 int i;
1000
1001 /* signal that we are down to the interrupt handler */
1002 set_bit(__IXGBE_DOWN, &adapter->state);
1003
1004 /* disable receives */
1005 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1006 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1007
1008 /* disable all enabled rx queues */
1009 for (i = 0; i < adapter->num_rx_queues; i++)
1010 /* this call also flushes the previous write */
1011 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
1012
1013 usleep_range(10000, 20000);
1014
1015 netif_tx_stop_all_queues(netdev);
1016
1017 /* call carrier off first to avoid false dev_watchdog timeouts */
1018 netif_carrier_off(netdev);
1019 netif_tx_disable(netdev);
1020
1021 ixgbe_irq_disable(adapter);
1022
1023 ixgbe_napi_disable_all(adapter);
1024
1025 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
1026 IXGBE_FLAG2_RESET_REQUESTED);
1027 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
1028
1029 del_timer_sync(&adapter->service_timer);
1030
1031 if (adapter->num_vfs) {
1032 /* Clear EITR Select mapping */
1033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
1034
1035 /* Mark all the VFs as inactive */
1036 for (i = 0 ; i < adapter->num_vfs; i++)
1037 adapter->vfinfo[i].clear_to_send = 0;
1038
1039 /* ping all the active vfs to let them know we are going down */
1040 ixgbe_ping_all_vfs(adapter);
1041
1042 /* Disable all VFTE/VFRE TX/RX */
1043 ixgbe_disable_tx_rx(adapter);
1044 }
1045
1046 /* disable transmits in the hardware now that interrupts are off */
1047 for (i = 0; i < adapter->num_tx_queues; i++) {
1048 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
1049 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1050 }
1051
1052 /* Disable the Tx DMA engine on 82599 and X540 */
1053 switch (hw->mac.type) {
1054 case ixgbe_mac_82599EB:
1055 case ixgbe_mac_X540:
1056 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
1057 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
1058 ~IXGBE_DMATXCTL_TE));
1059 break;
1060 default:
1061 break;
1062 }
1063
1064 #ifdef HAVE_PCI_ERS
1065 if (!pci_channel_offline(adapter->pdev))
1066 #endif
1067 ixgbe_reset(adapter);
1068 /* power down the optics */
1069 if ((hw->phy.multispeed_fiber) ||
1070 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
1071 (hw->mac.type == ixgbe_mac_82599EB)))
1072 ixgbe_disable_tx_laser(hw);
1073
1074 ixgbe_clean_all_tx_rings(adapter);
1075 ixgbe_clean_all_rx_rings(adapter);
1076
1077 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1078 /* since we reset the hardware DCA settings were cleared */
1079 ixgbe_setup_dca(adapter);
1080 #endif
1081
1082 #endif /* NO_VNIC */
1083 }
1084
1085 #ifndef NO_VNIC
1086
1087 #undef IXGBE_FCOE
1088
1089 /* Artificial max queue cap per traffic class in DCB mode */
1090 #define DCB_QUEUE_CAP 8
1091
1092 /**
1093 * ixgbe_set_dcb_queues: Allocate queues for a DCB-enabled device
1094 * @adapter: board private structure to initialize
1095 *
1096 * When DCB (Data Center Bridging) is enabled, allocate queues for
1097 * each traffic class. If multiqueue isn't available,then abort DCB
1098 * initialization.
1099 *
1100 * This function handles all combinations of DCB, RSS, and FCoE.
1101 *
1102 **/
1103 static bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
1104 {
1105 int tcs;
1106 #ifdef HAVE_MQPRIO
1107 int rss_i, i, offset = 0;
1108 struct net_device *dev = adapter->netdev;
1109
1110 /* Map queue offset and counts onto allocated tx queues */
1111 tcs = netdev_get_num_tc(dev);
1112
1113 if (!tcs)
1114 return false;
1115
1116 rss_i = min_t(int, dev->num_tx_queues / tcs, num_online_cpus());
1117
1118 if (rss_i > DCB_QUEUE_CAP)
1119 rss_i = DCB_QUEUE_CAP;
1120
1121 for (i = 0; i < tcs; i++) {
1122 netdev_set_tc_queue(dev, i, rss_i, offset);
1123 offset += rss_i;
1124 }
1125
1126 adapter->num_tx_queues = rss_i * tcs;
1127 adapter->num_rx_queues = rss_i * tcs;
1128
1129 #ifdef IXGBE_FCOE
1130 /* FCoE enabled queues require special configuration indexed
1131 * by feature specific indices and mask. Here we map FCoE
1132 * indices onto the DCB queue pairs allowing FCoE to own
1133 * configuration later.
1134 */
1135
1136 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1137 struct ixgbe_ring_feature *f;
1138 int tc;
1139 u8 prio_tc[IXGBE_DCB_MAX_USER_PRIORITY] = {0};
1140
1141 ixgbe_dcb_unpack_map_cee(&adapter->dcb_cfg,
1142 IXGBE_DCB_TX_CONFIG,
1143 prio_tc);
1144 tc = prio_tc[adapter->fcoe.up];
1145
1146 f = &adapter->ring_feature[RING_F_FCOE];
1147 f->indices = min_t(int, rss_i, f->indices);
1148 f->mask = rss_i * tc;
1149 }
1150 #endif /* IXGBE_FCOE */
1151 #else
1152 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
1153 return false;
1154
1155 /* Enable one Queue per traffic class */
1156 tcs = adapter->tc;
1157 if (!tcs)
1158 return false;
1159
1160 #ifdef IXGBE_FCOE
1161 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1162 struct ixgbe_ring_feature *f;
1163 int tc = netdev_get_prio_tc_map(adapter->netdev,
1164 adapter->fcoe.up);
1165
1166 f = &adapter->ring_feature[RING_F_FCOE];
1167
1168 /*
1169 * We have max 8 queues for FCoE, where 8 the is
1170 * FCoE redirection table size. We must also share
1171 * ring resources with network traffic so if FCoE TC is
1172 * 4 or greater and we are in 8 TC mode we can only use
1173 * 7 queues.
1174 */
1175 if ((tcs > 4) && (tc >= 4) && (f->indices > 7))
1176 f->indices = 7;
1177
1178 f->indices = min_t(int, num_online_cpus(), f->indices);
1179 f->mask = tcs;
1180
1181 adapter->num_rx_queues = f->indices + tcs;
1182 adapter->num_tx_queues = f->indices + tcs;
1183
1184 return true;
1185 }
1186
1187 #endif /* IXGBE_FCOE */
1188 adapter->num_rx_queues = tcs;
1189 adapter->num_tx_queues = tcs;
1190 #endif /* HAVE_MQ */
1191
1192 return true;
1193 }
1194
1195 /**
1196 * ixgbe_set_vmdq_queues: Allocate queues for VMDq devices
1197 * @adapter: board private structure to initialize
1198 *
1199 * When VMDq (Virtual Machine Devices queue) is enabled, allocate queues
1200 * and VM pools where appropriate. If RSS is available, then also try and
1201 * enable RSS and map accordingly.
1202 *
1203 **/
1204 static bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter)
1205 {
1206 int vmdq_i = adapter->ring_feature[RING_F_VMDQ].indices;
1207 int vmdq_m = 0;
1208 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
1209 unsigned long i;
1210 int rss_shift;
1211 bool ret = false;
1212
1213
1214 switch (adapter->flags & (IXGBE_FLAG_RSS_ENABLED
1215 | IXGBE_FLAG_DCB_ENABLED
1216 | IXGBE_FLAG_VMDQ_ENABLED)) {
1217
1218 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED):
1219 switch (adapter->hw.mac.type) {
1220 case ixgbe_mac_82599EB:
1221 case ixgbe_mac_X540:
1222 vmdq_i = min((int)IXGBE_MAX_VMDQ_INDICES, vmdq_i);
1223 if (vmdq_i > 32)
1224 rss_i = 2;
1225 else
1226 rss_i = 4;
1227 i = rss_i;
1228 rss_shift = find_first_bit(&i, sizeof(i) * 8);
1229 vmdq_m = ((IXGBE_MAX_VMDQ_INDICES - 1) <<
1230 rss_shift) & (MAX_RX_QUEUES - 1);
1231 break;
1232 default:
1233 break;
1234 }
1235 adapter->num_rx_queues = vmdq_i * rss_i;
1236 adapter->num_tx_queues = min((int)MAX_TX_QUEUES, vmdq_i * rss_i);
1237 ret = true;
1238 break;
1239
1240 case (IXGBE_FLAG_VMDQ_ENABLED):
1241 switch (adapter->hw.mac.type) {
1242 case ixgbe_mac_82598EB:
1243 vmdq_m = (IXGBE_MAX_VMDQ_INDICES - 1);
1244 break;
1245 case ixgbe_mac_82599EB:
1246 case ixgbe_mac_X540:
1247 vmdq_m = (IXGBE_MAX_VMDQ_INDICES - 1) << 1;
1248 break;
1249 default:
1250 break;
1251 }
1252 adapter->num_rx_queues = vmdq_i;
1253 adapter->num_tx_queues = vmdq_i;
1254 ret = true;
1255 break;
1256
1257 default:
1258 ret = false;
1259 goto vmdq_queues_out;
1260 }
1261
1262 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1263 adapter->num_rx_pools = vmdq_i;
1264 adapter->num_rx_queues_per_pool = adapter->num_rx_queues /
1265 vmdq_i;
1266 } else {
1267 adapter->num_rx_pools = adapter->num_rx_queues;
1268 adapter->num_rx_queues_per_pool = 1;
1269 }
1270 /* save the mask for later use */
1271 adapter->ring_feature[RING_F_VMDQ].mask = vmdq_m;
1272 vmdq_queues_out:
1273 return ret;
1274 }
1275
1276 /**
1277 * ixgbe_set_rss_queues: Allocate queues for RSS
1278 * @adapter: board private structure to initialize
1279 *
1280 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1281 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1282 *
1283 **/
1284 static bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
1285 {
1286 struct ixgbe_ring_feature *f;
1287
1288 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
1289 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
1290 return false;
1291 }
1292
1293 /* set mask for 16 queue limit of RSS */
1294 f = &adapter->ring_feature[RING_F_RSS];
1295 f->mask = 0xF;
1296
1297 /*
1298 * Use Flow Director in addition to RSS to ensure the best
1299 * distribution of flows across cores, even when an FDIR flow
1300 * isn't matched.
1301 */
1302 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
1303 f = &adapter->ring_feature[RING_F_FDIR];
1304
1305 f->indices = min_t(int, num_online_cpus(), f->indices);
1306 f->mask = 0;
1307 }
1308
1309 adapter->num_rx_queues = f->indices;
1310 #ifdef HAVE_TX_MQ
1311 adapter->num_tx_queues = f->indices;
1312 #endif
1313
1314 return true;
1315 }
1316
1317 #ifdef IXGBE_FCOE
1318 /**
1319 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
1320 * @adapter: board private structure to initialize
1321 *
1322 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
1323 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
1324 * rx queues out of the max number of rx queues, instead, it is used as the
1325 * index of the first rx queue used by FCoE.
1326 *
1327 **/
1328 static bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
1329 {
1330 struct ixgbe_ring_feature *f;
1331
1332 if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
1333 return false;
1334
1335 ixgbe_set_rss_queues(adapter);
1336
1337 f = &adapter->ring_feature[RING_F_FCOE];
1338 f->indices = min_t(int, num_online_cpus(), f->indices);
1339
1340 /* adding FCoE queues */
1341 f->mask = adapter->num_rx_queues;
1342 adapter->num_rx_queues += f->indices;
1343 adapter->num_tx_queues += f->indices;
1344
1345 return true;
1346 }
1347
1348 #endif /* IXGBE_FCOE */
1349 /*
1350 * ixgbe_set_num_queues: Allocate queues for device, feature dependent
1351 * @adapter: board private structure to initialize
1352 *
1353 * This is the top level queue allocation routine. The order here is very
1354 * important, starting with the "most" number of features turned on at once,
1355 * and ending with the smallest set of features. This way large combinations
1356 * can be allocated if they're turned on, and smaller combinations are the
1357 * fallthrough conditions.
1358 *
1359 **/
1360 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
1361 {
1362 /* Start with base case */
1363 adapter->num_rx_queues = 1;
1364 adapter->num_tx_queues = 1;
1365 adapter->num_rx_pools = adapter->num_rx_queues;
1366 adapter->num_rx_queues_per_pool = 1;
1367
1368 if (ixgbe_set_vmdq_queues(adapter))
1369 return;
1370
1371 if (ixgbe_set_dcb_queues(adapter))
1372 return;
1373
1374 #ifdef IXGBE_FCOE
1375 if (ixgbe_set_fcoe_queues(adapter))
1376 return;
1377
1378 #endif /* IXGBE_FCOE */
1379 ixgbe_set_rss_queues(adapter);
1380 }
1381
1382 #endif
1383
1384
1385 /**
1386 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1387 * @adapter: board private structure to initialize
1388 *
1389 * ixgbe_sw_init initializes the Adapter private data structure.
1390 * Fields are initialized based on PCI device information and
1391 * OS network device settings (MTU size).
1392 **/
1393 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
1394 {
1395 struct ixgbe_hw *hw = &adapter->hw;
1396 struct pci_dev *pdev = adapter->pdev;
1397 int err;
1398
1399 /* PCI config space info */
1400
1401 hw->vendor_id = pdev->vendor;
1402 hw->device_id = pdev->device;
1403 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1404 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1405 hw->subsystem_device_id = pdev->subsystem_device;
1406
1407 err = ixgbe_init_shared_code(hw);
1408 if (err) {
1409 e_err(probe, "init_shared_code failed: %d\n", err);
1410 goto out;
1411 }
1412 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
1413 hw->mac.num_rar_entries,
1414 GFP_ATOMIC);
1415 /* Set capability flags */
1416 switch (hw->mac.type) {
1417 case ixgbe_mac_82598EB:
1418 adapter->flags |= IXGBE_FLAG_MSI_CAPABLE |
1419 IXGBE_FLAG_MSIX_CAPABLE |
1420 IXGBE_FLAG_MQ_CAPABLE |
1421 IXGBE_FLAG_RSS_CAPABLE;
1422 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
1423 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1424 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
1425 #endif
1426 adapter->flags &= ~IXGBE_FLAG_SRIOV_CAPABLE;
1427 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
1428
1429 if (hw->device_id == IXGBE_DEV_ID_82598AT)
1430 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
1431
1432 adapter->max_msix_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82598;
1433 break;
1434 case ixgbe_mac_X540:
1435 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
1436 case ixgbe_mac_82599EB:
1437 adapter->flags |= IXGBE_FLAG_MSI_CAPABLE |
1438 IXGBE_FLAG_MSIX_CAPABLE |
1439 IXGBE_FLAG_MQ_CAPABLE |
1440 IXGBE_FLAG_RSS_CAPABLE;
1441 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
1442 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1443 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
1444 #endif
1445 adapter->flags |= IXGBE_FLAG_SRIOV_CAPABLE;
1446 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
1447 #ifdef IXGBE_FCOE
1448 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
1449 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
1450 adapter->ring_feature[RING_F_FCOE].indices = 0;
1451 #ifdef CONFIG_DCB
1452 /* Default traffic class to use for FCoE */
1453 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
1454 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
1455 adapter->fcoe.up_set = IXGBE_FCOE_DEFTC;
1456 #endif
1457 #endif
1458 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
1459 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
1460 #ifndef IXGBE_NO_SMART_SPEED
1461 hw->phy.smart_speed = ixgbe_smart_speed_on;
1462 #else
1463 hw->phy.smart_speed = ixgbe_smart_speed_off;
1464 #endif
1465 adapter->max_msix_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82599;
1466 default:
1467 break;
1468 }
1469
1470 /* n-tuple support exists, always init our spinlock */
1471 //spin_lock_init(&adapter->fdir_perfect_lock);
1472
1473 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) {
1474 int j;
1475 struct ixgbe_dcb_tc_config *tc;
1476 int dcb_i = IXGBE_DCB_MAX_TRAFFIC_CLASS;
1477
1478
1479 adapter->dcb_cfg.num_tcs.pg_tcs = dcb_i;
1480 adapter->dcb_cfg.num_tcs.pfc_tcs = dcb_i;
1481 for (j = 0; j < dcb_i; j++) {
1482 tc = &adapter->dcb_cfg.tc_config[j];
1483 tc->path[IXGBE_DCB_TX_CONFIG].bwg_id = 0;
1484 tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = 100 / dcb_i;
1485 tc->path[IXGBE_DCB_RX_CONFIG].bwg_id = 0;
1486 tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = 100 / dcb_i;
1487 tc->pfc = ixgbe_dcb_pfc_disabled;
1488 if (j == 0) {
1489 /* total of all TCs bandwidth needs to be 100 */
1490 tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent +=
1491 100 % dcb_i;
1492 tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent +=
1493 100 % dcb_i;
1494 }
1495 }
1496
1497 /* Initialize default user to priority mapping, UPx->TC0 */
1498 tc = &adapter->dcb_cfg.tc_config[0];
1499 tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
1500 tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
1501
1502 adapter->dcb_cfg.bw_percentage[IXGBE_DCB_TX_CONFIG][0] = 100;
1503 adapter->dcb_cfg.bw_percentage[IXGBE_DCB_RX_CONFIG][0] = 100;
1504 adapter->dcb_cfg.rx_pba_cfg = ixgbe_dcb_pba_equal;
1505 adapter->dcb_cfg.pfc_mode_enable = false;
1506 adapter->dcb_cfg.round_robin_enable = false;
1507 adapter->dcb_set_bitmap = 0x00;
1508 #ifdef CONFIG_DCB
1509 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
1510 #endif /* CONFIG_DCB */
1511
1512 if (hw->mac.type == ixgbe_mac_X540) {
1513 adapter->dcb_cfg.num_tcs.pg_tcs = 4;
1514 adapter->dcb_cfg.num_tcs.pfc_tcs = 4;
1515 }
1516 }
1517 #ifdef CONFIG_DCB
1518 /* XXX does this need to be initialized even w/o DCB? */
1519 //memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
1520 // sizeof(adapter->temp_dcb_cfg));
1521
1522 #endif
1523 //if (hw->mac.type == ixgbe_mac_82599EB ||
1524 // hw->mac.type == ixgbe_mac_X540)
1525 // hw->mbx.ops.init_params(hw);
1526
1527 /* default flow control settings */
1528 hw->fc.requested_mode = ixgbe_fc_full;
1529 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
1530
1531 adapter->last_lfc_mode = hw->fc.current_mode;
1532 ixgbe_pbthresh_setup(adapter);
1533 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
1534 hw->fc.send_xon = true;
1535 hw->fc.disable_fc_autoneg = false;
1536
1537 /* set default ring sizes */
1538 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
1539 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
1540
1541 /* set default work limits */
1542 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
1543 adapter->rx_work_limit = IXGBE_DEFAULT_RX_WORK;
1544
1545 set_bit(__IXGBE_DOWN, &adapter->state);
1546 out:
1547 return err;
1548 }
1549
1550 /**
1551 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1552 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1553 *
1554 * Return 0 on success, negative on failure
1555 **/
1556 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
1557 {
1558 struct device *dev = tx_ring->dev;
1559 //int orig_node = dev_to_node(dev);
1560 int numa_node = -1;
1561 int size;
1562
1563 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1564
1565 if (tx_ring->q_vector)
1566 numa_node = tx_ring->q_vector->numa_node;
1567
1568 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
1569 if (!tx_ring->tx_buffer_info)
1570 tx_ring->tx_buffer_info = vzalloc(size);
1571 if (!tx_ring->tx_buffer_info)
1572 goto err;
1573
1574 /* round up to nearest 4K */
1575 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
1576 tx_ring->size = ALIGN(tx_ring->size, 4096);
1577
1578 //set_dev_node(dev, numa_node);
1579 //tx_ring->desc = dma_alloc_coherent(dev,
1580 // tx_ring->size,
1581 // &tx_ring->dma,
1582 // GFP_KERNEL);
1583 //set_dev_node(dev, orig_node);
1584 //if (!tx_ring->desc)
1585 // tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
1586 // &tx_ring->dma, GFP_KERNEL);
1587 //if (!tx_ring->desc)
1588 // goto err;
1589
1590 return 0;
1591
1592 err:
1593 vfree(tx_ring->tx_buffer_info);
1594 tx_ring->tx_buffer_info = NULL;
1595 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
1596 return -ENOMEM;
1597 }
1598
1599 /**
1600 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
1601 * @adapter: board private structure
1602 *
1603 * If this function returns with an error, then it's possible one or
1604 * more of the rings is populated (while the rest are not). It is the
1605 * callers duty to clean those orphaned rings.
1606 *
1607 * Return 0 on success, negative on failure
1608 **/
1609 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1610 {
1611 int i, err = 0;
1612
1613 for (i = 0; i < adapter->num_tx_queues; i++) {
1614 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
1615 if (!err)
1616 continue;
1617 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
1618 break;
1619 }
1620
1621 return err;
1622 }
1623
1624 /**
1625 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1626 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1627 *
1628 * Returns 0 on success, negative on failure
1629 **/
1630 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
1631 {
1632 struct device *dev = rx_ring->dev;
1633 //int orig_node = dev_to_node(dev);
1634 int numa_node = -1;
1635 int size;
1636
1637 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1638
1639 if (rx_ring->q_vector)
1640 numa_node = rx_ring->q_vector->numa_node;
1641
1642 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
1643 if (!rx_ring->rx_buffer_info)
1644 rx_ring->rx_buffer_info = vzalloc(size);
1645 if (!rx_ring->rx_buffer_info)
1646 goto err;
1647
1648 /* Round up to nearest 4K */
1649 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
1650 rx_ring->size = ALIGN(rx_ring->size, 4096);
1651
1652 #ifdef NO_VNIC
1653 set_dev_node(dev, numa_node);
1654 rx_ring->desc = dma_alloc_coherent(dev,
1655 rx_ring->size,
1656 &rx_ring->dma,
1657 GFP_KERNEL);
1658 set_dev_node(dev, orig_node);
1659 if (!rx_ring->desc)
1660 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
1661 &rx_ring->dma, GFP_KERNEL);
1662 if (!rx_ring->desc)
1663 goto err;
1664
1665 #ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT
1666 ixgbe_init_rx_page_offset(rx_ring);
1667
1668 #endif
1669
1670 #endif /* NO_VNIC */
1671 return 0;
1672 err:
1673 vfree(rx_ring->rx_buffer_info);
1674 rx_ring->rx_buffer_info = NULL;
1675 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
1676 return -ENOMEM;
1677 }
1678
1679 /**
1680 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
1681 * @adapter: board private structure
1682 *
1683 * If this function returns with an error, then it's possible one or
1684 * more of the rings is populated (while the rest are not). It is the
1685 * callers duty to clean those orphaned rings.
1686 *
1687 * Return 0 on success, negative on failure
1688 **/
1689 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1690 {
1691 int i, err = 0;
1692
1693 for (i = 0; i < adapter->num_rx_queues; i++) {
1694 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
1695 if (!err)
1696 continue;
1697 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
1698 break;
1699 }
1700
1701 return err;
1702 }
1703
1704 /**
1705 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1706 * @tx_ring: Tx descriptor ring for a specific queue
1707 *
1708 * Free all transmit software resources
1709 **/
1710 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
1711 {
1712 //ixgbe_clean_tx_ring(tx_ring);
1713
1714 vfree(tx_ring->tx_buffer_info);
1715 tx_ring->tx_buffer_info = NULL;
1716
1717 /* if not set, then don't free */
1718 if (!tx_ring->desc)
1719 return;
1720
1721 //dma_free_coherent(tx_ring->dev, tx_ring->size,
1722 // tx_ring->desc, tx_ring->dma);
1723
1724 tx_ring->desc = NULL;
1725 }
1726
1727 /**
1728 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1729 * @adapter: board private structure
1730 *
1731 * Free all transmit software resources
1732 **/
1733 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1734 {
1735 int i;
1736
1737 for (i = 0; i < adapter->num_tx_queues; i++)
1738 if (adapter->tx_ring[i]->desc)
1739 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1740 }
1741
1742 /**
1743 * ixgbe_free_rx_resources - Free Rx Resources
1744 * @rx_ring: ring to clean the resources from
1745 *
1746 * Free all receive software resources
1747 **/
1748 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
1749 {
1750 //ixgbe_clean_rx_ring(rx_ring);
1751
1752 vfree(rx_ring->rx_buffer_info);
1753 rx_ring->rx_buffer_info = NULL;
1754
1755 /* if not set, then don't free */
1756 if (!rx_ring->desc)
1757 return;
1758
1759 //dma_free_coherent(rx_ring->dev, rx_ring->size,
1760 // rx_ring->desc, rx_ring->dma);
1761
1762 rx_ring->desc = NULL;
1763 }
1764
1765 /**
1766 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1767 * @adapter: board private structure
1768 *
1769 * Free all receive software resources
1770 **/
1771 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1772 {
1773 int i;
1774
1775 for (i = 0; i < adapter->num_rx_queues; i++)
1776 if (adapter->rx_ring[i]->desc)
1777 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1778 }
1779
1780
1781 /**
1782 * ixgbe_open - Called when a network interface is made active
1783 * @netdev: network interface device structure
1784 *
1785 * Returns 0 on success, negative value on failure
1786 *
1787 * The open entry point is called when a network interface is made
1788 * active by the system (IFF_UP). At this point all resources needed
1789 * for transmit and receive operations are allocated, the interrupt
1790 * handler is registered with the OS, the watchdog timer is started,
1791 * and the stack is notified that the interface is ready.
1792 **/
1793 //static
1794 int ixgbe_open(struct net_device *netdev)
1795 {
1796 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1797 int err;
1798
1799 /* disallow open during test */
1800 if (test_bit(__IXGBE_TESTING, &adapter->state))
1801 return -EBUSY;
1802
1803 netif_carrier_off(netdev);
1804
1805 /* allocate transmit descriptors */
1806 err = ixgbe_setup_all_tx_resources(adapter);
1807 if (err)
1808 goto err_setup_tx;
1809
1810 /* allocate receive descriptors */
1811 err = ixgbe_setup_all_rx_resources(adapter);
1812 if (err)
1813 goto err_setup_rx;
1814
1815 #ifdef NO_VNIC
1816 ixgbe_configure(adapter);
1817
1818 err = ixgbe_request_irq(adapter);
1819 if (err)
1820 goto err_req_irq;
1821
1822 ixgbe_up_complete(adapter);
1823
1824 err_req_irq:
1825 #else
1826 return 0;
1827 #endif
1828 err_setup_rx:
1829 ixgbe_free_all_rx_resources(adapter);
1830 err_setup_tx:
1831 ixgbe_free_all_tx_resources(adapter);
1832 ixgbe_reset(adapter);
1833
1834 return err;
1835 }
1836
1837 /**
1838 * ixgbe_close - Disables a network interface
1839 * @netdev: network interface device structure
1840 *
1841 * Returns 0, this is not allowed to fail
1842 *
1843 * The close entry point is called when an interface is de-activated
1844 * by the OS. The hardware is still under the drivers control, but
1845 * needs to be disabled. A global MAC reset is issued to stop the
1846 * hardware, and all transmit and receive resources are freed.
1847 **/
1848 //static
1849 int ixgbe_close(struct net_device *netdev)
1850 {
1851 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1852
1853 //ixgbe_down(adapter);
1854 //ixgbe_free_irq(adapter);
1855
1856 //ixgbe_fdir_filter_exit(adapter);
1857
1858 //ixgbe_free_all_tx_resources(adapter);
1859 //ixgbe_free_all_rx_resources(adapter);
1860
1861 ixgbe_release_hw_control(adapter);
1862
1863 return 0;
1864 }
1865
1866
1867
1868
1869
1870 /**
1871 * ixgbe_get_stats - Get System Network Statistics
1872 * @netdev: network interface device structure
1873 *
1874 * Returns the address of the device statistics structure.
1875 * The statistics are actually updated from the timer callback.
1876 **/
1877 //static
1878 struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
1879 {
1880 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1881
1882 /* update the stats data */
1883 ixgbe_update_stats(adapter);
1884
1885 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
1886 /* only return the current stats */
1887 return &netdev->stats;
1888 #else
1889 /* only return the current stats */
1890 return &adapter->net_stats;
1891 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
1892 }
1893
1894 /**
1895 * ixgbe_update_stats - Update the board statistics counters.
1896 * @adapter: board private structure
1897 **/
1898 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1899 {
1900 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
1901 struct net_device_stats *net_stats = &adapter->netdev->stats;
1902 #else
1903 struct net_device_stats *net_stats = &adapter->net_stats;
1904 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
1905 struct ixgbe_hw *hw = &adapter->hw;
1906 struct ixgbe_hw_stats *hwstats = &adapter->stats;
1907 u64 total_mpc = 0;
1908 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
1909 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
1910 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
1911 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
1912 #ifndef IXGBE_NO_LRO
1913 u32 flushed = 0, coal = 0;
1914 int num_q_vectors = 1;
1915 #endif
1916 #ifdef IXGBE_FCOE
1917 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
1918 unsigned int cpu;
1919 u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
1920 #endif /* IXGBE_FCOE */
1921
1922 printk(KERN_DEBUG "ixgbe_update_stats, tx_queues=%d, rx_queues=%d\n",
1923 adapter->num_tx_queues, adapter->num_rx_queues);
1924
1925 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
1926 test_bit(__IXGBE_RESETTING, &adapter->state))
1927 return;
1928
1929 #ifndef IXGBE_NO_LRO
1930 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1931 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1932
1933 #endif
1934 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
1935 u64 rsc_count = 0;
1936 u64 rsc_flush = 0;
1937 for (i = 0; i < adapter->num_rx_queues; i++) {
1938 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
1939 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
1940 }
1941 adapter->rsc_total_count = rsc_count;
1942 adapter->rsc_total_flush = rsc_flush;
1943 }
1944
1945 #ifndef IXGBE_NO_LRO
1946 for (i = 0; i < num_q_vectors; i++) {
1947 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
1948 if (!q_vector)
1949 continue;
1950 flushed += q_vector->lrolist.stats.flushed;
1951 coal += q_vector->lrolist.stats.coal;
1952 }
1953 adapter->lro_stats.flushed = flushed;
1954 adapter->lro_stats.coal = coal;
1955
1956 #endif
1957 for (i = 0; i < adapter->num_rx_queues; i++) {
1958 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
1959 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
1960 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
1961 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
1962 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
1963 bytes += rx_ring->stats.bytes;
1964 packets += rx_ring->stats.packets;
1965
1966 }
1967 adapter->non_eop_descs = non_eop_descs;
1968 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
1969 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
1970 adapter->hw_csum_rx_error = hw_csum_rx_error;
1971 net_stats->rx_bytes = bytes;
1972 net_stats->rx_packets = packets;
1973
1974 bytes = 0;
1975 packets = 0;
1976 /* gather some stats to the adapter struct that are per queue */
1977 for (i = 0; i < adapter->num_tx_queues; i++) {
1978 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1979 restart_queue += tx_ring->tx_stats.restart_queue;
1980 tx_busy += tx_ring->tx_stats.tx_busy;
1981 bytes += tx_ring->stats.bytes;
1982 packets += tx_ring->stats.packets;
1983 }
1984 adapter->restart_queue = restart_queue;
1985 adapter->tx_busy = tx_busy;
1986 net_stats->tx_bytes = bytes;
1987 net_stats->tx_packets = packets;
1988
1989 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1990
1991 /* 8 register reads */
1992 for (i = 0; i < 8; i++) {
1993 /* for packet buffers not used, the register should read 0 */
1994 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
1995 missed_rx += mpc;
1996 hwstats->mpc[i] += mpc;
1997 total_mpc += hwstats->mpc[i];
1998 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
1999 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
2000 switch (hw->mac.type) {
2001 case ixgbe_mac_82598EB:
2002 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2003 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
2004 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
2005 hwstats->pxonrxc[i] +=
2006 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
2007 break;
2008 case ixgbe_mac_82599EB:
2009 case ixgbe_mac_X540:
2010 hwstats->pxonrxc[i] +=
2011 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
2012 break;
2013 default:
2014 break;
2015 }
2016 }
2017
2018 /*16 register reads */
2019 for (i = 0; i < 16; i++) {
2020 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
2021 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
2022 if ((hw->mac.type == ixgbe_mac_82599EB) ||
2023 (hw->mac.type == ixgbe_mac_X540)) {
2024 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
2025 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
2026 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
2027 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
2028 }
2029 }
2030
2031 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2032 /* work around hardware counting issue */
2033 hwstats->gprc -= missed_rx;
2034
2035 ixgbe_update_xoff_received(adapter);
2036
2037 /* 82598 hardware only has a 32 bit counter in the high register */
2038 switch (hw->mac.type) {
2039 case ixgbe_mac_82598EB:
2040 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2041 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2042 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2043 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2044 break;
2045 case ixgbe_mac_X540:
2046 /* OS2BMC stats are X540 only*/
2047 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
2048 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
2049 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
2050 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
2051 case ixgbe_mac_82599EB:
2052 for (i = 0; i < 16; i++)
2053 adapter->hw_rx_no_dma_resources +=
2054 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
2055 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
2056 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
2057 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
2058 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
2059 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
2060 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
2061 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
2062 #ifdef HAVE_TX_MQ
2063 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
2064 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
2065 #endif /* HAVE_TX_MQ */
2066 #ifdef IXGBE_FCOE
2067 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
2068 hwstats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST);
2069 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
2070 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
2071 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
2072 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
2073 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
2074 /* Add up per cpu counters for total ddp aloc fail */
2075 if (fcoe && fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
2076 for_each_possible_cpu(cpu) {
2077 fcoe_noddp_counts_sum +=
2078 *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
2079 fcoe_noddp_ext_buff_counts_sum +=
2080 *per_cpu_ptr(fcoe->
2081 pcpu_noddp_ext_buff, cpu);
2082 }
2083 }
2084 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
2085 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
2086
2087 #endif /* IXGBE_FCOE */
2088 break;
2089 default:
2090 break;
2091 }
2092 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2093 hwstats->bprc += bprc;
2094 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2095 if (hw->mac.type == ixgbe_mac_82598EB)
2096 hwstats->mprc -= bprc;
2097 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2098 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2099 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2100 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2101 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2102 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2103 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2104 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2105 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2106 hwstats->lxontxc += lxon;
2107 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2108 hwstats->lxofftxc += lxoff;
2109 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2110 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2111 /*
2112 * 82598 errata - tx of flow control packets is included in tx counters
2113 */
2114 xon_off_tot = lxon + lxoff;
2115 hwstats->gptc -= xon_off_tot;
2116 hwstats->mptc -= xon_off_tot;
2117 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2118 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2119 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2120 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2121 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2122 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2123 hwstats->ptc64 -= xon_off_tot;
2124 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2125 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2126 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2127 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2128 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2129 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2130 /* Fill out the OS statistics structure */
2131 net_stats->multicast = hwstats->mprc;
2132
2133 /* Rx Errors */
2134 net_stats->rx_errors = hwstats->crcerrs +
2135 hwstats->rlec;
2136 net_stats->rx_dropped = 0;
2137 net_stats->rx_length_errors = hwstats->rlec;
2138 net_stats->rx_crc_errors = hwstats->crcerrs;
2139 net_stats->rx_missed_errors = total_mpc;
2140
2141 /*
2142 * VF Stats Collection - skip while resetting because these
2143 * are not clear on read and otherwise you'll sometimes get
2144 * crazy values.
2145 */
2146 if (!test_bit(__IXGBE_RESETTING, &adapter->state)) {
2147 for (i = 0; i < adapter->num_vfs; i++) {
2148 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPRC(i), \
2149 adapter->vfinfo[i].last_vfstats.gprc, \
2150 adapter->vfinfo[i].vfstats.gprc);
2151 UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPTC(i), \
2152 adapter->vfinfo[i].last_vfstats.gptc, \
2153 adapter->vfinfo[i].vfstats.gptc);
2154 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGORC_LSB(i), \
2155 IXGBE_PVFGORC_MSB(i), \
2156 adapter->vfinfo[i].last_vfstats.gorc, \
2157 adapter->vfinfo[i].vfstats.gorc);
2158 UPDATE_VF_COUNTER_36bit(IXGBE_PVFGOTC_LSB(i), \
2159 IXGBE_PVFGOTC_MSB(i), \
2160 adapter->vfinfo[i].last_vfstats.gotc, \
2161 adapter->vfinfo[i].vfstats.gotc);
2162 UPDATE_VF_COUNTER_32bit(IXGBE_PVFMPRC(i), \
2163 adapter->vfinfo[i].last_vfstats.mprc, \
2164 adapter->vfinfo[i].vfstats.mprc);
2165 }
2166 }
2167 }
2168
2169
2170 #ifdef NO_VNIC
2171
2172 /**
2173 * ixgbe_watchdog_update_link - update the link status
2174 * @adapter - pointer to the device adapter structure
2175 * @link_speed - pointer to a u32 to store the link_speed
2176 **/
2177 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
2178 {
2179 struct ixgbe_hw *hw = &adapter->hw;
2180 u32 link_speed = adapter->link_speed;
2181 bool link_up = adapter->link_up;
2182 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2183
2184 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
2185 return;
2186
2187 if (hw->mac.ops.check_link) {
2188 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2189 } else {
2190 /* always assume link is up, if no check link function */
2191 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2192 link_up = true;
2193 }
2194
2195 #ifdef HAVE_DCBNL_IEEE
2196 if (adapter->ixgbe_ieee_pfc)
2197 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2198
2199 #endif
2200 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
2201 hw->mac.ops.fc_enable(hw);
2202 //ixgbe_set_rx_drop_en(adapter);
2203 }
2204
2205 if (link_up ||
2206 time_after(jiffies, (adapter->link_check_timeout +
2207 IXGBE_TRY_LINK_TIMEOUT))) {
2208 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
2209 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
2210 IXGBE_WRITE_FLUSH(hw);
2211 }
2212
2213 adapter->link_up = link_up;
2214 adapter->link_speed = link_speed;
2215 }
2216 #endif
2217
2218
2219
2220 #ifdef NO_VNIC
2221
2222 /**
2223 * ixgbe_service_task - manages and runs subtasks
2224 * @work: pointer to work_struct containing our data
2225 **/
2226 static void ixgbe_service_task(struct work_struct *work)
2227 {
2228 //struct ixgbe_adapter *adapter = container_of(work,
2229 // struct ixgbe_adapter,
2230 // service_task);
2231
2232 //ixgbe_reset_subtask(adapter);
2233 //ixgbe_sfp_detection_subtask(adapter);
2234 //ixgbe_sfp_link_config_subtask(adapter);
2235 //ixgbe_check_overtemp_subtask(adapter);
2236 //ixgbe_watchdog_subtask(adapter);
2237 #ifdef HAVE_TX_MQ
2238 //ixgbe_fdir_reinit_subtask(adapter);
2239 #endif
2240 //ixgbe_check_hang_subtask(adapter);
2241
2242 //ixgbe_service_event_complete(adapter);
2243 }
2244
2245
2246
2247
2248 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
2249 IXGBE_TXD_CMD_RS)
2250
2251
2252 /**
2253 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2254 * @netdev: network interface device structure
2255 * @p: pointer to an address structure
2256 *
2257 * Returns 0 on success, negative on failure
2258 **/
2259 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2260 {
2261 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2262 struct ixgbe_hw *hw = &adapter->hw;
2263 struct sockaddr *addr = p;
2264 int ret;
2265
2266 if (!is_valid_ether_addr(addr->sa_data))
2267 return -EADDRNOTAVAIL;
2268
2269 ixgbe_del_mac_filter(adapter, hw->mac.addr,
2270 adapter->num_vfs);
2271 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2272 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
2273
2274
2275 /* set the correct pool for the new PF MAC address in entry 0 */
2276 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr,
2277 adapter->num_vfs);
2278 return ret > 0 ? 0 : ret;
2279 }
2280
2281
2282 /**
2283 * ixgbe_ioctl -
2284 * @netdev:
2285 * @ifreq:
2286 * @cmd:
2287 **/
2288 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2289 {
2290 switch (cmd) {
2291 #ifdef ETHTOOL_OPS_COMPAT
2292 case SIOCETHTOOL:
2293 return ethtool_ioctl(ifr);
2294 #endif
2295 default:
2296 return -EOPNOTSUPP;
2297 }
2298 }
2299 #endif /* NO_VNIC */
2300
2301
2302 void ixgbe_do_reset(struct net_device *netdev)
2303 {
2304 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2305
2306 if (netif_running(netdev))
2307 ixgbe_reinit_locked(adapter);
2308 else
2309 ixgbe_reset(adapter);
2310 }
2311
2312
2313
2314
2315
2316
2317 /**
2318 * ixgbe_probe - Device Initialization Routine
2319 * @pdev: PCI device information struct
2320 * @ent: entry in ixgbe_pci_tbl
2321 *
2322 * Returns 0 on success, negative on failure
2323 *
2324 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2325 * The OS initialization, configuring of the adapter private structure,
2326 * and a hardware reset occur.
2327 **/
2328 //static
2329 int ixgbe_kni_probe(struct pci_dev *pdev,
2330 struct net_device **lad_dev)
2331 {
2332 size_t count;
2333 struct net_device *netdev;
2334 struct ixgbe_adapter *adapter = NULL;
2335 struct ixgbe_hw *hw = NULL;
2336 static int cards_found;
2337 int i, err;
2338 u16 offset;
2339 u16 eeprom_verh, eeprom_verl, eeprom_cfg_blkh, eeprom_cfg_blkl;
2340 u32 etrack_id;
2341 u16 build, major, patch;
2342 char *info_string, *i_s_var;
2343 u8 part_str[IXGBE_PBANUM_LENGTH];
2344 enum ixgbe_mac_type mac_type = ixgbe_mac_unknown;
2345 #ifdef HAVE_TX_MQ
2346 unsigned int indices = num_possible_cpus();
2347 #endif /* HAVE_TX_MQ */
2348 #ifdef IXGBE_FCOE
2349 u16 device_caps;
2350 #endif
2351 u16 wol_cap;
2352
2353 err = pci_enable_device_mem(pdev);
2354 if (err)
2355 return err;
2356
2357
2358 #ifdef NO_VNIC
2359 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2360 IORESOURCE_MEM), ixgbe_driver_name);
2361 if (err) {
2362 dev_err(pci_dev_to_dev(pdev),
2363 "pci_request_selected_regions failed 0x%x\n", err);
2364 goto err_pci_reg;
2365 }
2366 #endif
2367
2368 /*
2369 * The mac_type is needed before we have the adapter is set up
2370 * so rather than maintain two devID -> MAC tables we dummy up
2371 * an ixgbe_hw stuct and use ixgbe_set_mac_type.
2372 */
2373 hw = vmalloc(sizeof(struct ixgbe_hw));
2374 if (!hw) {
2375 pr_info("Unable to allocate memory for early mac "
2376 "check\n");
2377 } else {
2378 hw->vendor_id = pdev->vendor;
2379 hw->device_id = pdev->device;
2380 ixgbe_set_mac_type(hw);
2381 mac_type = hw->mac.type;
2382 vfree(hw);
2383 }
2384
2385 #ifdef NO_VNIC
2386 /*
2387 * Workaround of Silicon errata on 82598. Disable LOs in the PCI switch
2388 * port to which the 82598 is connected to prevent duplicate
2389 * completions caused by LOs. We need the mac type so that we only
2390 * do this on 82598 devices, ixgbe_set_mac_type does this for us if
2391 * we set it's device ID.
2392 */
2393 if (mac_type == ixgbe_mac_82598EB)
2394 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2395
2396 pci_enable_pcie_error_reporting(pdev);
2397
2398 pci_set_master(pdev);
2399 #endif
2400
2401 #ifdef HAVE_TX_MQ
2402 #ifdef CONFIG_DCB
2403 #ifdef HAVE_MQPRIO
2404 indices *= IXGBE_DCB_MAX_TRAFFIC_CLASS;
2405 #else
2406 indices = max_t(unsigned int, indices, IXGBE_MAX_DCB_INDICES);
2407 #endif /* HAVE_MQPRIO */
2408 #endif /* CONFIG_DCB */
2409
2410 if (mac_type == ixgbe_mac_82598EB)
2411 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
2412 else
2413 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
2414
2415 #ifdef IXGBE_FCOE
2416 indices += min_t(unsigned int, num_possible_cpus(),
2417 IXGBE_MAX_FCOE_INDICES);
2418 #endif
2419 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
2420 #else /* HAVE_TX_MQ */
2421 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2422 #endif /* HAVE_TX_MQ */
2423 if (!netdev) {
2424 err = -ENOMEM;
2425 goto err_alloc_etherdev;
2426 }
2427
2428 SET_NETDEV_DEV(netdev, &pdev->dev);
2429
2430 adapter = netdev_priv(netdev);
2431 //pci_set_drvdata(pdev, adapter);
2432
2433 adapter->netdev = netdev;
2434 adapter->pdev = pdev;
2435 hw = &adapter->hw;
2436 hw->back = adapter;
2437 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2438
2439 #ifdef HAVE_PCI_ERS
2440 /*
2441 * call save state here in standalone driver because it relies on
2442 * adapter struct to exist, and needs to call netdev_priv
2443 */
2444 pci_save_state(pdev);
2445
2446 #endif
2447 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2448 pci_resource_len(pdev, 0));
2449 if (!hw->hw_addr) {
2450 err = -EIO;
2451 goto err_ioremap;
2452 }
2453 //ixgbe_assign_netdev_ops(netdev);
2454 ixgbe_set_ethtool_ops(netdev);
2455
2456 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
2457
2458 adapter->bd_number = cards_found;
2459
2460 /* setup the private structure */
2461 err = ixgbe_sw_init(adapter);
2462 if (err)
2463 goto err_sw_init;
2464
2465 /* Make it possible the adapter to be woken up via WOL */
2466 switch (adapter->hw.mac.type) {
2467 case ixgbe_mac_82599EB:
2468 case ixgbe_mac_X540:
2469 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
2470 break;
2471 default:
2472 break;
2473 }
2474
2475 /*
2476 * check_options must be called before setup_link to set up
2477 * hw->fc completely
2478 */
2479 //ixgbe_check_options(adapter);
2480
2481 #ifndef NO_VNIC
2482 /* reset_hw fills in the perm_addr as well */
2483 hw->phy.reset_if_overtemp = true;
2484 err = hw->mac.ops.reset_hw(hw);
2485 hw->phy.reset_if_overtemp = false;
2486 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
2487 hw->mac.type == ixgbe_mac_82598EB) {
2488 err = 0;
2489 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2490 e_dev_err("failed to load because an unsupported SFP+ "
2491 "module type was detected.\n");
2492 e_dev_err("Reload the driver after installing a supported "
2493 "module.\n");
2494 goto err_sw_init;
2495 } else if (err) {
2496 e_dev_err("HW Init failed: %d\n", err);
2497 goto err_sw_init;
2498 }
2499 #endif
2500
2501 //if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
2502 // ixgbe_probe_vf(adapter);
2503
2504
2505 #ifdef MAX_SKB_FRAGS
2506 netdev->features |= NETIF_F_SG |
2507 NETIF_F_IP_CSUM;
2508
2509 #ifdef NETIF_F_IPV6_CSUM
2510 netdev->features |= NETIF_F_IPV6_CSUM;
2511 #endif
2512
2513 #ifdef NETIF_F_HW_VLAN_TX
2514 netdev->features |= NETIF_F_HW_VLAN_TX |
2515 NETIF_F_HW_VLAN_RX;
2516 #endif
2517 #ifdef NETIF_F_TSO
2518 netdev->features |= NETIF_F_TSO;
2519 #endif /* NETIF_F_TSO */
2520 #ifdef NETIF_F_TSO6
2521 netdev->features |= NETIF_F_TSO6;
2522 #endif /* NETIF_F_TSO6 */
2523 #ifdef NETIF_F_RXHASH
2524 netdev->features |= NETIF_F_RXHASH;
2525 #endif /* NETIF_F_RXHASH */
2526
2527 #ifdef HAVE_NDO_SET_FEATURES
2528 netdev->features |= NETIF_F_RXCSUM;
2529
2530 /* copy netdev features into list of user selectable features */
2531 netdev->hw_features |= netdev->features;
2532
2533 /* give us the option of enabling RSC/LRO later */
2534 #ifdef IXGBE_NO_LRO
2535 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
2536 #endif
2537 netdev->hw_features |= NETIF_F_LRO;
2538
2539 #else
2540 #ifdef NETIF_F_GRO
2541
2542 /* this is only needed on kernels prior to 2.6.39 */
2543 netdev->features |= NETIF_F_GRO;
2544 #endif /* NETIF_F_GRO */
2545 #endif
2546
2547 #ifdef NETIF_F_HW_VLAN_TX
2548 /* set this bit last since it cannot be part of hw_features */
2549 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2550 #endif
2551 switch (adapter->hw.mac.type) {
2552 case ixgbe_mac_82599EB:
2553 case ixgbe_mac_X540:
2554 netdev->features |= NETIF_F_SCTP_CSUM;
2555 #ifdef HAVE_NDO_SET_FEATURES
2556 netdev->hw_features |= NETIF_F_SCTP_CSUM |
2557 NETIF_F_NTUPLE;
2558 #endif
2559 break;
2560 default:
2561 break;
2562 }
2563
2564 #ifdef HAVE_NETDEV_VLAN_FEATURES
2565 netdev->vlan_features |= NETIF_F_SG |
2566 NETIF_F_IP_CSUM |
2567 NETIF_F_IPV6_CSUM |
2568 NETIF_F_TSO |
2569 NETIF_F_TSO6;
2570
2571 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2572 /*
2573 * If perfect filters were enabled in check_options(), enable them
2574 * on the netdevice too.
2575 */
2576 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
2577 netdev->features |= NETIF_F_NTUPLE;
2578 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
2579 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2580 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
2581 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2582 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
2583 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2584 /* clear n-tuple support in the netdev unconditionally */
2585 netdev->features &= ~NETIF_F_NTUPLE;
2586 }
2587
2588 #ifdef NETIF_F_RXHASH
2589 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2590 netdev->features &= ~NETIF_F_RXHASH;
2591
2592 #endif /* NETIF_F_RXHASH */
2593 if (netdev->features & NETIF_F_LRO) {
2594 if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2595 ((adapter->rx_itr_setting == 1) ||
2596 (adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR))) {
2597 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2598 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
2599 #ifdef IXGBE_NO_LRO
2600 e_info(probe, "InterruptThrottleRate set too high, "
2601 "disabling RSC\n");
2602 #else
2603 e_info(probe, "InterruptThrottleRate set too high, "
2604 "falling back to software LRO\n");
2605 #endif
2606 }
2607 }
2608 #ifdef CONFIG_DCB
2609 //netdev->dcbnl_ops = &dcbnl_ops;
2610 #endif
2611
2612 #ifdef IXGBE_FCOE
2613 #ifdef NETIF_F_FSO
2614 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
2615 ixgbe_get_device_caps(hw, &device_caps);
2616 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS) {
2617 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
2618 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
2619 e_info(probe, "FCoE offload feature is not available. "
2620 "Disabling FCoE offload feature\n");
2621 }
2622 #ifndef HAVE_NETDEV_OPS_FCOE_ENABLE
2623 else {
2624 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
2625 adapter->ring_feature[RING_F_FCOE].indices =
2626 IXGBE_FCRETA_SIZE;
2627 netdev->features |= NETIF_F_FSO |
2628 NETIF_F_FCOE_CRC |
2629 NETIF_F_FCOE_MTU;
2630 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
2631 }
2632 #endif /* HAVE_NETDEV_OPS_FCOE_ENABLE */
2633 #ifdef HAVE_NETDEV_VLAN_FEATURES
2634 netdev->vlan_features |= NETIF_F_FSO |
2635 NETIF_F_FCOE_CRC |
2636 NETIF_F_FCOE_MTU;
2637 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2638 }
2639 #endif /* NETIF_F_FSO */
2640 #endif /* IXGBE_FCOE */
2641
2642 #endif /* MAX_SKB_FRAGS */
2643 /* make sure the EEPROM is good */
2644 if (hw->eeprom.ops.validate_checksum &&
2645 (hw->eeprom.ops.validate_checksum(hw, NULL) < 0)) {
2646 e_dev_err("The EEPROM Checksum Is Not Valid\n");
2647 err = -EIO;
2648 goto err_sw_init;
2649 }
2650
2651 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2652 #ifdef ETHTOOL_GPERMADDR
2653 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2654
2655 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
2656 e_dev_err("invalid MAC address\n");
2657 err = -EIO;
2658 goto err_sw_init;
2659 }
2660 #else
2661 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2662 e_dev_err("invalid MAC address\n");
2663 err = -EIO;
2664 goto err_sw_init;
2665 }
2666 #endif
2667 memcpy(&adapter->mac_table[0].addr, hw->mac.perm_addr,
2668 netdev->addr_len);
2669 adapter->mac_table[0].queue = adapter->num_vfs;
2670 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
2671 IXGBE_MAC_STATE_IN_USE);
2672 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
2673 adapter->mac_table[0].queue,
2674 IXGBE_RAH_AV);
2675
2676 //setup_timer(&adapter->service_timer, &ixgbe_service_timer,
2677 // (unsigned long) adapter);
2678
2679 //INIT_WORK(&adapter->service_task, ixgbe_service_task);
2680 //clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
2681
2682 //err = ixgbe_init_interrupt_scheme(adapter);
2683 //if (err)
2684 // goto err_sw_init;
2685
2686 //adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2687 ixgbe_set_num_queues(adapter);
2688
2689 adapter->wol = 0;
2690 /* WOL not supported for all but the following */
2691 switch (pdev->device) {
2692 case IXGBE_DEV_ID_82599_SFP:
2693 /* Only these subdevice supports WOL */
2694 switch (pdev->subsystem_device) {
2695 case IXGBE_SUBDEV_ID_82599_560FLR:
2696 /* only support first port */
2697 if (hw->bus.func != 0)
2698 break;
2699 case IXGBE_SUBDEV_ID_82599_SFP:
2700 adapter->wol = IXGBE_WUFC_MAG;
2701 break;
2702 }
2703 break;
2704 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
2705 /* All except this subdevice support WOL */
2706 if (pdev->subsystem_device != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
2707 adapter->wol = IXGBE_WUFC_MAG;
2708 break;
2709 case IXGBE_DEV_ID_82599_KX4:
2710 adapter->wol = IXGBE_WUFC_MAG;
2711 break;
2712 case IXGBE_DEV_ID_X540T:
2713 /* Check eeprom to see if it is enabled */
2714 ixgbe_read_eeprom(hw, 0x2c, &adapter->eeprom_cap);
2715 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
2716
2717 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
2718 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
2719 (hw->bus.func == 0)))
2720 adapter->wol = IXGBE_WUFC_MAG;
2721 break;
2722 }
2723 //device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2724
2725
2726 /*
2727 * Save off EEPROM version number and Option Rom version which
2728 * together make a unique identify for the eeprom
2729 */
2730 ixgbe_read_eeprom(hw, 0x2e, &eeprom_verh);
2731 ixgbe_read_eeprom(hw, 0x2d, &eeprom_verl);
2732
2733 etrack_id = (eeprom_verh << 16) | eeprom_verl;
2734
2735 ixgbe_read_eeprom(hw, 0x17, &offset);
2736
2737 /* Make sure offset to SCSI block is valid */
2738 if (!(offset == 0x0) && !(offset == 0xffff)) {
2739 ixgbe_read_eeprom(hw, offset + 0x84, &eeprom_cfg_blkh);
2740 ixgbe_read_eeprom(hw, offset + 0x83, &eeprom_cfg_blkl);
2741
2742 /* Only display Option Rom if exist */
2743 if (eeprom_cfg_blkl && eeprom_cfg_blkh) {
2744 major = eeprom_cfg_blkl >> 8;
2745 build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8);
2746 patch = eeprom_cfg_blkh & 0x00ff;
2747
2748 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2749 "0x%08x, %d.%d.%d", etrack_id, major, build,
2750 patch);
2751 } else {
2752 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2753 "0x%08x", etrack_id);
2754 }
2755 } else {
2756 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2757 "0x%08x", etrack_id);
2758 }
2759
2760 /* reset the hardware with the new settings */
2761 err = hw->mac.ops.start_hw(hw);
2762 if (err == IXGBE_ERR_EEPROM_VERSION) {
2763 /* We are running on a pre-production device, log a warning */
2764 e_dev_warn("This device is a pre-production adapter/LOM. "
2765 "Please be aware there may be issues associated "
2766 "with your hardware. If you are experiencing "
2767 "problems please contact your Intel or hardware "
2768 "representative who provided you with this "
2769 "hardware.\n");
2770 }
2771 /* pick up the PCI bus settings for reporting later */
2772 if (hw->mac.ops.get_bus_info)
2773 hw->mac.ops.get_bus_info(hw);
2774
2775 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
2776 *lad_dev = netdev;
2777
2778 adapter->netdev_registered = true;
2779 #ifdef NO_VNIC
2780 /* power down the optics */
2781 if ((hw->phy.multispeed_fiber) ||
2782 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
2783 (hw->mac.type == ixgbe_mac_82599EB)))
2784 ixgbe_disable_tx_laser(hw);
2785
2786 /* carrier off reporting is important to ethtool even BEFORE open */
2787 netif_carrier_off(netdev);
2788 /* keep stopping all the transmit queues for older kernels */
2789 netif_tx_stop_all_queues(netdev);
2790 #endif
2791
2792 /* print all messages at the end so that we use our eth%d name */
2793 /* print bus type/speed/width info */
2794 e_dev_info("(PCI Express:%s:%s) ",
2795 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
2796 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
2797 "Unknown"),
2798 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
2799 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
2800 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
2801 "Unknown"));
2802
2803 /* print the MAC address */
2804 for (i = 0; i < 6; i++)
2805 pr_cont("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2806
2807 /* First try to read PBA as a string */
2808 err = ixgbe_read_pba_string(hw, part_str, IXGBE_PBANUM_LENGTH);
2809 if (err)
2810 strlcpy(part_str, "Unknown", sizeof(part_str));
2811 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
2812 e_info(probe, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
2813 hw->mac.type, hw->phy.type, hw->phy.sfp_type, part_str);
2814 else
2815 e_info(probe, "MAC: %d, PHY: %d, PBA No: %s\n",
2816 hw->mac.type, hw->phy.type, part_str);
2817
2818 if (((hw->bus.speed == ixgbe_bus_speed_2500) &&
2819 (hw->bus.width <= ixgbe_bus_width_pcie_x4)) ||
2820 (hw->bus.width <= ixgbe_bus_width_pcie_x2)) {
2821 e_dev_warn("PCI-Express bandwidth available for this "
2822 "card is not sufficient for optimal "
2823 "performance.\n");
2824 e_dev_warn("For optimal performance a x8 PCI-Express "
2825 "slot is required.\n");
2826 }
2827
2828 #define INFO_STRING_LEN 255
2829 info_string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
2830 if (!info_string) {
2831 e_err(probe, "allocation for info string failed\n");
2832 goto no_info_string;
2833 }
2834 count = 0;
2835 i_s_var = info_string;
2836 count += snprintf(i_s_var, INFO_STRING_LEN, "Enabled Features: ");
2837
2838 i_s_var = info_string + count;
2839 count += snprintf(i_s_var, (INFO_STRING_LEN - count),
2840 "RxQ: %d TxQ: %d ", adapter->num_rx_queues,
2841 adapter->num_tx_queues);
2842 i_s_var = info_string + count;
2843 #ifdef IXGBE_FCOE
2844 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
2845 count += snprintf(i_s_var, INFO_STRING_LEN - count, "FCoE ");
2846 i_s_var = info_string + count;
2847 }
2848 #endif
2849 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2850 count += snprintf(i_s_var, INFO_STRING_LEN - count,
2851 "FdirHash ");
2852 i_s_var = info_string + count;
2853 }
2854 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2855 count += snprintf(i_s_var, INFO_STRING_LEN - count,
2856 "FdirPerfect ");
2857 i_s_var = info_string + count;
2858 }
2859 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2860 count += snprintf(i_s_var, INFO_STRING_LEN - count, "DCB ");
2861 i_s_var = info_string + count;
2862 }
2863 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2864 count += snprintf(i_s_var, INFO_STRING_LEN - count, "RSS ");
2865 i_s_var = info_string + count;
2866 }
2867 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2868 count += snprintf(i_s_var, INFO_STRING_LEN - count, "DCA ");
2869 i_s_var = info_string + count;
2870 }
2871 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2872 count += snprintf(i_s_var, INFO_STRING_LEN - count, "RSC ");
2873 i_s_var = info_string + count;
2874 }
2875 #ifndef IXGBE_NO_LRO
2876 else if (netdev->features & NETIF_F_LRO) {
2877 count += snprintf(i_s_var, INFO_STRING_LEN - count, "LRO ");
2878 i_s_var = info_string + count;
2879 }
2880 #endif
2881
2882 BUG_ON(i_s_var > (info_string + INFO_STRING_LEN));
2883 /* end features printing */
2884 e_info(probe, "%s\n", info_string);
2885 kfree(info_string);
2886 no_info_string:
2887
2888 /* firmware requires blank driver version */
2889 ixgbe_set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF);
2890
2891 #if defined(HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN)
2892 /* add san mac addr to netdev */
2893 //ixgbe_add_sanmac_netdev(netdev);
2894
2895 #endif /* (HAVE_NETDEV_STORAGE_ADDRESS) && (NETDEV_HW_ADDR_T_SAN) */
2896 e_info(probe, "Intel(R) 10 Gigabit Network Connection\n");
2897 cards_found++;
2898
2899 #ifdef IXGBE_SYSFS
2900 //if (ixgbe_sysfs_init(adapter))
2901 // e_err(probe, "failed to allocate sysfs resources\n");
2902 #else
2903 #ifdef IXGBE_PROCFS
2904 //if (ixgbe_procfs_init(adapter))
2905 // e_err(probe, "failed to allocate procfs resources\n");
2906 #endif /* IXGBE_PROCFS */
2907 #endif /* IXGBE_SYSFS */
2908
2909 return 0;
2910
2911 //err_register:
2912 //ixgbe_clear_interrupt_scheme(adapter);
2913 //ixgbe_release_hw_control(adapter);
2914 err_sw_init:
2915 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
2916 if (adapter->mac_table)
2917 kfree(adapter->mac_table);
2918 iounmap(hw->hw_addr);
2919 err_ioremap:
2920 free_netdev(netdev);
2921 err_alloc_etherdev:
2922 //pci_release_selected_regions(pdev,
2923 // pci_select_bars(pdev, IORESOURCE_MEM));
2924 //err_pci_reg:
2925 //err_dma:
2926 pci_disable_device(pdev);
2927 return err;
2928 }
2929
2930 /**
2931 * ixgbe_remove - Device Removal Routine
2932 * @pdev: PCI device information struct
2933 *
2934 * ixgbe_remove is called by the PCI subsystem to alert the driver
2935 * that it should release a PCI device. The could be caused by a
2936 * Hot-Plug event, or because the driver is going to be removed from
2937 * memory.
2938 **/
2939 void ixgbe_kni_remove(struct pci_dev *pdev)
2940 {
2941 pci_disable_device(pdev);
2942 }
2943
2944
2945 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
2946 {
2947 u16 value;
2948 struct ixgbe_adapter *adapter = hw->back;
2949
2950 pci_read_config_word(adapter->pdev, reg, &value);
2951 return value;
2952 }
2953
2954 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
2955 {
2956 struct ixgbe_adapter *adapter = hw->back;
2957
2958 pci_write_config_word(adapter->pdev, reg, value);
2959 }
2960
2961 void ewarn(struct ixgbe_hw *hw, const char *st, u32 status)
2962 {
2963 struct ixgbe_adapter *adapter = hw->back;
2964
2965 netif_warn(adapter, drv, adapter->netdev, "%s", st);
2966 }
Ceph