ceph/src/dpdk/lib/librte_ether/rte_eth_ctrl.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _RTE_ETH_CTRL_H_
  35 #define _RTE_ETH_CTRL_H_
  36
  37 #include <stdint.h>
  38 #include <rte_common.h>
  39 #include "rte_ether.h"
  40
  41 /**
  42  * @file
  43  *
  44  * Ethernet device features and related data structures used
  45  * by control APIs should be defined in this file.
  46  *
  47  */
  48
  49 #ifdef __cplusplus
  50 extern "C" {
  51 #endif
  52
  53 /*
  54  * A packet can be identified by hardware as different flow types. Different
  55  * NIC hardwares may support different flow types.
  56  * Basically, the NIC hardware identifies the flow type as deep protocol as
  57  * possible, and exclusively. For example, if a packet is identified as
  58  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
  59  * though it is an actual IPV4 packet.
  60  * Note that the flow types are used to define RSS offload types in
  61  * rte_ethdev.h.
  62  */
  63 #define RTE_ETH_FLOW_UNKNOWN             0
  64 #define RTE_ETH_FLOW_RAW                 1
  65 #define RTE_ETH_FLOW_IPV4                2
  66 #define RTE_ETH_FLOW_FRAG_IPV4           3
  67 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP    4
  68 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP    5
  69 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP   6
  70 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER  7
  71 #define RTE_ETH_FLOW_IPV6                8
  72 #define RTE_ETH_FLOW_FRAG_IPV6           9
  73 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP   10
  74 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP   11
  75 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP  12
  76 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
  77 #define RTE_ETH_FLOW_L2_PAYLOAD         14
  78 #define RTE_ETH_FLOW_IPV6_EX            15
  79 #define RTE_ETH_FLOW_IPV6_TCP_EX        16
  80 #define RTE_ETH_FLOW_IPV6_UDP_EX        17
  81 #define RTE_ETH_FLOW_PORT               18
  82         /**< Consider device port number as a flow differentiator */
  83 #define RTE_ETH_FLOW_VXLAN              19 /**< VXLAN protocol based flow */
  84 #define RTE_ETH_FLOW_GENEVE             20 /**< GENEVE protocol based flow */
  85 #define RTE_ETH_FLOW_NVGRE              21 /**< NVGRE protocol based flow */
  86 #define RTE_ETH_FLOW_MAX                22
  87
  88 /**
  89  * Feature filter types
  90  */
  91 enum rte_filter_type {
  92         RTE_ETH_FILTER_NONE = 0,
  93         RTE_ETH_FILTER_MACVLAN,
  94         RTE_ETH_FILTER_ETHERTYPE,
  95         RTE_ETH_FILTER_FLEXIBLE,
  96         RTE_ETH_FILTER_SYN,
  97         RTE_ETH_FILTER_NTUPLE,
  98         RTE_ETH_FILTER_TUNNEL,
  99         RTE_ETH_FILTER_FDIR,
 100         RTE_ETH_FILTER_HASH,
 101         RTE_ETH_FILTER_L2_TUNNEL,
 102         RTE_ETH_FILTER_MAX
 103 };
 104
 105 /**
 106  * Generic operations on filters
 107  */
 108 enum rte_filter_op {
 109         /** used to check whether the type filter is supported */
 110         RTE_ETH_FILTER_NOP = 0,
 111         RTE_ETH_FILTER_ADD,      /**< add filter entry */
 112         RTE_ETH_FILTER_UPDATE,   /**< update filter entry */
 113         RTE_ETH_FILTER_DELETE,   /**< delete filter entry */
 114         RTE_ETH_FILTER_FLUSH,    /**< flush all entries */
 115         RTE_ETH_FILTER_GET,      /**< get filter entry */
 116         RTE_ETH_FILTER_SET,      /**< configurations */
 117         RTE_ETH_FILTER_INFO,     /**< retrieve information */
 118         RTE_ETH_FILTER_STATS,    /**< retrieve statistics */
 119         RTE_ETH_FILTER_OP_MAX
 120 };
 121
 122 /**
 123  * MAC filter type
 124  */
 125 enum rte_mac_filter_type {
 126         RTE_MAC_PERFECT_MATCH = 1, /**< exact match of MAC addr. */
 127         RTE_MACVLAN_PERFECT_MATCH, /**< exact match of MAC addr and VLAN ID. */
 128         RTE_MAC_HASH_MATCH, /**< hash match of MAC addr. */
 129         /** hash match of MAC addr and exact match of VLAN ID. */
 130         RTE_MACVLAN_HASH_MATCH,
 131 };
 132
 133 /**
 134  * MAC filter info
 135  */
 136 struct rte_eth_mac_filter {
 137         uint8_t is_vf; /**< 1 for VF, 0 for port dev */
 138         uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
 139         enum rte_mac_filter_type filter_type; /**< MAC filter type */
 140         struct ether_addr mac_addr;
 141 };
 142
 143 /**
 144  * Define all structures for Ethertype Filter type.
 145  */
 146
 147 #define RTE_ETHTYPE_FLAGS_MAC    0x0001 /**< If set, compare mac */
 148 #define RTE_ETHTYPE_FLAGS_DROP   0x0002 /**< If set, drop packet when match */
 149
 150 /**
 151  * A structure used to define the ethertype filter entry
 152  * to support RTE_ETH_FILTER_ETHERTYPE with RTE_ETH_FILTER_ADD,
 153  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 154  */
 155 struct rte_eth_ethertype_filter {
 156         struct ether_addr mac_addr;   /**< Mac address to match. */
 157         uint16_t ether_type;          /**< Ether type to match */
 158         uint16_t flags;               /**< Flags from RTE_ETHTYPE_FLAGS_* */
 159         uint16_t queue;               /**< Queue assigned to when match*/
 160 };
 161
 162 #define RTE_FLEX_FILTER_MAXLEN  128     /**< bytes to use in flex filter. */
 163 #define RTE_FLEX_FILTER_MASK_SIZE       \
 164         (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
 165                                         /**< mask bytes in flex filter. */
 166
 167 /**
 168  *  A structure used to define the flex filter entry
 169  *  to support RTE_ETH_FILTER_FLEXIBLE with RTE_ETH_FILTER_ADD,
 170  *  RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 171  */
 172 struct rte_eth_flex_filter {
 173         uint16_t len;
 174         uint8_t bytes[RTE_FLEX_FILTER_MAXLEN];  /**< flex bytes in big endian.*/
 175         uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE];    /**< if mask bit is 1b, do
 176                                         not compare corresponding byte. */
 177         uint8_t priority;
 178         uint16_t queue;       /**< Queue assigned to when match. */
 179 };
 180
 181 /**
 182  * A structure used to define the TCP syn filter entry
 183  * to support RTE_ETH_FILTER_SYN with RTE_ETH_FILTER_ADD,
 184  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 185  */
 186 struct rte_eth_syn_filter {
 187         uint8_t hig_pri;     /**< 1 - higher priority than other filters,
 188                                   0 - lower priority. */
 189         uint16_t queue;      /**< Queue assigned to when match */
 190 };
 191
 192 /**
 193  * Define all structures for ntuple Filter type.
 194  */
 195
 196 #define RTE_NTUPLE_FLAGS_DST_IP    0x0001 /**< If set, dst_ip is part of ntuple */
 197 #define RTE_NTUPLE_FLAGS_SRC_IP    0x0002 /**< If set, src_ip is part of ntuple */
 198 #define RTE_NTUPLE_FLAGS_DST_PORT  0x0004 /**< If set, dst_port is part of ntuple */
 199 #define RTE_NTUPLE_FLAGS_SRC_PORT  0x0008 /**< If set, src_port is part of ntuple */
 200 #define RTE_NTUPLE_FLAGS_PROTO     0x0010 /**< If set, protocol is part of ntuple */
 201 #define RTE_NTUPLE_FLAGS_TCP_FLAG  0x0020 /**< If set, tcp flag is involved */
 202
 203 #define RTE_5TUPLE_FLAGS ( \
 204                 RTE_NTUPLE_FLAGS_DST_IP | \
 205                 RTE_NTUPLE_FLAGS_SRC_IP | \
 206                 RTE_NTUPLE_FLAGS_DST_PORT | \
 207                 RTE_NTUPLE_FLAGS_SRC_PORT | \
 208                 RTE_NTUPLE_FLAGS_PROTO)
 209
 210 #define RTE_2TUPLE_FLAGS ( \
 211                 RTE_NTUPLE_FLAGS_DST_PORT | \
 212                 RTE_NTUPLE_FLAGS_PROTO)
 213
 214 #define TCP_URG_FLAG 0x20
 215 #define TCP_ACK_FLAG 0x10
 216 #define TCP_PSH_FLAG 0x08
 217 #define TCP_RST_FLAG 0x04
 218 #define TCP_SYN_FLAG 0x02
 219 #define TCP_FIN_FLAG 0x01
 220 #define TCP_FLAG_ALL 0x3F
 221
 222 /**
 223  * A structure used to define the ntuple filter entry
 224  * to support RTE_ETH_FILTER_NTUPLE with RTE_ETH_FILTER_ADD,
 225  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 226  */
 227 struct rte_eth_ntuple_filter {
 228         uint16_t flags;          /**< Flags from RTE_NTUPLE_FLAGS_* */
 229         uint32_t dst_ip;         /**< Destination IP address in big endian. */
 230         uint32_t dst_ip_mask;    /**< Mask of destination IP address. */
 231         uint32_t src_ip;         /**< Source IP address in big endian. */
 232         uint32_t src_ip_mask;    /**< Mask of destination IP address. */
 233         uint16_t dst_port;       /**< Destination port in big endian. */
 234         uint16_t dst_port_mask;  /**< Mask of destination port. */
 235         uint16_t src_port;       /**< Source Port in big endian. */
 236         uint16_t src_port_mask;  /**< Mask of source port. */
 237         uint8_t proto;           /**< L4 protocol. */
 238         uint8_t proto_mask;      /**< Mask of L4 protocol. */
 239         /** tcp_flags only meaningful when the proto is TCP.
 240             The packet matched above ntuple fields and contain
 241             any set bit in tcp_flags will hit this filter. */
 242         uint8_t tcp_flags;
 243         uint16_t priority;       /**< seven levels (001b-111b), 111b is highest,
 244                                       used when more than one filter matches. */
 245         uint16_t queue;          /**< Queue assigned to when match*/
 246 };
 247
 248 /**
 249  * Tunneled type.
 250  */
 251 enum rte_eth_tunnel_type {
 252         RTE_TUNNEL_TYPE_NONE = 0,
 253         RTE_TUNNEL_TYPE_VXLAN,
 254         RTE_TUNNEL_TYPE_GENEVE,
 255         RTE_TUNNEL_TYPE_TEREDO,
 256         RTE_TUNNEL_TYPE_NVGRE,
 257         RTE_TUNNEL_TYPE_IP_IN_GRE,
 258         RTE_L2_TUNNEL_TYPE_E_TAG,
 259         RTE_TUNNEL_TYPE_MAX,
 260 };
 261
 262 /**
 263  * filter type of tunneling packet
 264  */
 265 #define ETH_TUNNEL_FILTER_OMAC  0x01 /**< filter by outer MAC addr */
 266 #define ETH_TUNNEL_FILTER_OIP   0x02 /**< filter by outer IP Addr */
 267 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */
 268 #define ETH_TUNNEL_FILTER_IMAC  0x08 /**< filter by inner MAC addr */
 269 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */
 270 #define ETH_TUNNEL_FILTER_IIP   0x20 /**< filter by inner IP addr */
 271
 272 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
 273                                         ETH_TUNNEL_FILTER_IVLAN)
 274 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
 275                                         ETH_TUNNEL_FILTER_IVLAN | \
 276                                         ETH_TUNNEL_FILTER_TENID)
 277 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
 278                                         ETH_TUNNEL_FILTER_TENID)
 279 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
 280                                         ETH_TUNNEL_FILTER_TENID | \
 281                                         ETH_TUNNEL_FILTER_IMAC)
 282
 283 /**
 284  *  Select IPv4 or IPv6 for tunnel filters.
 285  */
 286 enum rte_tunnel_iptype {
 287         RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */
 288         RTE_TUNNEL_IPTYPE_IPV6,     /**< IPv6. */
 289 };
 290
 291 /**
 292  * Tunneling Packet filter configuration.
 293  */
 294 struct rte_eth_tunnel_filter_conf {
 295         struct ether_addr outer_mac;    /**< Outer MAC address to match. */
 296         struct ether_addr inner_mac;    /**< Inner MAC address to match. */
 297         uint16_t inner_vlan;            /**< Inner VLAN to match. */
 298         enum rte_tunnel_iptype ip_type; /**< IP address type. */
 299         /** Outer destination IP address to match if ETH_TUNNEL_FILTER_OIP
 300             is set in filter_type, or inner destination IP address to match
 301             if ETH_TUNNEL_FILTER_IIP is set in filter_type . */
 302         union {
 303                 uint32_t ipv4_addr;     /**< IPv4 address in big endian. */
 304                 uint32_t ipv6_addr[4];  /**< IPv6 address in big endian. */
 305         } ip_addr;
 306         /** Flags from ETH_TUNNEL_FILTER_XX - see above. */
 307         uint16_t filter_type;
 308         enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */
 309         uint32_t tenant_id;     /**< Tenant ID to match. VNI, GRE key... */
 310         uint16_t queue_id;      /**< Queue assigned to if match. */
 311 };
 312
 313 /**
 314  * Global eth device configuration type.
 315  */
 316 enum rte_eth_global_cfg_type {
 317         RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
 318         RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
 319         RTE_ETH_GLOBAL_CFG_TYPE_MAX,
 320 };
 321
 322 /**
 323  * Global eth device configuration.
 324  */
 325 struct rte_eth_global_cfg {
 326         enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */
 327         union {
 328                 uint8_t gre_key_len; /**< Valid GRE key length in byte. */
 329                 uint64_t reserved; /**< Reserve space for future use. */
 330         } cfg;
 331 };
 332
 333 #define RTE_ETH_FDIR_MAX_FLEXLEN 16  /**< Max length of flexbytes. */
 334 #define RTE_ETH_INSET_SIZE_MAX   128 /**< Max length of input set. */
 335
 336 /**
 337  * Input set fields for Flow Director and Hash filters
 338  */
 339 enum rte_eth_input_set_field {
 340         RTE_ETH_INPUT_SET_UNKNOWN = 0,
 341
 342         /* L2 */
 343         RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
 344         RTE_ETH_INPUT_SET_L2_DST_MAC,
 345         RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
 346         RTE_ETH_INPUT_SET_L2_INNER_VLAN,
 347         RTE_ETH_INPUT_SET_L2_ETHERTYPE,
 348
 349         /* L3 */
 350         RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
 351         RTE_ETH_INPUT_SET_L3_DST_IP4,
 352         RTE_ETH_INPUT_SET_L3_SRC_IP6,
 353         RTE_ETH_INPUT_SET_L3_DST_IP6,
 354         RTE_ETH_INPUT_SET_L3_IP4_TOS,
 355         RTE_ETH_INPUT_SET_L3_IP4_PROTO,
 356         RTE_ETH_INPUT_SET_L3_IP6_TC,
 357         RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
 358         RTE_ETH_INPUT_SET_L3_IP4_TTL,
 359         RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
 360
 361         /* L4 */
 362         RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
 363         RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
 364         RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
 365         RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
 366         RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
 367         RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
 368         RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
 369
 370         /* Tunnel */
 371         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
 372         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
 373         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
 374         RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
 375         RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
 376
 377         /* Flexible Payload */
 378         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
 379         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
 380         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
 381         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
 382         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
 383         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
 384         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
 385         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
 386
 387         RTE_ETH_INPUT_SET_DEFAULT = 65533,
 388         RTE_ETH_INPUT_SET_NONE = 65534,
 389         RTE_ETH_INPUT_SET_MAX = 65535,
 390 };
 391
 392 /**
 393  * Filters input set operations
 394  */
 395 enum rte_filter_input_set_op {
 396         RTE_ETH_INPUT_SET_OP_UNKNOWN,
 397         RTE_ETH_INPUT_SET_SELECT, /**< select input set */
 398         RTE_ETH_INPUT_SET_ADD,    /**< add input set entry */
 399         RTE_ETH_INPUT_SET_OP_MAX
 400 };
 401
 402
 403 /**
 404  * A structure used to define the input set configuration for
 405  * flow director and hash filters
 406  */
 407 struct rte_eth_input_set_conf {
 408         uint16_t flow_type;
 409         uint16_t inset_size;
 410         enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
 411         enum rte_filter_input_set_op op;
 412 };
 413
 414 /**
 415  * A structure used to define the input for L2 flow
 416  */
 417 struct rte_eth_l2_flow {
 418         uint16_t ether_type;          /**< Ether type in big endian */
 419 };
 420
 421 /**
 422  * A structure used to define the input for IPV4 flow
 423  */
 424 struct rte_eth_ipv4_flow {
 425         uint32_t src_ip;      /**< IPv4 source address in big endian. */
 426         uint32_t dst_ip;      /**< IPv4 destination address in big endian. */
 427         uint8_t  tos;         /**< Type of service to match. */
 428         uint8_t  ttl;         /**< Time to live to match. */
 429         uint8_t  proto;       /**< Protocol, next header in big endian. */
 430 };
 431
 432 /**
 433  * A structure used to define the input for IPV4 UDP flow
 434  */
 435 struct rte_eth_udpv4_flow {
 436         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 437         uint16_t src_port;           /**< UDP source port in big endian. */
 438         uint16_t dst_port;           /**< UDP destination port in big endian. */
 439 };
 440
 441 /**
 442  * A structure used to define the input for IPV4 TCP flow
 443  */
 444 struct rte_eth_tcpv4_flow {
 445         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 446         uint16_t src_port;           /**< TCP source port in big endian. */
 447         uint16_t dst_port;           /**< TCP destination port in big endian. */
 448 };
 449
 450 /**
 451  * A structure used to define the input for IPV4 SCTP flow
 452  */
 453 struct rte_eth_sctpv4_flow {
 454         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 455         uint16_t src_port;           /**< SCTP source port in big endian. */
 456         uint16_t dst_port;           /**< SCTP destination port in big endian. */
 457         uint32_t verify_tag;         /**< Verify tag in big endian */
 458 };
 459
 460 /**
 461  * A structure used to define the input for IPV6 flow
 462  */
 463 struct rte_eth_ipv6_flow {
 464         uint32_t src_ip[4];      /**< IPv6 source address in big endian. */
 465         uint32_t dst_ip[4];      /**< IPv6 destination address in big endian. */
 466         uint8_t  tc;             /**< Traffic class to match. */
 467         uint8_t  proto;          /**< Protocol, next header to match. */
 468         uint8_t  hop_limits;     /**< Hop limits to match. */
 469 };
 470
 471 /**
 472  * A structure used to define the input for IPV6 UDP flow
 473  */
 474 struct rte_eth_udpv6_flow {
 475         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 476         uint16_t src_port;           /**< UDP source port in big endian. */
 477         uint16_t dst_port;           /**< UDP destination port in big endian. */
 478 };
 479
 480 /**
 481  * A structure used to define the input for IPV6 TCP flow
 482  */
 483 struct rte_eth_tcpv6_flow {
 484         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 485         uint16_t src_port;           /**< TCP source port to in big endian. */
 486         uint16_t dst_port;           /**< TCP destination port in big endian. */
 487 };
 488
 489 /**
 490  * A structure used to define the input for IPV6 SCTP flow
 491  */
 492 struct rte_eth_sctpv6_flow {
 493         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 494         uint16_t src_port;           /**< SCTP source port in big endian. */
 495         uint16_t dst_port;           /**< SCTP destination port in big endian. */
 496         uint32_t verify_tag;         /**< Verify tag in big endian. */
 497 };
 498
 499 /**
 500  * A structure used to define the input for MAC VLAN flow
 501  */
 502 struct rte_eth_mac_vlan_flow {
 503         struct ether_addr mac_addr;  /**< Mac address to match. */
 504 };
 505
 506 /**
 507  * Tunnel type for flow director.
 508  */
 509 enum rte_eth_fdir_tunnel_type {
 510         RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
 511         RTE_FDIR_TUNNEL_TYPE_NVGRE,
 512         RTE_FDIR_TUNNEL_TYPE_VXLAN,
 513 };
 514
 515 /**
 516  * A structure used to define the input for tunnel flow, now it's VxLAN or
 517  * NVGRE
 518  */
 519 struct rte_eth_tunnel_flow {
 520         enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
 521         /** Tunnel ID to match. TNI, VNI... in big endian. */
 522         uint32_t tunnel_id;
 523         struct ether_addr mac_addr;                /**< Mac address to match. */
 524 };
 525
 526 /**
 527  * An union contains the inputs for all types of flow
 528  * Items in flows need to be in big endian
 529  */
 530 union rte_eth_fdir_flow {
 531         struct rte_eth_l2_flow     l2_flow;
 532         struct rte_eth_udpv4_flow  udp4_flow;
 533         struct rte_eth_tcpv4_flow  tcp4_flow;
 534         struct rte_eth_sctpv4_flow sctp4_flow;
 535         struct rte_eth_ipv4_flow   ip4_flow;
 536         struct rte_eth_udpv6_flow  udp6_flow;
 537         struct rte_eth_tcpv6_flow  tcp6_flow;
 538         struct rte_eth_sctpv6_flow sctp6_flow;
 539         struct rte_eth_ipv6_flow   ipv6_flow;
 540         struct rte_eth_mac_vlan_flow mac_vlan_flow;
 541         struct rte_eth_tunnel_flow   tunnel_flow;
 542 };
 543
 544 /**
 545  * A structure used to contain extend input of flow
 546  */
 547 struct rte_eth_fdir_flow_ext {
 548         uint16_t vlan_tci;
 549         uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
 550         /**< It is filled by the flexible payload to match. */
 551         uint8_t is_vf;   /**< 1 for VF, 0 for port dev */
 552         uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
 553 };
 554
 555 /**
 556  * A structure used to define the input for a flow director filter entry
 557  */
 558 struct rte_eth_fdir_input {
 559         uint16_t flow_type;
 560         union rte_eth_fdir_flow flow;
 561         /**< Flow fields to match, dependent on flow_type */
 562         struct rte_eth_fdir_flow_ext flow_ext;
 563         /**< Additional fields to match */
 564 };
 565
 566 /**
 567  * Behavior will be taken if FDIR match
 568  */
 569 enum rte_eth_fdir_behavior {
 570         RTE_ETH_FDIR_ACCEPT = 0,
 571         RTE_ETH_FDIR_REJECT,
 572         RTE_ETH_FDIR_PASSTHRU,
 573 };
 574
 575 /**
 576  * Flow director report status
 577  * It defines what will be reported if FDIR entry is matched.
 578  */
 579 enum rte_eth_fdir_status {
 580         RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
 581         RTE_ETH_FDIR_REPORT_ID,            /**< Only report FD ID. */
 582         RTE_ETH_FDIR_REPORT_ID_FLEX_4,     /**< Report FD ID and 4 flex bytes. */
 583         RTE_ETH_FDIR_REPORT_FLEX_8,        /**< Report 8 flex bytes. */
 584 };
 585
 586 /**
 587  * A structure used to define an action when match FDIR packet filter.
 588  */
 589 struct rte_eth_fdir_action {
 590         uint16_t rx_queue;        /**< Queue assigned to if FDIR match. */
 591         enum rte_eth_fdir_behavior behavior;     /**< Behavior will be taken */
 592         enum rte_eth_fdir_status report_status;  /**< Status report option */
 593         uint8_t flex_off;
 594         /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
 595              RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
 596              flex bytes start from in flexible payload. */
 597 };
 598
 599 /**
 600  * A structure used to define the flow director filter entry by filter_ctrl API
 601  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and
 602  * RTE_ETH_FILTER_DELETE operations.
 603  */
 604 struct rte_eth_fdir_filter {
 605         uint32_t soft_id;
 606         /**< ID, an unique value is required when deal with FDIR entry */
 607         struct rte_eth_fdir_input input;    /**< Input set */
 608         struct rte_eth_fdir_action action;  /**< Action taken when match */
 609 };
 610
 611 /**
 612  *  A structure used to configure FDIR masks that are used by the device
 613  *  to match the various fields of RX packet headers.
 614  */
 615 struct rte_eth_fdir_masks {
 616         uint16_t vlan_tci_mask;   /**< Bit mask for vlan_tci in big endian */
 617         /** Bit mask for ipv4 flow in big endian. */
 618         struct rte_eth_ipv4_flow   ipv4_mask;
 619         /** Bit maks for ipv6 flow in big endian. */
 620         struct rte_eth_ipv6_flow   ipv6_mask;
 621         /** Bit mask for L4 source port in big endian. */
 622         uint16_t src_port_mask;
 623         /** Bit mask for L4 destination port in big endian. */
 624         uint16_t dst_port_mask;
 625         /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
 626             first byte on the wire */
 627         uint8_t mac_addr_byte_mask;
 628         /** Bit mask for tunnel ID in big endian. */
 629         uint32_t tunnel_id_mask;
 630         uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
 631                                        0 - Ignore tunnel type. */
 632 };
 633
 634 /**
 635  * Payload type
 636  */
 637 enum rte_eth_payload_type {
 638         RTE_ETH_PAYLOAD_UNKNOWN = 0,
 639         RTE_ETH_RAW_PAYLOAD,
 640         RTE_ETH_L2_PAYLOAD,
 641         RTE_ETH_L3_PAYLOAD,
 642         RTE_ETH_L4_PAYLOAD,
 643         RTE_ETH_PAYLOAD_MAX = 8,
 644 };
 645
 646 /**
 647  * A structure used to select bytes extracted from the protocol layers to
 648  * flexible payload for filter
 649  */
 650 struct rte_eth_flex_payload_cfg {
 651         enum rte_eth_payload_type type;  /**< Payload type */
 652         uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
 653         /**< Offset in bytes from the beginning of packet's payload
 654              src_offset[i] indicates the flexbyte i's offset in original
 655              packet payload. This value should be less than
 656              flex_payload_limit in struct rte_eth_fdir_info.*/
 657 };
 658
 659 /**
 660  * A structure used to define FDIR masks for flexible payload
 661  * for each flow type
 662  */
 663 struct rte_eth_fdir_flex_mask {
 664         uint16_t flow_type;
 665         uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
 666         /**< Mask for the whole flexible payload */
 667 };
 668
 669 /**
 670  * A structure used to define all flexible payload related setting
 671  * include flex payload and flex mask
 672  */
 673 struct rte_eth_fdir_flex_conf {
 674         uint16_t nb_payloads;  /**< The number of following payload cfg */
 675         uint16_t nb_flexmasks; /**< The number of following mask */
 676         struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
 677         /**< Flex payload configuration for each payload type */
 678         struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
 679         /**< Flex mask configuration for each flow type */
 680 };
 681
 682 /**
 683  *  Flow Director setting modes: none, signature or perfect.
 684  */
 685 enum rte_fdir_mode {
 686         RTE_FDIR_MODE_NONE      = 0, /**< Disable FDIR support. */
 687         RTE_FDIR_MODE_SIGNATURE,     /**< Enable FDIR signature filter mode. */
 688         RTE_FDIR_MODE_PERFECT,       /**< Enable FDIR perfect filter mode. */
 689         RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
 690         RTE_FDIR_MODE_PERFECT_TUNNEL,   /**< Enable FDIR filter mode - tunnel. */
 691 };
 692
 693 #define UINT32_BIT (CHAR_BIT * sizeof(uint32_t))
 694 #define RTE_FLOW_MASK_ARRAY_SIZE \
 695         (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
 696
 697 /**
 698  * A structure used to get the information of flow director filter.
 699  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
 700  * It includes the mode, flexible payload configuration information,
 701  * capabilities and supported flow types, flexible payload characters.
 702  * It can be gotten to help taking specific configurations per device.
 703  */
 704 struct rte_eth_fdir_info {
 705         enum rte_fdir_mode mode; /**< Flow director mode */
 706         struct rte_eth_fdir_masks mask;
 707         /** Flex payload configuration information */
 708         struct rte_eth_fdir_flex_conf flex_conf;
 709         uint32_t guarant_spc; /**< Guaranteed spaces.*/
 710         uint32_t best_spc; /**< Best effort spaces.*/
 711         /** Bit mask for every supported flow type. */
 712         uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
 713         uint32_t max_flexpayload; /**< Total flex payload in bytes. */
 714         /** Flexible payload unit in bytes. Size and alignments of all flex
 715             payload segments should be multiplies of this value. */
 716         uint32_t flex_payload_unit;
 717         /** Max number of flexible payload continuous segments.
 718             Each segment should be a multiple of flex_payload_unit.*/
 719         uint32_t max_flex_payload_segment_num;
 720         /** Maximum src_offset in bytes allowed. It indicates that
 721             src_offset[i] in struct rte_eth_flex_payload_cfg should be less
 722             than this value. */
 723         uint16_t flex_payload_limit;
 724         /** Flex bitmask unit in bytes. Size of flex bitmasks should be a
 725             multiply of this value. */
 726         uint32_t flex_bitmask_unit;
 727         /** Max supported size of flex bitmasks in flex_bitmask_unit */
 728         uint32_t max_flex_bitmask_num;
 729 };
 730
 731 /**
 732  * A structure used to define the statistics of flow director.
 733  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
 734  */
 735 struct rte_eth_fdir_stats {
 736         uint32_t collision;    /**< Number of filters with collision. */
 737         uint32_t free;         /**< Number of free filters. */
 738         uint32_t maxhash;
 739         /**< The lookup hash value of the added filter that updated the value
 740            of the MAXLEN field */
 741         uint32_t maxlen;       /**< Longest linked list of filters. */
 742         uint64_t add;          /**< Number of added filters. */
 743         uint64_t remove;       /**< Number of removed filters. */
 744         uint64_t f_add;        /**< Number of failed added filters. */
 745         uint64_t f_remove;     /**< Number of failed removed filters. */
 746         uint32_t guarant_cnt;  /**< Number of filters in guaranteed spaces. */
 747         uint32_t best_cnt;     /**< Number of filters in best effort spaces. */
 748 };
 749
 750 /**
 751  * Flow Director filter information types.
 752  */
 753 enum rte_eth_fdir_filter_info_type {
 754         RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
 755         /** Flow Director filter input set configuration */
 756         RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
 757         RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
 758 };
 759
 760 /**
 761  * A structure used to set FDIR filter information, to support filter type
 762  * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation.
 763  */
 764 struct rte_eth_fdir_filter_info {
 765         enum rte_eth_fdir_filter_info_type info_type; /**< Information type */
 766         /** Details of fdir filter information */
 767         union {
 768                 /** Flow Director input set configuration per port */
 769                 struct rte_eth_input_set_conf input_set_conf;
 770         } info;
 771 };
 772
 773 /**
 774  * Hash filter information types.
 775  * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the
 776  *   information/configuration of 'symmetric hash enable' per port.
 777  * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global
 778  *   configurations of hash filters. Those global configurations are valid
 779  *   for all ports of the same NIC.
 780  * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global
 781  *   hash input set fields
 782  */
 783 enum rte_eth_hash_filter_info_type {
 784         RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
 785         /** Symmetric hash enable per port */
 786         RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
 787         /** Configure globally for hash filter */
 788         RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
 789         /** Global Hash filter input set configuration */
 790         RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
 791         RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
 792 };
 793
 794 /**
 795  * Hash function types.
 796  */
 797 enum rte_eth_hash_function {
 798         RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
 799         RTE_ETH_HASH_FUNCTION_TOEPLITZ, /**< Toeplitz */
 800         RTE_ETH_HASH_FUNCTION_SIMPLE_XOR, /**< Simple XOR */
 801         RTE_ETH_HASH_FUNCTION_MAX,
 802 };
 803
 804 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
 805         (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
 806 /**
 807  * A structure used to set or get global hash function configurations which
 808  * include symmetric hash enable per flow type and hash function type.
 809  * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the
 810  * corresponding flow type is enabled or not.
 811  * Each bit in valid_bit_mask[] indicates if the corresponding bit in
 812  * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it
 813  * also means if the flow type is supported by hardware or not.
 814  */
 815 struct rte_eth_hash_global_conf {
 816         enum rte_eth_hash_function hash_func; /**< Hash function type */
 817         /** Bit mask for symmetric hash enable per flow type */
 818         uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
 819         /** Bit mask indicates if the corresponding bit is valid */
 820         uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
 821 };
 822
 823 /**
 824  * A structure used to set or get hash filter information, to support filter
 825  * type of 'RTE_ETH_FILTER_HASH' and its operations.
 826  */
 827 struct rte_eth_hash_filter_info {
 828         enum rte_eth_hash_filter_info_type info_type; /**< Information type */
 829         /** Details of hash filter information */
 830         union {
 831                 /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */
 832                 uint8_t enable;
 833                 /** Global configurations of hash filter */
 834                 struct rte_eth_hash_global_conf global_conf;
 835                 /** Global configurations of hash filter input set */
 836                 struct rte_eth_input_set_conf input_set_conf;
 837         } info;
 838 };
 839
 840 /**
 841  * l2 tunnel configuration.
 842  */
 843 struct rte_eth_l2_tunnel_conf {
 844         enum rte_eth_tunnel_type l2_tunnel_type;
 845         uint16_t ether_type; /* ether type in l2 header */
 846         uint32_t tunnel_id; /* port tag id for e-tag */
 847         uint16_t vf_id; /* VF id for tag insertion */
 848         uint32_t pool; /* destination pool for tag based forwarding */
 849 };
 850
 851 #ifdef __cplusplus
 852 }
 853 #endif
 854
 855 #endif /* _RTE_ETH_CTRL_H_ */