1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 ; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
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28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
30 %ifndef _REG_SIZES_ASM_
31 %define _REG_SIZES_ASM_
33 %define EFLAGS_HAS_CPUID (1<<21)
34 %define FLAG_CPUID1_ECX_CLMUL (1<<1)
35 %define FLAG_CPUID1_EDX_SSE2 (1<<26)
36 %define FLAG_CPUID1_ECX_SSE3 (1)
37 %define FLAG_CPUID1_ECX_SSE4_1 (1<<19)
38 %define FLAG_CPUID1_ECX_SSE4_2 (1<<20)
39 %define FLAG_CPUID1_ECX_POPCNT (1<<23)
40 %define FLAG_CPUID1_ECX_AESNI (1<<25)
41 %define FLAG_CPUID1_ECX_OSXSAVE (1<<27)
42 %define FLAG_CPUID1_ECX_AVX (1<<28)
43 %define FLAG_CPUID1_EBX_AVX2 (1<<5)
44 %define FLAG_XGETBV_EAX_XMM_YMM 0x6
46 %define FLAG_CPUID1_EAX_AVOTON 0x000406d0
48 ; define d and w variants for registers
95 %define DWORD(reg) reg %+ d
96 %define WORD(reg) reg %+ w
97 %define BYTE(reg) reg %+ b
99 %define XWORD(reg) reg %+ x
101 %ifidn __OUTPUT_FORMAT__,elf32
102 section .note.GNU-stack noalloc noexec nowrite progbits
105 %ifidn __OUTPUT_FORMAT__,elf64
106 section .note.GNU-stack noalloc noexec nowrite progbits
109 %ifidn __OUTPUT_FORMAT__, macho64
110 %define elf64 macho64
115 global %1_slver_%2%3%4
123 %endif ; ifndef _REG_SIZES_ASM_