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31 ;;; gf_3vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
34 %include "reg_sizes.asm"
36 %ifidn __OUTPUT_FORMAT__, elf64
48 %define tmp3 r13 ; must be saved and restored
49 %define tmp4 r12 ; must be saved and restored
68 %ifidn __OUTPUT_FORMAT__, win64
74 %define arg4 r12 ; must be saved, loaded and restored
75 %define arg5 r15 ; must be saved and restored
80 %define tmp3 r13 ; must be saved and restored
81 %define tmp4 r14 ; must be saved and restored
88 %define stack_size 6*16 + 5*8 ; must be an odd multiple of 8
89 %define arg(x) [rsp + stack_size + PS + PS*x]
91 %define func(x) proc_frame x
93 alloc_stack stack_size
94 vmovdqa [rsp + 0*16], xmm6
95 vmovdqa [rsp + 1*16], xmm7
96 vmovdqa [rsp + 2*16], xmm8
97 vmovdqa [rsp + 3*16], xmm9
98 vmovdqa [rsp + 4*16], xmm10
99 vmovdqa [rsp + 5*16], xmm11
100 save_reg r12, 6*16 + 0*8
101 save_reg r13, 6*16 + 1*8
102 save_reg r14, 6*16 + 2*8
103 save_reg r15, 6*16 + 3*8
108 %macro FUNC_RESTORE 0
109 vmovdqa xmm6, [rsp + 0*16]
110 vmovdqa xmm7, [rsp + 1*16]
111 vmovdqa xmm8, [rsp + 2*16]
112 vmovdqa xmm9, [rsp + 3*16]
113 vmovdqa xmm10, [rsp + 4*16]
114 vmovdqa xmm11, [rsp + 5*16]
115 mov r12, [rsp + 6*16 + 0*8]
116 mov r13, [rsp + 6*16 + 1*8]
117 mov r14, [rsp + 6*16 + 2*8]
118 mov r15, [rsp + 6*16 + 3*8]
123 %ifidn __OUTPUT_FORMAT__, elf32
125 ;;;================== High Address;
132 ;;;<================= esp of caller
134 ;;;<================= ebp = esp
140 ;;;<================= esp of callee
142 ;;;================== Low Address;
147 %define arg(x) [ebp + PS*2 + PS*x]
148 %define var(x) [ebp - PS - PS*x]
152 %define arg0 trans ;trans and trans2 are for the variables in stack
153 %define arg0_m arg(0)
156 %define arg2_m arg(2)
158 %define arg3_m arg(3)
160 %define arg4_m arg(4)
167 %define tmp3_m var(0)
169 %define tmp4_m var(1)
171 %macro SLDR 2 ;stack load/restore
179 sub esp, PS*2 ;2 local variables
186 %macro FUNC_RESTORE 0
190 add esp, PS*2 ;2 local variables
194 %endif ; output formats
198 %define mul_array arg2
208 %ifidn PS,4 ;32-bit code
211 %define dest1_m arg4_m
212 %define dest2_m tmp3_m
213 %define dest3_m tmp4_m
216 %ifndef EC_ALIGNED_ADDR
217 ;;; Use Un-aligned load/store
221 ;;; Use Non-temporal load/stor
226 %define XLDR vmovntdqa
227 %define XSTR vmovntdq
231 %ifidn PS,8 ;64-bit code
238 %ifidn PS,8 ;64-bit code
239 %define xmask0f ymm11
240 %define xmask0fx xmm11
241 %define xgft1_lo ymm10
242 %define xgft1_hi ymm9
243 %define xgft2_lo ymm8
244 %define xgft2_hi ymm7
245 %define xgft3_lo ymm6
246 %define xgft3_hi ymm5
255 %define xmask0fx xmm7
256 %define xgft1_lo ymm6
257 %define xgft1_hi ymm5
258 %define xgft2_lo xgft1_lo
259 %define xgft2_hi xgft1_hi
260 %define xgft3_lo xgft1_lo
261 %define xgft3_hi xgft1_hi
272 global gf_3vect_dot_prod_avx2:function
273 func(gf_3vect_dot_prod_avx2)
281 vpinsrb xmask0fx, xmask0fx, tmp.w, 0
282 vpbroadcastb xmask0f, xmask0fx ;Construct mask 0x0f0f0f...
284 sal vec, LOG_PS ;vec *= PS. Make vec_i count by PS
286 mov dest2, [dest1+PS]
288 mov dest3, [dest1+2*PS]
304 vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
305 ; " Ax{00}, Ax{10}, ..., Ax{f0}
306 vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
307 vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
308 %ifidn PS,8 ; 64-bit code
309 vmovdqu xgft2_lo, [tmp+vec*(32/PS)] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
310 ; " Bx{00}, Bx{10}, ..., Bx{f0}
311 vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
312 vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
314 vmovdqu xgft3_lo, [tmp+vec*(64/PS)] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
315 ; " Cx{00}, Cx{10}, ..., Cx{f0}
316 vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
317 vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
322 XLDR x0, [ptr+pos] ;Get next source vector
324 vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
325 vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
326 vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
328 vpshufb xgft1_hi, x0 ;Lookup mul table of high nibble
329 vpshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
330 vpxor xgft1_hi, xgft1_lo ;GF add high and low partials
331 vpxor xp1, xgft1_hi ;xp1 += partial
333 %ifidn PS,4 ; 32-bit code
334 vmovdqu xgft2_lo, [tmp+vec*(32/PS)] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
335 ; " Bx{00}, Bx{10}, ..., Bx{f0}
336 vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
337 vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
339 vpshufb xgft2_hi, x0 ;Lookup mul table of high nibble
340 vpshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
341 vpxor xgft2_hi, xgft2_lo ;GF add high and low partials
342 vpxor xp2, xgft2_hi ;xp2 += partial
344 %ifidn PS,4 ; 32-bit code
346 vmovdqu xgft3_lo, [tmp+vec*(32/PS)] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
347 ; " Cx{00}, Cx{10}, ..., Cx{f0}
348 vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
349 vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
354 vpshufb xgft3_hi, x0 ;Lookup mul table of high nibble
355 vpshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
356 vpxor xgft3_hi, xgft3_lo ;GF add high and low partials
357 vpxor xp3, xgft3_hi ;xp3 += partial
364 XSTR [dest1+pos], xp1
365 XSTR [dest2+pos], xp2
367 XSTR [dest3+pos], xp3
370 add pos, 32 ;Loop on 32 bytes at a time
379 mov pos, len ;Overlapped offset length-16
380 jmp .loop32 ;Do one more overlap pass
396 ;;; func core, ver, snum
397 slversion gf_3vect_dot_prod_avx2, 04, 05, 0197