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31 ;;; gf_4vect_dot_prod_avx512(len, vec, *g_tbls, **buffs, **dests);
34 %include "reg_sizes.asm"
36 %ifdef HAVE_AS_KNOWS_AVX512
38 %ifidn __OUTPUT_FORMAT__, elf64
50 %define tmp3 r13 ; must be saved and restored
51 %define tmp4 r12 ; must be saved and restored
52 %define tmp5 r14 ; must be saved and restored
53 %define tmp6 r15 ; must be saved and restored
73 %ifidn __OUTPUT_FORMAT__, win64
79 %define arg4 r12 ; must be saved, loaded and restored
80 %define arg5 r15 ; must be saved and restored
85 %define tmp3 r13 ; must be saved and restored
86 %define tmp4 r14 ; must be saved and restored
87 %define tmp5 rdi ; must be saved and restored
88 %define tmp6 rsi ; must be saved and restored
92 %define stack_size 9*16 + 7*8 ; must be an odd multiple of 8
93 %define arg(x) [rsp + stack_size + PS + PS*x]
95 %define func(x) proc_frame x
97 alloc_stack stack_size
98 vmovdqa [rsp + 0*16], xmm6
99 vmovdqa [rsp + 1*16], xmm7
100 vmovdqa [rsp + 2*16], xmm8
101 vmovdqa [rsp + 3*16], xmm9
102 vmovdqa [rsp + 4*16], xmm10
103 vmovdqa [rsp + 5*16], xmm11
104 vmovdqa [rsp + 6*16], xmm12
105 vmovdqa [rsp + 7*16], xmm13
106 vmovdqa [rsp + 8*16], xmm14
107 save_reg r12, 9*16 + 0*8
108 save_reg r13, 9*16 + 1*8
109 save_reg r14, 9*16 + 2*8
110 save_reg r15, 9*16 + 3*8
111 save_reg rdi, 9*16 + 4*8
112 save_reg rsi, 9*16 + 5*8
117 %macro FUNC_RESTORE 0
118 vmovdqa xmm6, [rsp + 0*16]
119 vmovdqa xmm7, [rsp + 1*16]
120 vmovdqa xmm8, [rsp + 2*16]
121 vmovdqa xmm9, [rsp + 3*16]
122 vmovdqa xmm10, [rsp + 4*16]
123 vmovdqa xmm11, [rsp + 5*16]
124 vmovdqa xmm12, [rsp + 6*16]
125 vmovdqa xmm13, [rsp + 7*16]
126 vmovdqa xmm14, [rsp + 8*16]
127 mov r12, [rsp + 9*16 + 0*8]
128 mov r13, [rsp + 9*16 + 1*8]
129 mov r14, [rsp + 9*16 + 2*8]
130 mov r15, [rsp + 9*16 + 3*8]
131 mov rdi, [rsp + 9*16 + 4*8]
132 mov rsi, [rsp + 9*16 + 5*8]
140 %define mul_array arg2
152 %ifndef EC_ALIGNED_ADDR
153 ;;; Use Un-aligned load/store
154 %define XLDR vmovdqu8
155 %define XSTR vmovdqu8
157 ;;; Use Non-temporal load/stor
162 %define XLDR vmovntdqa
163 %define XSTR vmovntdq
167 %define xmask0f zmm14
168 %define xgft1_lo zmm13
169 %define xgft1_loy ymm13
170 %define xgft1_hi zmm12
171 %define xgft2_lo zmm11
172 %define xgft2_loy ymm11
173 %define xgft2_hi zmm10
174 %define xgft3_lo zmm9
175 %define xgft3_loy ymm9
176 %define xgft3_hi zmm8
177 %define xgft4_lo zmm7
178 %define xgft4_loy ymm7
179 %define xgft4_hi zmm6
194 global gf_4vect_dot_prod_avx512:function
195 func(gf_4vect_dot_prod_avx512)
202 vpbroadcastb xmask0f, tmp ;Construct mask 0x0f0f0f...
205 sal vec, LOG_PS ;vec *= PS. Make vec_i count by PS
206 mov dest2, [dest1+PS]
207 mov dest3, [dest1+2*PS]
208 mov dest4, [dest1+3*PS]
221 XLDR x0, [ptr+pos] ;Get next source vector
224 vpandq xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
225 vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
226 vpandq x0, x0, xmask0f ;Mask high src nibble in bits 4-0
228 vmovdqu8 xgft1_loy, [tmp] ;Load array Ax{00}..{0f}, Ax{00}..{f0}
229 vmovdqu8 xgft2_loy, [tmp+vec*(32/PS)] ;Load array Bx{00}..{0f}, Bx{00}..{f0}
230 vmovdqu8 xgft3_loy, [tmp+vec*(64/PS)] ;Load array Cx{00}..{0f}, Cx{00}..{f0}
231 vmovdqu8 xgft4_loy, [tmp+vskip3] ;Load array Dx{00}..{0f}, Dx{00}..{f0}
234 vshufi64x2 xgft1_hi, xgft1_lo, xgft1_lo, 0x55
235 vshufi64x2 xgft1_lo, xgft1_lo, xgft1_lo, 0x00
236 vshufi64x2 xgft2_hi, xgft2_lo, xgft2_lo, 0x55
237 vshufi64x2 xgft2_lo, xgft2_lo, xgft2_lo, 0x00
239 vpshufb xgft1_hi, xgft1_hi, x0 ;Lookup mul table of high nibble
240 vpshufb xgft1_lo, xgft1_lo, xtmpa ;Lookup mul table of low nibble
241 vpxorq xgft1_hi, xgft1_hi, xgft1_lo ;GF add high and low partials
242 vpxorq xp1, xp1, xgft1_hi ;xp1 += partial
244 vpshufb xgft2_hi, xgft2_hi, x0 ;Lookup mul table of high nibble
245 vpshufb xgft2_lo, xgft2_lo, xtmpa ;Lookup mul table of low nibble
246 vpxorq xgft2_hi, xgft2_hi, xgft2_lo ;GF add high and low partials
247 vpxorq xp2, xp2, xgft2_hi ;xp2 += partial
249 vshufi64x2 xgft3_hi, xgft3_lo, xgft3_lo, 0x55
250 vshufi64x2 xgft3_lo, xgft3_lo, xgft3_lo, 0x00
251 vshufi64x2 xgft4_hi, xgft4_lo, xgft4_lo, 0x55
252 vshufi64x2 xgft4_lo, xgft4_lo, xgft4_lo, 0x00
254 vpshufb xgft3_hi, xgft3_hi, x0 ;Lookup mul table of high nibble
255 vpshufb xgft3_lo, xgft3_lo, xtmpa ;Lookup mul table of low nibble
256 vpxorq xgft3_hi, xgft3_hi, xgft3_lo ;GF add high and low partials
257 vpxorq xp3, xp3, xgft3_hi ;xp3 += partial
259 vpshufb xgft4_hi, xgft4_hi, x0 ;Lookup mul table of high nibble
260 vpshufb xgft4_lo, xgft4_lo, xtmpa ;Lookup mul table of low nibble
261 vpxorq xgft4_hi, xgft4_hi, xgft4_lo ;GF add high and low partials
262 vpxorq xp4, xp4, xgft4_hi ;xp4 += partial
267 XSTR [dest1+pos], xp1
268 XSTR [dest2+pos], xp2
269 XSTR [dest3+pos], xp3
270 XSTR [dest4+pos], xp4
272 add pos, 64 ;Loop on 64 bytes at a time
281 mov pos, len ;Overlapped offset length-64
282 jmp .loop64 ;Do one more overlap pass
297 %ifidn __OUTPUT_FORMAT__, win64
298 global no_gf_4vect_dot_prod_avx512
299 no_gf_4vect_dot_prod_avx512:
301 %endif ; ifdef HAVE_AS_KNOWS_AVX512