ceph/src/seastar/dpdk/drivers/crypto/qat/qat_adf/qat_algs.h

   1 /*
   2  *  This file is provided under a dual BSD/GPLv2 license.  When using or
   3  *  redistributing this file, you may do so under either license.
   4  *
   5  *  GPL LICENSE SUMMARY
   6  *  Copyright(c) 2015-2016 Intel Corporation.
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of version 2 of the GNU General Public License as
   9  *  published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful, but
  12  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  *  General Public License for more details.
  15  *
  16  *  Contact Information:
  17  *  qat-linux@intel.com
  18  *
  19  *  BSD LICENSE
  20  *  Copyright(c) 2015-2016 Intel Corporation.
  21  *  Redistribution and use in source and binary forms, with or without
  22  *  modification, are permitted provided that the following conditions
  23  *  are met:
  24  *
  25  *    * Redistributions of source code must retain the above copyright
  26  *      notice, this list of conditions and the following disclaimer.
  27  *    * Redistributions in binary form must reproduce the above copyright
  28  *      notice, this list of conditions and the following disclaimer in
  29  *      the documentation and/or other materials provided with the
  30  *      distribution.
  31  *    * Neither the name of Intel Corporation nor the names of its
  32  *      contributors may be used to endorse or promote products derived
  33  *      from this software without specific prior written permission.
  34  *
  35  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  36  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  37  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  38  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  39  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  40  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  41  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  42  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  43  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  45  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46  */
  47 #ifndef _ICP_QAT_ALGS_H_
  48 #define _ICP_QAT_ALGS_H_
  49 #include <rte_memory.h>
  50 #include <rte_crypto.h>
  51 #include "icp_qat_hw.h"
  52 #include "icp_qat_fw.h"
  53 #include "icp_qat_fw_la.h"
  54
  55 /*
  56  * Key Modifier (KM) value used in KASUMI algorithm in F9 mode to XOR
  57  * Integrity Key (IK)
  58  */
  59 #define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
  60
  61 #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
  62
  63 /* 3DES key sizes */
  64 #define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
  65 #define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
  66
  67 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
  68         ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
  69                                         ICP_QAT_HW_CIPHER_NO_CONVERT, \
  70                                         ICP_QAT_HW_CIPHER_ENCRYPT)
  71
  72 #define QAT_AES_HW_CONFIG_CBC_DEC(alg) \
  73         ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
  74                                         ICP_QAT_HW_CIPHER_KEY_CONVERT, \
  75                                         ICP_QAT_HW_CIPHER_DECRYPT)
  76
  77 struct qat_alg_buf {
  78         uint32_t len;
  79         uint32_t resrvd;
  80         uint64_t addr;
  81 } __rte_packed;
  82
  83 enum qat_crypto_proto_flag {
  84         QAT_CRYPTO_PROTO_FLAG_NONE = 0,
  85         QAT_CRYPTO_PROTO_FLAG_CCM = 1,
  86         QAT_CRYPTO_PROTO_FLAG_GCM = 2,
  87         QAT_CRYPTO_PROTO_FLAG_SNOW3G = 3,
  88         QAT_CRYPTO_PROTO_FLAG_ZUC = 4
  89 };
  90
  91 /*
  92  * Maximum number of SGL entries
  93  */
  94 #define QAT_SGL_MAX_NUMBER      16
  95
  96 struct qat_alg_buf_list {
  97         uint64_t resrvd;
  98         uint32_t num_bufs;
  99         uint32_t num_mapped_bufs;
 100         struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
 101 } __rte_packed __rte_cache_aligned;
 102
 103 struct qat_crypto_op_cookie {
 104         struct qat_alg_buf_list qat_sgl_list_src;
 105         struct qat_alg_buf_list qat_sgl_list_dst;
 106         phys_addr_t qat_sgl_src_phys_addr;
 107         phys_addr_t qat_sgl_dst_phys_addr;
 108 };
 109
 110 /* Common content descriptor */
 111 struct qat_alg_cd {
 112         struct icp_qat_hw_cipher_algo_blk cipher;
 113         struct icp_qat_hw_auth_algo_blk hash;
 114 } __rte_packed __rte_cache_aligned;
 115
 116 struct qat_session {
 117         enum icp_qat_fw_la_cmd_id qat_cmd;
 118         enum icp_qat_hw_cipher_algo qat_cipher_alg;
 119         enum icp_qat_hw_cipher_dir qat_dir;
 120         enum icp_qat_hw_cipher_mode qat_mode;
 121         enum icp_qat_hw_auth_algo qat_hash_alg;
 122         enum icp_qat_hw_auth_op auth_op;
 123         void *bpi_ctx;
 124         struct qat_alg_cd cd;
 125         uint8_t *cd_cur_ptr;
 126         phys_addr_t cd_paddr;
 127         struct icp_qat_fw_la_bulk_req fw_req;
 128         uint8_t aad_len;
 129         struct qat_crypto_instance *inst;
 130         rte_spinlock_t lock;    /* protects this struct */
 131 };
 132
 133 struct qat_alg_ablkcipher_cd {
 134         struct icp_qat_hw_cipher_algo_blk *cd;
 135         phys_addr_t cd_paddr;
 136         struct icp_qat_fw_la_bulk_req fw_req;
 137         struct qat_crypto_instance *inst;
 138         rte_spinlock_t lock;    /* protects this struct */
 139 };
 140
 141 int qat_get_inter_state_size(enum icp_qat_hw_auth_algo qat_hash_alg);
 142
 143 int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cd,
 144                                                 uint8_t *enckey,
 145                                                 uint32_t enckeylen);
 146
 147 int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 148                                                 uint8_t *authkey,
 149                                                 uint32_t authkeylen,
 150                                                 uint32_t add_auth_data_length,
 151                                                 uint32_t digestsize,
 152                                                 unsigned int operation);
 153
 154 void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,
 155                                         enum qat_crypto_proto_flag proto_flags);
 156
 157 void qat_alg_ablkcipher_init_enc(struct qat_alg_ablkcipher_cd *cd,
 158                                         int alg, const uint8_t *key,
 159                                         unsigned int keylen);
 160
 161 void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
 162                                         int alg, const uint8_t *key,
 163                                         unsigned int keylen);
 164
 165 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 166 int qat_alg_validate_aes_docsisbpi_key(int key_len,
 167                                         enum icp_qat_hw_cipher_algo *alg);
 168 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 169 int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 170 int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 171 int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 172 int qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);
 173 int qat_alg_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 174 #endif