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1 /*-
2 * BSD LICENSE
3 *
4 * Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <rte_common.h>
35 #include <rte_dev.h>
36 #include <rte_malloc.h>
37 #include <rte_cryptodev_pmd.h>
38
39 #include "qat_crypto.h"
40 #include "qat_logs.h"
41
42 static const struct rte_cryptodev_capabilities qat_cpm16_capabilities[] = {
43 QAT_BASE_CPM16_SYM_CAPABILITIES,
44 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
45 };
46
47 static const struct rte_cryptodev_capabilities qat_cpm17_capabilities[] = {
48 QAT_BASE_CPM16_SYM_CAPABILITIES,
49 QAT_EXTRA_CPM17_SYM_CAPABILITIES,
50 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
51 };
52
53 static struct rte_cryptodev_ops crypto_qat_ops = {
54
55 /* Device related operations */
56 .dev_configure = qat_dev_config,
57 .dev_start = qat_dev_start,
58 .dev_stop = qat_dev_stop,
59 .dev_close = qat_dev_close,
60 .dev_infos_get = qat_dev_info_get,
61
62 .stats_get = qat_crypto_sym_stats_get,
63 .stats_reset = qat_crypto_sym_stats_reset,
64 .queue_pair_setup = qat_crypto_sym_qp_setup,
65 .queue_pair_release = qat_crypto_sym_qp_release,
66 .queue_pair_start = NULL,
67 .queue_pair_stop = NULL,
68 .queue_pair_count = NULL,
69
70 /* Crypto related operations */
71 .session_get_size = qat_crypto_sym_get_session_private_size,
72 .session_configure = qat_crypto_sym_configure_session,
73 .session_initialize = qat_crypto_sym_session_init,
74 .session_clear = qat_crypto_sym_clear_session
75 };
76
77 /*
78 * The set of PCI devices this driver supports
79 */
80
81 static const struct rte_pci_id pci_id_qat_map[] = {
82 {
83 RTE_PCI_DEVICE(0x8086, 0x0443),
84 },
85 {
86 RTE_PCI_DEVICE(0x8086, 0x37c9),
87 },
88 {
89 RTE_PCI_DEVICE(0x8086, 0x19e3),
90 },
91 {
92 RTE_PCI_DEVICE(0x8086, 0x6f55),
93 },
94 {.device_id = 0},
95 };
96
97 static int
98 crypto_qat_dev_init(__attribute__((unused)) struct rte_cryptodev_driver *crypto_drv,
99 struct rte_cryptodev *cryptodev)
100 {
101 struct qat_pmd_private *internals;
102
103 PMD_INIT_FUNC_TRACE();
104 PMD_DRV_LOG(DEBUG, "Found crypto device at %02x:%02x.%x",
105 RTE_DEV_TO_PCI(cryptodev->device)->addr.bus,
106 RTE_DEV_TO_PCI(cryptodev->device)->addr.devid,
107 RTE_DEV_TO_PCI(cryptodev->device)->addr.function);
108
109 cryptodev->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
110 cryptodev->dev_ops = &crypto_qat_ops;
111
112 cryptodev->enqueue_burst = qat_pmd_enqueue_op_burst;
113 cryptodev->dequeue_burst = qat_pmd_dequeue_op_burst;
114
115 cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
116 RTE_CRYPTODEV_FF_HW_ACCELERATED |
117 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
118 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;
119
120 internals = cryptodev->data->dev_private;
121 internals->max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS;
122 switch (RTE_DEV_TO_PCI(cryptodev->device)->id.device_id) {
123 case 0x0443:
124 internals->qat_dev_capabilities = qat_cpm16_capabilities;
125 break;
126 case 0x37c9:
127 case 0x19e3:
128 case 0x6f55:
129 internals->qat_dev_capabilities = qat_cpm17_capabilities;
130 break;
131 default:
132 PMD_DRV_LOG(ERR,
133 "Invalid dev_id, can't determine capabilities");
134 break;
135 }
136
137 /*
138 * For secondary processes, we don't initialise any further as primary
139 * has already done this work. Only check we don't need a different
140 * RX function
141 */
142 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
143 PMD_DRV_LOG(DEBUG, "Device already initialised by primary process");
144 return 0;
145 }
146
147 return 0;
148 }
149
150 static struct rte_cryptodev_driver rte_qat_pmd = {
151 .pci_drv = {
152 .id_table = pci_id_qat_map,
153 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
154 .probe = rte_cryptodev_pci_probe,
155 .remove = rte_cryptodev_pci_remove,
156 },
157 .cryptodev_init = crypto_qat_dev_init,
158 .dev_private_size = sizeof(struct qat_pmd_private),
159 };
160
161 RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_QAT_SYM_PMD, rte_qat_pmd.pci_drv);
162 RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_QAT_SYM_PMD, pci_id_qat_map);
163