1 /* SPDX-License-Identifier: BSD-3-Clause
5 #ifndef __DPAA_EVENTDEV_H__
6 #define __DPAA_EVENTDEV_H__
8 #include <rte_eventdev_pmd.h>
9 #include <rte_eventdev_pmd_vdev.h>
10 #include <rte_atomic.h>
11 #include <rte_per_lcore.h>
13 #define EVENTDEV_NAME_DPAA_PMD event_dpaa1
15 #define DPAA_EVENT_MAX_PORTS 4
16 #define DPAA_EVENT_MAX_QUEUES 8
17 #define DPAA_EVENT_MIN_DEQUEUE_TIMEOUT 1
18 #define DPAA_EVENT_MAX_DEQUEUE_TIMEOUT (UINT32_MAX - 1)
19 #define DPAA_EVENT_MAX_QUEUE_FLOWS 2048
20 #define DPAA_EVENT_MAX_QUEUE_PRIORITY_LEVELS 8
21 #define DPAA_EVENT_MAX_EVENT_PRIORITY_LEVELS 0
22 #define DPAA_EVENT_MAX_EVENT_PORT RTE_MIN(RTE_MAX_LCORE, INT8_MAX)
23 #define DPAA_EVENT_MAX_PORT_DEQUEUE_DEPTH 8
24 #define DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_NS 100000UL
25 #define DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_INVALID ((uint64_t)-1)
26 #define DPAA_EVENT_MAX_PORT_ENQUEUE_DEPTH 1
27 #define DPAA_EVENT_MAX_NUM_EVENTS (INT32_MAX - 1)
29 #define DPAA_EVENT_DEV_CAP \
31 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | \
32 RTE_EVENT_DEV_CAP_BURST_MODE; \
35 #define DPAA_EVENT_QUEUE_ATOMIC_FLOWS 0
36 #define DPAA_EVENT_QUEUE_ORDER_SEQUENCES 2048
38 #define RTE_EVENT_ETH_RX_ADAPTER_DPAA_CAP \
39 (RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
40 RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
41 RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
46 /* Configuration provided by the user */
47 uint32_t event_queue_cfg
;
48 uint32_t event_queue_id
;
54 struct dpaa_eventq evq_info
[DPAA_EVENT_MAX_QUEUES
];
55 uint8_t num_linked_evq
;
56 uint8_t is_port_linked
;
60 struct dpaa_eventdev
{
61 struct dpaa_eventq evq_info
[DPAA_EVENT_MAX_QUEUES
];
62 struct dpaa_port ports
[DPAA_EVENT_MAX_PORTS
];
63 uint32_t dequeue_timeout_ns
;
64 uint32_t nb_events_limit
;
65 uint8_t max_event_queues
;
66 uint8_t nb_event_queues
;
67 uint8_t nb_event_ports
;
69 uint32_t nb_event_queue_flows
;
70 uint32_t nb_event_port_dequeue_depth
;
71 uint32_t nb_event_port_enqueue_depth
;
72 uint32_t event_dev_cfg
;
74 #endif /* __DPAA_EVENTDEV_H__ */