1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2018 Atomic Rules LLC
11 ark_udm_verify(struct ark_udm_t
*udm
)
13 if (sizeof(struct ark_udm_t
) != ARK_UDM_EXPECT_SIZE
) {
15 "ARK: UDM structure looks incorrect %d vs %zd\n",
16 ARK_UDM_EXPECT_SIZE
, sizeof(struct ark_udm_t
));
20 if (udm
->setup
.const0
!= ARK_UDM_CONST
) {
22 "ARK: UDM module not found as expected 0x%08x\n",
30 ark_udm_stop(struct ark_udm_t
*udm
, const int wait
)
36 while (wait
&& (udm
->cfg
.stop_flushed
& 0x01) == 0) {
46 ark_udm_reset(struct ark_udm_t
*udm
)
50 status
= ark_udm_stop(udm
, 1);
52 PMD_DEBUG_LOG(INFO
, "%s stop failed doing forced reset\n",
57 status
= ark_udm_stop(udm
, 0);
58 PMD_DEBUG_LOG(INFO
, "%s stop status %d post failure"
59 " and forced reset\n",
69 ark_udm_start(struct ark_udm_t
*udm
)
75 ark_udm_stats_reset(struct ark_udm_t
*udm
)
77 udm
->pcibp
.pci_clear
= 1;
78 udm
->tlp_ps
.tlp_clear
= 1;
82 ark_udm_configure(struct ark_udm_t
*udm
,
85 uint32_t write_interval_ns
)
87 /* headroom and data room are in DWords in the UDM */
88 udm
->cfg
.dataroom
= dataroom
/ 4;
89 udm
->cfg
.headroom
= headroom
/ 4;
92 udm
->rt_cfg
.write_interval
= write_interval_ns
/ 4;
96 ark_udm_write_addr(struct ark_udm_t
*udm
, rte_iova_t addr
)
98 udm
->rt_cfg
.hw_prod_addr
= addr
;
102 ark_udm_is_flushed(struct ark_udm_t
*udm
)
104 return (udm
->cfg
.stop_flushed
& 0x01) != 0;
108 ark_udm_dropped(struct ark_udm_t
*udm
)
110 return udm
->qstats
.q_pkt_drop
;
114 ark_udm_bytes(struct ark_udm_t
*udm
)
116 return udm
->qstats
.q_byte_count
;
120 ark_udm_packets(struct ark_udm_t
*udm
)
122 return udm
->qstats
.q_ff_packet_count
;
126 ark_udm_dump_stats(struct ark_udm_t
*udm
, const char *msg
)
128 PMD_STATS_LOG(INFO
, "UDM Stats: %s"
129 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64
"\n",
131 "Pkts Received", udm
->stats
.rx_packet_count
,
132 "Pkts Finalized", udm
->stats
.rx_sent_packets
,
133 "Pkts Dropped", udm
->tlp
.pkt_drop
,
134 "Bytes Count", udm
->stats
.rx_byte_count
,
135 "MBuf Count", udm
->stats
.rx_mbuf_count
);
139 ark_udm_dump_queue_stats(struct ark_udm_t
*udm
, const char *msg
, uint16_t qid
)
141 PMD_STATS_LOG(INFO
, "UDM Queue %3u Stats: %s"
146 "Pkts Received", udm
->qstats
.q_packet_count
,
147 "Pkts Finalized", udm
->qstats
.q_ff_packet_count
,
148 "Pkts Dropped", udm
->qstats
.q_pkt_drop
,
149 "Bytes Count", udm
->qstats
.q_byte_count
,
150 "MBuf Count", udm
->qstats
.q_mbuf_count
);
154 ark_udm_dump(struct ark_udm_t
*udm
, const char *msg
)
156 PMD_DEBUG_LOG(DEBUG
, "UDM Dump: %s Stopped: %d\n", msg
,
157 udm
->cfg
.stop_flushed
);
161 ark_udm_dump_setup(struct ark_udm_t
*udm
, uint16_t q_id
)
163 PMD_DEBUG_LOG(DEBUG
, "UDM Setup Q: %u"
164 ARK_SU64X ARK_SU32
"\n",
166 "hw_prod_addr", udm
->rt_cfg
.hw_prod_addr
,
167 "prod_idx", udm
->rt_cfg
.prod_idx
);
171 ark_udm_dump_perf(struct ark_udm_t
*udm
, const char *msg
)
173 struct ark_udm_pcibp_t
*bp
= &udm
->pcibp
;
175 PMD_STATS_LOG(INFO
, "UDM Performance %s"
176 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32
179 "PCI Empty", bp
->pci_empty
,
180 "PCI Q1", bp
->pci_q1
,
181 "PCI Q2", bp
->pci_q2
,
182 "PCI Q3", bp
->pci_q3
,
183 "PCI Q4", bp
->pci_q4
,
184 "PCI Full", bp
->pci_full
);
188 ark_udm_queue_stats_reset(struct ark_udm_t
*udm
)
190 udm
->qstats
.q_byte_count
= 1;
194 ark_udm_queue_enable(struct ark_udm_t
*udm
, int enable
)
196 udm
->qstats
.q_enable
= enable
? 1 : 0;