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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2013-2016 Intel Corporation
3 */
4
5 #include <inttypes.h>
6
7 #include <rte_ethdev_driver.h>
8 #include <rte_common.h>
9 #include <rte_net.h>
10 #include "fm10k.h"
11 #include "base/fm10k_type.h"
12
13 #ifdef RTE_PMD_PACKET_PREFETCH
14 #define rte_packet_prefetch(p) rte_prefetch1(p)
15 #else
16 #define rte_packet_prefetch(p) do {} while (0)
17 #endif
18
19 #ifdef RTE_LIBRTE_FM10K_DEBUG_RX
20 static inline void dump_rxd(union fm10k_rx_desc *rxd)
21 {
22 PMD_RX_LOG(DEBUG, "+----------------|----------------+");
23 PMD_RX_LOG(DEBUG, "| GLORT | PKT HDR & TYPE |");
24 PMD_RX_LOG(DEBUG, "| 0x%08x | 0x%08x |", rxd->d.glort,
25 rxd->d.data);
26 PMD_RX_LOG(DEBUG, "+----------------|----------------+");
27 PMD_RX_LOG(DEBUG, "| VLAN & LEN | STATUS |");
28 PMD_RX_LOG(DEBUG, "| 0x%08x | 0x%08x |", rxd->d.vlan_len,
29 rxd->d.staterr);
30 PMD_RX_LOG(DEBUG, "+----------------|----------------+");
31 PMD_RX_LOG(DEBUG, "| RESERVED | RSS_HASH |");
32 PMD_RX_LOG(DEBUG, "| 0x%08x | 0x%08x |", 0, rxd->d.rss);
33 PMD_RX_LOG(DEBUG, "+----------------|----------------+");
34 PMD_RX_LOG(DEBUG, "| TIME TAG |");
35 PMD_RX_LOG(DEBUG, "| 0x%016"PRIx64" |", rxd->q.timestamp);
36 PMD_RX_LOG(DEBUG, "+----------------|----------------+");
37 }
38 #endif
39
40 #define FM10K_TX_OFFLOAD_MASK ( \
41 PKT_TX_VLAN_PKT | \
42 PKT_TX_IPV6 | \
43 PKT_TX_IPV4 | \
44 PKT_TX_IP_CKSUM | \
45 PKT_TX_L4_MASK | \
46 PKT_TX_TCP_SEG)
47
48 #define FM10K_TX_OFFLOAD_NOTSUP_MASK \
49 (PKT_TX_OFFLOAD_MASK ^ FM10K_TX_OFFLOAD_MASK)
50
51 /* @note: When this function is changed, make corresponding change to
52 * fm10k_dev_supported_ptypes_get()
53 */
54 static inline void
55 rx_desc_to_ol_flags(struct rte_mbuf *m, const union fm10k_rx_desc *d)
56 {
57 static const uint32_t
58 ptype_table[FM10K_RXD_PKTTYPE_MASK >> FM10K_RXD_PKTTYPE_SHIFT]
59 __rte_cache_aligned = {
60 [FM10K_PKTTYPE_OTHER] = RTE_PTYPE_L2_ETHER,
61 [FM10K_PKTTYPE_IPV4] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
62 [FM10K_PKTTYPE_IPV4_EX] = RTE_PTYPE_L2_ETHER |
63 RTE_PTYPE_L3_IPV4_EXT,
64 [FM10K_PKTTYPE_IPV6] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6,
65 [FM10K_PKTTYPE_IPV6_EX] = RTE_PTYPE_L2_ETHER |
66 RTE_PTYPE_L3_IPV6_EXT,
67 [FM10K_PKTTYPE_IPV4 | FM10K_PKTTYPE_TCP] = RTE_PTYPE_L2_ETHER |
68 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP,
69 [FM10K_PKTTYPE_IPV6 | FM10K_PKTTYPE_TCP] = RTE_PTYPE_L2_ETHER |
70 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP,
71 [FM10K_PKTTYPE_IPV4 | FM10K_PKTTYPE_UDP] = RTE_PTYPE_L2_ETHER |
72 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP,
73 [FM10K_PKTTYPE_IPV6 | FM10K_PKTTYPE_UDP] = RTE_PTYPE_L2_ETHER |
74 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP,
75 };
76
77 m->packet_type = ptype_table[(d->w.pkt_info & FM10K_RXD_PKTTYPE_MASK)
78 >> FM10K_RXD_PKTTYPE_SHIFT];
79
80 if (d->w.pkt_info & FM10K_RXD_RSSTYPE_MASK)
81 m->ol_flags |= PKT_RX_RSS_HASH;
82
83 if (unlikely((d->d.staterr &
84 (FM10K_RXD_STATUS_IPCS | FM10K_RXD_STATUS_IPE)) ==
85 (FM10K_RXD_STATUS_IPCS | FM10K_RXD_STATUS_IPE)))
86 m->ol_flags |= PKT_RX_IP_CKSUM_BAD;
87 else
88 m->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
89
90 if (unlikely((d->d.staterr &
91 (FM10K_RXD_STATUS_L4CS | FM10K_RXD_STATUS_L4E)) ==
92 (FM10K_RXD_STATUS_L4CS | FM10K_RXD_STATUS_L4E)))
93 m->ol_flags |= PKT_RX_L4_CKSUM_BAD;
94 else
95 m->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
96 }
97
98 uint16_t
99 fm10k_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
100 uint16_t nb_pkts)
101 {
102 struct rte_mbuf *mbuf;
103 union fm10k_rx_desc desc;
104 struct fm10k_rx_queue *q = rx_queue;
105 uint16_t count = 0;
106 int alloc = 0;
107 uint16_t next_dd;
108 int ret;
109
110 next_dd = q->next_dd;
111
112 nb_pkts = RTE_MIN(nb_pkts, q->alloc_thresh);
113 for (count = 0; count < nb_pkts; ++count) {
114 if (!(q->hw_ring[next_dd].d.staterr & FM10K_RXD_STATUS_DD))
115 break;
116 mbuf = q->sw_ring[next_dd];
117 desc = q->hw_ring[next_dd];
118 #ifdef RTE_LIBRTE_FM10K_DEBUG_RX
119 dump_rxd(&desc);
120 #endif
121 rte_pktmbuf_pkt_len(mbuf) = desc.w.length;
122 rte_pktmbuf_data_len(mbuf) = desc.w.length;
123
124 mbuf->ol_flags = 0;
125 #ifdef RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE
126 rx_desc_to_ol_flags(mbuf, &desc);
127 #endif
128
129 mbuf->hash.rss = desc.d.rss;
130 /**
131 * Packets in fm10k device always carry at least one VLAN tag.
132 * For those packets coming in without VLAN tag,
133 * the port default VLAN tag will be used.
134 * So, always PKT_RX_VLAN flag is set and vlan_tci
135 * is valid for each RX packet's mbuf.
136 */
137 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
138 mbuf->vlan_tci = desc.w.vlan;
139 /**
140 * mbuf->vlan_tci_outer is an idle field in fm10k driver,
141 * so it can be selected to store sglort value.
142 */
143 if (q->rx_ftag_en)
144 mbuf->vlan_tci_outer = rte_le_to_cpu_16(desc.w.sglort);
145
146 rx_pkts[count] = mbuf;
147 if (++next_dd == q->nb_desc) {
148 next_dd = 0;
149 alloc = 1;
150 }
151
152 /* Prefetch next mbuf while processing current one. */
153 rte_prefetch0(q->sw_ring[next_dd]);
154
155 /*
156 * When next RX descriptor is on a cache-line boundary,
157 * prefetch the next 4 RX descriptors and the next 8 pointers
158 * to mbufs.
159 */
160 if ((next_dd & 0x3) == 0) {
161 rte_prefetch0(&q->hw_ring[next_dd]);
162 rte_prefetch0(&q->sw_ring[next_dd]);
163 }
164 }
165
166 q->next_dd = next_dd;
167
168 if ((q->next_dd > q->next_trigger) || (alloc == 1)) {
169 ret = rte_mempool_get_bulk(q->mp,
170 (void **)&q->sw_ring[q->next_alloc],
171 q->alloc_thresh);
172
173 if (unlikely(ret != 0)) {
174 uint16_t port = q->port_id;
175 PMD_RX_LOG(ERR, "Failed to alloc mbuf");
176 /*
177 * Need to restore next_dd if we cannot allocate new
178 * buffers to replenish the old ones.
179 */
180 q->next_dd = (q->next_dd + q->nb_desc - count) %
181 q->nb_desc;
182 rte_eth_devices[port].data->rx_mbuf_alloc_failed++;
183 return 0;
184 }
185
186 for (; q->next_alloc <= q->next_trigger; ++q->next_alloc) {
187 mbuf = q->sw_ring[q->next_alloc];
188
189 /* setup static mbuf fields */
190 fm10k_pktmbuf_reset(mbuf, q->port_id);
191
192 /* write descriptor */
193 desc.q.pkt_addr = MBUF_DMA_ADDR_DEFAULT(mbuf);
194 desc.q.hdr_addr = MBUF_DMA_ADDR_DEFAULT(mbuf);
195 q->hw_ring[q->next_alloc] = desc;
196 }
197 FM10K_PCI_REG_WRITE(q->tail_ptr, q->next_trigger);
198 q->next_trigger += q->alloc_thresh;
199 if (q->next_trigger >= q->nb_desc) {
200 q->next_trigger = q->alloc_thresh - 1;
201 q->next_alloc = 0;
202 }
203 }
204
205 return count;
206 }
207
208 uint16_t
209 fm10k_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
210 uint16_t nb_pkts)
211 {
212 struct rte_mbuf *mbuf;
213 union fm10k_rx_desc desc;
214 struct fm10k_rx_queue *q = rx_queue;
215 uint16_t count = 0;
216 uint16_t nb_rcv, nb_seg;
217 int alloc = 0;
218 uint16_t next_dd;
219 struct rte_mbuf *first_seg = q->pkt_first_seg;
220 struct rte_mbuf *last_seg = q->pkt_last_seg;
221 int ret;
222
223 next_dd = q->next_dd;
224 nb_rcv = 0;
225
226 nb_seg = RTE_MIN(nb_pkts, q->alloc_thresh);
227 for (count = 0; count < nb_seg; count++) {
228 if (!(q->hw_ring[next_dd].d.staterr & FM10K_RXD_STATUS_DD))
229 break;
230 mbuf = q->sw_ring[next_dd];
231 desc = q->hw_ring[next_dd];
232 #ifdef RTE_LIBRTE_FM10K_DEBUG_RX
233 dump_rxd(&desc);
234 #endif
235
236 if (++next_dd == q->nb_desc) {
237 next_dd = 0;
238 alloc = 1;
239 }
240
241 /* Prefetch next mbuf while processing current one. */
242 rte_prefetch0(q->sw_ring[next_dd]);
243
244 /*
245 * When next RX descriptor is on a cache-line boundary,
246 * prefetch the next 4 RX descriptors and the next 8 pointers
247 * to mbufs.
248 */
249 if ((next_dd & 0x3) == 0) {
250 rte_prefetch0(&q->hw_ring[next_dd]);
251 rte_prefetch0(&q->sw_ring[next_dd]);
252 }
253
254 /* Fill data length */
255 rte_pktmbuf_data_len(mbuf) = desc.w.length;
256
257 /*
258 * If this is the first buffer of the received packet,
259 * set the pointer to the first mbuf of the packet and
260 * initialize its context.
261 * Otherwise, update the total length and the number of segments
262 * of the current scattered packet, and update the pointer to
263 * the last mbuf of the current packet.
264 */
265 if (!first_seg) {
266 first_seg = mbuf;
267 first_seg->pkt_len = desc.w.length;
268 } else {
269 first_seg->pkt_len =
270 (uint16_t)(first_seg->pkt_len +
271 rte_pktmbuf_data_len(mbuf));
272 first_seg->nb_segs++;
273 last_seg->next = mbuf;
274 }
275
276 /*
277 * If this is not the last buffer of the received packet,
278 * update the pointer to the last mbuf of the current scattered
279 * packet and continue to parse the RX ring.
280 */
281 if (!(desc.d.staterr & FM10K_RXD_STATUS_EOP)) {
282 last_seg = mbuf;
283 continue;
284 }
285
286 first_seg->ol_flags = 0;
287 #ifdef RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE
288 rx_desc_to_ol_flags(first_seg, &desc);
289 #endif
290 first_seg->hash.rss = desc.d.rss;
291 /**
292 * Packets in fm10k device always carry at least one VLAN tag.
293 * For those packets coming in without VLAN tag,
294 * the port default VLAN tag will be used.
295 * So, always PKT_RX_VLAN flag is set and vlan_tci
296 * is valid for each RX packet's mbuf.
297 */
298 first_seg->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
299 first_seg->vlan_tci = desc.w.vlan;
300 /**
301 * mbuf->vlan_tci_outer is an idle field in fm10k driver,
302 * so it can be selected to store sglort value.
303 */
304 if (q->rx_ftag_en)
305 first_seg->vlan_tci_outer =
306 rte_le_to_cpu_16(desc.w.sglort);
307
308 /* Prefetch data of first segment, if configured to do so. */
309 rte_packet_prefetch((char *)first_seg->buf_addr +
310 first_seg->data_off);
311
312 /*
313 * Store the mbuf address into the next entry of the array
314 * of returned packets.
315 */
316 rx_pkts[nb_rcv++] = first_seg;
317
318 /*
319 * Setup receipt context for a new packet.
320 */
321 first_seg = NULL;
322 }
323
324 q->next_dd = next_dd;
325
326 if ((q->next_dd > q->next_trigger) || (alloc == 1)) {
327 ret = rte_mempool_get_bulk(q->mp,
328 (void **)&q->sw_ring[q->next_alloc],
329 q->alloc_thresh);
330
331 if (unlikely(ret != 0)) {
332 uint16_t port = q->port_id;
333 PMD_RX_LOG(ERR, "Failed to alloc mbuf");
334 /*
335 * Need to restore next_dd if we cannot allocate new
336 * buffers to replenish the old ones.
337 */
338 q->next_dd = (q->next_dd + q->nb_desc - count) %
339 q->nb_desc;
340 rte_eth_devices[port].data->rx_mbuf_alloc_failed++;
341 return 0;
342 }
343
344 for (; q->next_alloc <= q->next_trigger; ++q->next_alloc) {
345 mbuf = q->sw_ring[q->next_alloc];
346
347 /* setup static mbuf fields */
348 fm10k_pktmbuf_reset(mbuf, q->port_id);
349
350 /* write descriptor */
351 desc.q.pkt_addr = MBUF_DMA_ADDR_DEFAULT(mbuf);
352 desc.q.hdr_addr = MBUF_DMA_ADDR_DEFAULT(mbuf);
353 q->hw_ring[q->next_alloc] = desc;
354 }
355 FM10K_PCI_REG_WRITE(q->tail_ptr, q->next_trigger);
356 q->next_trigger += q->alloc_thresh;
357 if (q->next_trigger >= q->nb_desc) {
358 q->next_trigger = q->alloc_thresh - 1;
359 q->next_alloc = 0;
360 }
361 }
362
363 q->pkt_first_seg = first_seg;
364 q->pkt_last_seg = last_seg;
365
366 return nb_rcv;
367 }
368
369 int
370 fm10k_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)
371 {
372 volatile union fm10k_rx_desc *rxdp;
373 struct fm10k_rx_queue *rxq = rx_queue;
374 uint16_t desc;
375 int ret;
376
377 if (unlikely(offset >= rxq->nb_desc)) {
378 PMD_DRV_LOG(ERR, "Invalid RX descriptor offset %u", offset);
379 return 0;
380 }
381
382 desc = rxq->next_dd + offset;
383 if (desc >= rxq->nb_desc)
384 desc -= rxq->nb_desc;
385
386 rxdp = &rxq->hw_ring[desc];
387
388 ret = !!(rxdp->w.status &
389 rte_cpu_to_le_16(FM10K_RXD_STATUS_DD));
390
391 return ret;
392 }
393
394 int
395 fm10k_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)
396 {
397 volatile union fm10k_rx_desc *rxdp;
398 struct fm10k_rx_queue *rxq = rx_queue;
399 uint16_t nb_hold, trigger_last;
400 uint16_t desc;
401 int ret;
402
403 if (unlikely(offset >= rxq->nb_desc)) {
404 PMD_DRV_LOG(ERR, "Invalid RX descriptor offset %u", offset);
405 return 0;
406 }
407
408 if (rxq->next_trigger < rxq->alloc_thresh)
409 trigger_last = rxq->next_trigger +
410 rxq->nb_desc - rxq->alloc_thresh;
411 else
412 trigger_last = rxq->next_trigger - rxq->alloc_thresh;
413
414 if (rxq->next_dd < trigger_last)
415 nb_hold = rxq->next_dd + rxq->nb_desc - trigger_last;
416 else
417 nb_hold = rxq->next_dd - trigger_last;
418
419 if (offset >= rxq->nb_desc - nb_hold)
420 return RTE_ETH_RX_DESC_UNAVAIL;
421
422 desc = rxq->next_dd + offset;
423 if (desc >= rxq->nb_desc)
424 desc -= rxq->nb_desc;
425
426 rxdp = &rxq->hw_ring[desc];
427
428 ret = !!(rxdp->w.status &
429 rte_cpu_to_le_16(FM10K_RXD_STATUS_DD));
430
431 return ret;
432 }
433
434 int
435 fm10k_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
436 {
437 volatile struct fm10k_tx_desc *txdp;
438 struct fm10k_tx_queue *txq = tx_queue;
439 uint16_t desc;
440 uint16_t next_rs = txq->nb_desc;
441 struct fifo rs_tracker = txq->rs_tracker;
442 struct fifo *r = &rs_tracker;
443
444 if (unlikely(offset >= txq->nb_desc))
445 return -EINVAL;
446
447 desc = txq->next_free + offset;
448 /* go to next desc that has the RS bit */
449 desc = (desc / txq->rs_thresh + 1) *
450 txq->rs_thresh - 1;
451
452 if (desc >= txq->nb_desc) {
453 desc -= txq->nb_desc;
454 if (desc >= txq->nb_desc)
455 desc -= txq->nb_desc;
456 }
457
458 r->head = r->list;
459 for ( ; r->head != r->endp; ) {
460 if (*r->head >= desc && *r->head < next_rs)
461 next_rs = *r->head;
462 ++r->head;
463 }
464
465 txdp = &txq->hw_ring[next_rs];
466 if (txdp->flags & FM10K_TXD_FLAG_DONE)
467 return RTE_ETH_TX_DESC_DONE;
468
469 return RTE_ETH_TX_DESC_FULL;
470 }
471
472 /*
473 * Free multiple TX mbuf at a time if they are in the same pool
474 *
475 * @txep: software desc ring index that starts to free
476 * @num: number of descs to free
477 *
478 */
479 static inline void tx_free_bulk_mbuf(struct rte_mbuf **txep, int num)
480 {
481 struct rte_mbuf *m, *free[RTE_FM10K_TX_MAX_FREE_BUF_SZ];
482 int i;
483 int nb_free = 0;
484
485 if (unlikely(num == 0))
486 return;
487
488 m = rte_pktmbuf_prefree_seg(txep[0]);
489 if (likely(m != NULL)) {
490 free[0] = m;
491 nb_free = 1;
492 for (i = 1; i < num; i++) {
493 m = rte_pktmbuf_prefree_seg(txep[i]);
494 if (likely(m != NULL)) {
495 if (likely(m->pool == free[0]->pool))
496 free[nb_free++] = m;
497 else {
498 rte_mempool_put_bulk(free[0]->pool,
499 (void *)free, nb_free);
500 free[0] = m;
501 nb_free = 1;
502 }
503 }
504 txep[i] = NULL;
505 }
506 rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
507 } else {
508 for (i = 1; i < num; i++) {
509 m = rte_pktmbuf_prefree_seg(txep[i]);
510 if (m != NULL)
511 rte_mempool_put(m->pool, m);
512 txep[i] = NULL;
513 }
514 }
515 }
516
517 static inline void tx_free_descriptors(struct fm10k_tx_queue *q)
518 {
519 uint16_t next_rs, count = 0;
520
521 next_rs = fifo_peek(&q->rs_tracker);
522 if (!(q->hw_ring[next_rs].flags & FM10K_TXD_FLAG_DONE))
523 return;
524
525 /* the DONE flag is set on this descriptor so remove the ID
526 * from the RS bit tracker and free the buffers */
527 fifo_remove(&q->rs_tracker);
528
529 /* wrap around? if so, free buffers from last_free up to but NOT
530 * including nb_desc */
531 if (q->last_free > next_rs) {
532 count = q->nb_desc - q->last_free;
533 tx_free_bulk_mbuf(&q->sw_ring[q->last_free], count);
534 q->last_free = 0;
535 }
536
537 /* adjust free descriptor count before the next loop */
538 q->nb_free += count + (next_rs + 1 - q->last_free);
539
540 /* free buffers from last_free, up to and including next_rs */
541 if (q->last_free <= next_rs) {
542 count = next_rs - q->last_free + 1;
543 tx_free_bulk_mbuf(&q->sw_ring[q->last_free], count);
544 q->last_free += count;
545 }
546
547 if (q->last_free == q->nb_desc)
548 q->last_free = 0;
549 }
550
551 static inline void tx_xmit_pkt(struct fm10k_tx_queue *q, struct rte_mbuf *mb)
552 {
553 uint16_t last_id;
554 uint8_t flags, hdrlen;
555
556 /* always set the LAST flag on the last descriptor used to
557 * transmit the packet */
558 flags = FM10K_TXD_FLAG_LAST;
559 last_id = q->next_free + mb->nb_segs - 1;
560 if (last_id >= q->nb_desc)
561 last_id = last_id - q->nb_desc;
562
563 /* but only set the RS flag on the last descriptor if rs_thresh
564 * descriptors will be used since the RS flag was last set */
565 if ((q->nb_used + mb->nb_segs) >= q->rs_thresh) {
566 flags |= FM10K_TXD_FLAG_RS;
567 fifo_insert(&q->rs_tracker, last_id);
568 q->nb_used = 0;
569 } else {
570 q->nb_used = q->nb_used + mb->nb_segs;
571 }
572
573 q->nb_free -= mb->nb_segs;
574
575 q->hw_ring[q->next_free].flags = 0;
576 if (q->tx_ftag_en)
577 q->hw_ring[q->next_free].flags |= FM10K_TXD_FLAG_FTAG;
578 /* set checksum flags on first descriptor of packet. SCTP checksum
579 * offload is not supported, but we do not explicitly check for this
580 * case in favor of greatly simplified processing. */
581 if (mb->ol_flags & (PKT_TX_IP_CKSUM | PKT_TX_L4_MASK | PKT_TX_TCP_SEG))
582 q->hw_ring[q->next_free].flags |= FM10K_TXD_FLAG_CSUM;
583
584 /* set vlan if requested */
585 if (mb->ol_flags & PKT_TX_VLAN_PKT)
586 q->hw_ring[q->next_free].vlan = mb->vlan_tci;
587
588 q->sw_ring[q->next_free] = mb;
589 q->hw_ring[q->next_free].buffer_addr =
590 rte_cpu_to_le_64(MBUF_DMA_ADDR(mb));
591 q->hw_ring[q->next_free].buflen =
592 rte_cpu_to_le_16(rte_pktmbuf_data_len(mb));
593
594 if (mb->ol_flags & PKT_TX_TCP_SEG) {
595 hdrlen = mb->outer_l2_len + mb->outer_l3_len + mb->l2_len +
596 mb->l3_len + mb->l4_len;
597 if (q->hw_ring[q->next_free].flags & FM10K_TXD_FLAG_FTAG)
598 hdrlen += sizeof(struct fm10k_ftag);
599
600 if (likely((hdrlen >= FM10K_TSO_MIN_HEADERLEN) &&
601 (hdrlen <= FM10K_TSO_MAX_HEADERLEN) &&
602 (mb->tso_segsz >= FM10K_TSO_MINMSS))) {
603 q->hw_ring[q->next_free].mss = mb->tso_segsz;
604 q->hw_ring[q->next_free].hdrlen = hdrlen;
605 }
606 }
607
608 if (++q->next_free == q->nb_desc)
609 q->next_free = 0;
610
611 /* fill up the rings */
612 for (mb = mb->next; mb != NULL; mb = mb->next) {
613 q->sw_ring[q->next_free] = mb;
614 q->hw_ring[q->next_free].buffer_addr =
615 rte_cpu_to_le_64(MBUF_DMA_ADDR(mb));
616 q->hw_ring[q->next_free].buflen =
617 rte_cpu_to_le_16(rte_pktmbuf_data_len(mb));
618 q->hw_ring[q->next_free].flags = 0;
619 if (++q->next_free == q->nb_desc)
620 q->next_free = 0;
621 }
622
623 q->hw_ring[last_id].flags |= flags;
624 }
625
626 uint16_t
627 fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
628 uint16_t nb_pkts)
629 {
630 struct fm10k_tx_queue *q = tx_queue;
631 struct rte_mbuf *mb;
632 uint16_t count;
633
634 for (count = 0; count < nb_pkts; ++count) {
635 mb = tx_pkts[count];
636
637 /* running low on descriptors? try to free some... */
638 if (q->nb_free < q->free_thresh)
639 tx_free_descriptors(q);
640
641 /* make sure there are enough free descriptors to transmit the
642 * entire packet before doing anything */
643 if (q->nb_free < mb->nb_segs)
644 break;
645
646 /* sanity check to make sure the mbuf is valid */
647 if ((mb->nb_segs == 0) ||
648 ((mb->nb_segs > 1) && (mb->next == NULL)))
649 break;
650
651 /* process the packet */
652 tx_xmit_pkt(q, mb);
653 }
654
655 /* update the tail pointer if any packets were processed */
656 if (likely(count > 0))
657 FM10K_PCI_REG_WRITE(q->tail_ptr, q->next_free);
658
659 return count;
660 }
661
662 uint16_t
663 fm10k_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
664 uint16_t nb_pkts)
665 {
666 int i, ret;
667 struct rte_mbuf *m;
668
669 for (i = 0; i < nb_pkts; i++) {
670 m = tx_pkts[i];
671
672 if ((m->ol_flags & PKT_TX_TCP_SEG) &&
673 (m->tso_segsz < FM10K_TSO_MINMSS)) {
674 rte_errno = -EINVAL;
675 return i;
676 }
677
678 if (m->ol_flags & FM10K_TX_OFFLOAD_NOTSUP_MASK) {
679 rte_errno = -ENOTSUP;
680 return i;
681 }
682
683 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
684 ret = rte_validate_tx_offload(m);
685 if (ret != 0) {
686 rte_errno = ret;
687 return i;
688 }
689 #endif
690 ret = rte_net_intel_cksum_prepare(m);
691 if (ret != 0) {
692 rte_errno = ret;
693 return i;
694 }
695 }
696
697 return i;
698 }