ceph/src/seastar/dpdk/drivers/net/i40e/base/i40e_lan_hmc.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2001-2018
   3  */
   4
   5 #ifndef _I40E_LAN_HMC_H_
   6 #define _I40E_LAN_HMC_H_
   7
   8 /* forward-declare the HW struct for the compiler */
   9 struct i40e_hw;
  10
  11 /* HMC element context information */
  12
  13 /* Rx queue context data
  14  *
  15  * The sizes of the variables may be larger than needed due to crossing byte
  16  * boundaries. If we do not have the width of the variable set to the correct
  17  * size then we could end up shifting bits off the top of the variable when the
  18  * variable is at the top of a byte and crosses over into the next byte.
  19  */
  20 struct i40e_hmc_obj_rxq {
  21         u16 head;
  22         u16 cpuid; /* bigger than needed, see above for reason */
  23         u64 base;
  24         u16 qlen;
  25 #define I40E_RXQ_CTX_DBUFF_SHIFT 7
  26         u16 dbuff; /* bigger than needed, see above for reason */
  27 #define I40E_RXQ_CTX_HBUFF_SHIFT 6
  28         u16 hbuff; /* bigger than needed, see above for reason */
  29         u8  dtype;
  30         u8  dsize;
  31         u8  crcstrip;
  32         u8  fc_ena;
  33         u8  l2tsel;
  34         u8  hsplit_0;
  35         u8  hsplit_1;
  36         u8  showiv;
  37         u32 rxmax; /* bigger than needed, see above for reason */
  38         u8  tphrdesc_ena;
  39         u8  tphwdesc_ena;
  40         u8  tphdata_ena;
  41         u8  tphhead_ena;
  42         u16 lrxqthresh; /* bigger than needed, see above for reason */
  43         u8  prefena;    /* NOTE: normally must be set to 1 at init */
  44 };
  45
  46 /* Tx queue context data
  47 *
  48 * The sizes of the variables may be larger than needed due to crossing byte
  49 * boundaries. If we do not have the width of the variable set to the correct
  50 * size then we could end up shifting bits off the top of the variable when the
  51 * variable is at the top of a byte and crosses over into the next byte.
  52 */
  53 struct i40e_hmc_obj_txq {
  54         u16 head;
  55         u8  new_context;
  56         u64 base;
  57         u8  fc_ena;
  58         u8  timesync_ena;
  59         u8  fd_ena;
  60         u8  alt_vlan_ena;
  61         u16 thead_wb;
  62         u8  cpuid;
  63         u8  head_wb_ena;
  64         u16 qlen;
  65         u8  tphrdesc_ena;
  66         u8  tphrpacket_ena;
  67         u8  tphwdesc_ena;
  68         u64 head_wb_addr;
  69         u32 crc;
  70         u16 rdylist;
  71         u8  rdylist_act;
  72 };
  73
  74 /* for hsplit_0 field of Rx HMC context */
  75 enum i40e_hmc_obj_rx_hsplit_0 {
  76         I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT      = 0,
  77         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2      = 1,
  78         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP      = 2,
  79         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
  80         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP    = 8,
  81 };
  82
  83 /* fcoe_cntx and fcoe_filt are for debugging purpose only */
  84 struct i40e_hmc_obj_fcoe_cntx {
  85         u32 rsv[32];
  86 };
  87
  88 struct i40e_hmc_obj_fcoe_filt {
  89         u32 rsv[8];
  90 };
  91
  92 /* Context sizes for LAN objects */
  93 enum i40e_hmc_lan_object_size {
  94         I40E_HMC_LAN_OBJ_SZ_8   = 0x3,
  95         I40E_HMC_LAN_OBJ_SZ_16  = 0x4,
  96         I40E_HMC_LAN_OBJ_SZ_32  = 0x5,
  97         I40E_HMC_LAN_OBJ_SZ_64  = 0x6,
  98         I40E_HMC_LAN_OBJ_SZ_128 = 0x7,
  99         I40E_HMC_LAN_OBJ_SZ_256 = 0x8,
 100         I40E_HMC_LAN_OBJ_SZ_512 = 0x9,
 101 };
 102
 103 #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512
 104 #define I40E_HMC_OBJ_SIZE_TXQ         128
 105 #define I40E_HMC_OBJ_SIZE_RXQ         32
 106 #define I40E_HMC_OBJ_SIZE_FCOE_CNTX   64
 107 #define I40E_HMC_OBJ_SIZE_FCOE_FILT   64
 108
 109 enum i40e_hmc_lan_rsrc_type {
 110         I40E_HMC_LAN_FULL  = 0,
 111         I40E_HMC_LAN_TX    = 1,
 112         I40E_HMC_LAN_RX    = 2,
 113         I40E_HMC_FCOE_CTX  = 3,
 114         I40E_HMC_FCOE_FILT = 4,
 115         I40E_HMC_LAN_MAX   = 5
 116 };
 117
 118 enum i40e_hmc_model {
 119         I40E_HMC_MODEL_DIRECT_PREFERRED = 0,
 120         I40E_HMC_MODEL_DIRECT_ONLY      = 1,
 121         I40E_HMC_MODEL_PAGED_ONLY       = 2,
 122         I40E_HMC_MODEL_UNKNOWN,
 123 };
 124
 125 struct i40e_hmc_lan_create_obj_info {
 126         struct i40e_hmc_info *hmc_info;
 127         u32 rsrc_type;
 128         u32 start_idx;
 129         u32 count;
 130         enum i40e_sd_entry_type entry_type;
 131         u64 direct_mode_sz;
 132 };
 133
 134 struct i40e_hmc_lan_delete_obj_info {
 135         struct i40e_hmc_info *hmc_info;
 136         u32 rsrc_type;
 137         u32 start_idx;
 138         u32 count;
 139 };
 140
 141 enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
 142                                         u32 rxq_num, u32 fcoe_cntx_num,
 143                                         u32 fcoe_filt_num);
 144 enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw,
 145                                              enum i40e_hmc_model model);
 146 enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw);
 147
 148 u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
 149                               u32 fcoe_cntx_num, u32 fcoe_filt_num);
 150 enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw,
 151                                                     u16 queue,
 152                                                     struct i40e_hmc_obj_txq *s);
 153 enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
 154                                                       u16 queue);
 155 enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
 156                                                     u16 queue,
 157                                                     struct i40e_hmc_obj_txq *s);
 158 enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw,
 159                                                     u16 queue,
 160                                                     struct i40e_hmc_obj_rxq *s);
 161 enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
 162                                                       u16 queue);
 163 enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
 164                                                     u16 queue,
 165                                                     struct i40e_hmc_obj_rxq *s);
 166 enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw,
 167                                 struct i40e_hmc_lan_create_obj_info *info);
 168 enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw,
 169                                 struct i40e_hmc_lan_delete_obj_info *info);
 170
 171 #endif /* _I40E_LAN_HMC_H_ */