1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2009-2018 Solarflare Communications Inc.
7 #ifndef _SYS_SIENA_IMPL_H
8 #define _SYS_SIENA_IMPL_H
12 #include "siena_flash.h"
18 #ifndef EFX_TXQ_DC_SIZE
19 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
21 #ifndef EFX_RXQ_DC_SIZE
22 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
24 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
25 #define EFX_RXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
27 #define SIENA_EVQ_MAXNEVS 32768
28 #define SIENA_EVQ_MINNEVS 512
30 #define SIENA_TXQ_MAXNDESCS 4096
31 #define SIENA_TXQ_MINNDESCS 512
33 #define SIENA_RXQ_MAXNDESCS 4096
34 #define SIENA_RXQ_MINNDESCS 512
36 #define SIENA_EVQ_DESC_SIZE (sizeof (efx_qword_t))
37 #define SIENA_RXQ_DESC_SIZE (sizeof (efx_qword_t))
38 #define SIENA_TXQ_DESC_SIZE (sizeof (efx_qword_t))
40 #define SIENA_NVRAM_CHUNK 0x80
43 extern __checkReturn efx_rc_t
47 extern __checkReturn efx_rc_t
51 extern __checkReturn efx_rc_t
57 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns
[];
59 typedef struct siena_register_set_s
{
64 } siena_register_set_t
;
66 extern __checkReturn efx_rc_t
67 siena_nic_register_test(
70 #endif /* EFSYS_OPT_DIAG */
80 #define SIENA_SRAM_ROWS 0x12000
88 extern __checkReturn efx_rc_t
91 __in efx_sram_pattern_fn_t func
);
93 #endif /* EFSYS_OPT_DIAG */
97 extern __checkReturn efx_rc_t
100 __in
const efx_mcdi_transport_t
*mtp
);
103 siena_mcdi_send_request(
105 __in_bcount(hdr_len
) void *hdrp
,
107 __in_bcount(sdu_len
) void *sdup
,
108 __in
size_t sdu_len
);
110 extern __checkReturn boolean_t
111 siena_mcdi_poll_response(
112 __in efx_nic_t
*enp
);
115 siena_mcdi_read_response(
117 __out_bcount(length
) void *bufferp
,
122 siena_mcdi_poll_reboot(
123 __in efx_nic_t
*enp
);
127 __in efx_nic_t
*enp
);
129 extern __checkReturn efx_rc_t
130 siena_mcdi_feature_supported(
132 __in efx_mcdi_feature_id_t id
,
133 __out boolean_t
*supportedp
);
136 siena_mcdi_get_timeout(
138 __in efx_mcdi_req_t
*emrp
,
139 __out
uint32_t *timeoutp
);
141 #endif /* EFSYS_OPT_MCDI */
143 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
145 extern __checkReturn efx_rc_t
146 siena_nvram_partn_lock(
148 __in
uint32_t partn
);
150 extern __checkReturn efx_rc_t
151 siena_nvram_partn_unlock(
154 __out_opt
uint32_t *verify_resultp
);
156 extern __checkReturn efx_rc_t
157 siena_nvram_get_dynamic_cfg(
161 __out siena_mc_dynamic_config_hdr_t
**dcfgp
,
162 __out
size_t *sizep
);
164 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
170 extern __checkReturn efx_rc_t
172 __in efx_nic_t
*enp
);
174 #endif /* EFSYS_OPT_DIAG */
176 extern __checkReturn efx_rc_t
177 siena_nvram_get_subtype(
180 __out
uint32_t *subtypep
);
182 extern __checkReturn efx_rc_t
183 siena_nvram_type_to_partn(
185 __in efx_nvram_type_t type
,
186 __out
uint32_t *partnp
);
188 extern __checkReturn efx_rc_t
189 siena_nvram_partn_size(
192 __out
size_t *sizep
);
194 extern __checkReturn efx_rc_t
195 siena_nvram_partn_rw_start(
198 __out
size_t *chunk_sizep
);
200 extern __checkReturn efx_rc_t
201 siena_nvram_partn_read(
204 __in
unsigned int offset
,
205 __out_bcount(size
) caddr_t data
,
208 extern __checkReturn efx_rc_t
209 siena_nvram_partn_erase(
212 __in
unsigned int offset
,
215 extern __checkReturn efx_rc_t
216 siena_nvram_partn_write(
219 __in
unsigned int offset
,
220 __out_bcount(size
) caddr_t data
,
223 extern __checkReturn efx_rc_t
224 siena_nvram_partn_rw_finish(
227 __out_opt
uint32_t *verify_resultp
);
229 extern __checkReturn efx_rc_t
230 siena_nvram_partn_get_version(
233 __out
uint32_t *subtypep
,
234 __out_ecount(4) uint16_t version
[4]);
236 extern __checkReturn efx_rc_t
237 siena_nvram_partn_set_version(
240 __in_ecount(4) uint16_t version
[4]);
242 #endif /* EFSYS_OPT_NVRAM */
246 extern __checkReturn efx_rc_t
248 __in efx_nic_t
*enp
);
250 extern __checkReturn efx_rc_t
253 __out
size_t *sizep
);
255 extern __checkReturn efx_rc_t
258 __out_bcount(size
) caddr_t data
,
261 extern __checkReturn efx_rc_t
264 __in_bcount(size
) caddr_t data
,
267 extern __checkReturn efx_rc_t
270 __in_bcount(size
) caddr_t data
,
273 extern __checkReturn efx_rc_t
276 __in_bcount(size
) caddr_t data
,
278 __inout efx_vpd_value_t
*evvp
);
280 extern __checkReturn efx_rc_t
283 __in_bcount(size
) caddr_t data
,
285 __in efx_vpd_value_t
*evvp
);
287 extern __checkReturn efx_rc_t
290 __in_bcount(size
) caddr_t data
,
292 __out efx_vpd_value_t
*evvp
,
293 __inout
unsigned int *contp
);
295 extern __checkReturn efx_rc_t
298 __in_bcount(size
) caddr_t data
,
303 __in efx_nic_t
*enp
);
305 #endif /* EFSYS_OPT_VPD */
307 typedef struct siena_link_state_s
{
308 uint32_t sls_adv_cap_mask
;
309 uint32_t sls_lp_cap_mask
;
310 unsigned int sls_fcntl
;
311 efx_link_mode_t sls_link_mode
;
312 #if EFSYS_OPT_LOOPBACK
313 efx_loopback_type_t sls_loopback
;
315 boolean_t sls_mac_up
;
316 } siena_link_state_t
;
321 __in efx_qword_t
*eqp
,
322 __out efx_link_mode_t
*link_modep
);
324 extern __checkReturn efx_rc_t
327 __out siena_link_state_t
*slsp
);
329 extern __checkReturn efx_rc_t
334 extern __checkReturn efx_rc_t
335 siena_phy_reconfigure(
336 __in efx_nic_t
*enp
);
338 extern __checkReturn efx_rc_t
340 __in efx_nic_t
*enp
);
342 extern __checkReturn efx_rc_t
345 __out
uint32_t *ouip
);
347 #if EFSYS_OPT_PHY_STATS
350 siena_phy_decode_stats(
353 __in_opt efsys_mem_t
*esmp
,
354 __out_opt
uint64_t *smaskp
,
355 __inout_ecount_opt(EFX_PHY_NSTATS
) uint32_t *stat
);
357 extern __checkReturn efx_rc_t
358 siena_phy_stats_update(
360 __in efsys_mem_t
*esmp
,
361 __inout_ecount(EFX_PHY_NSTATS
) uint32_t *stat
);
363 #endif /* EFSYS_OPT_PHY_STATS */
367 extern __checkReturn efx_rc_t
368 siena_phy_bist_start(
370 __in efx_bist_type_t type
);
372 extern __checkReturn efx_rc_t
375 __in efx_bist_type_t type
,
376 __out efx_bist_result_t
*resultp
,
377 __out_opt
__drv_when(count
> 0, __notnull
)
378 uint32_t *value_maskp
,
379 __out_ecount_opt(count
) __drv_when(count
> 0, __notnull
)
380 unsigned long *valuesp
,
386 __in efx_bist_type_t type
);
388 #endif /* EFSYS_OPT_BIST */
390 extern __checkReturn efx_rc_t
393 __out efx_link_mode_t
*link_modep
);
395 extern __checkReturn efx_rc_t
398 __out boolean_t
*mac_upp
);
400 extern __checkReturn efx_rc_t
401 siena_mac_reconfigure(
402 __in efx_nic_t
*enp
);
404 extern __checkReturn efx_rc_t
409 #if EFSYS_OPT_LOOPBACK
411 extern __checkReturn efx_rc_t
412 siena_mac_loopback_set(
414 __in efx_link_mode_t link_mode
,
415 __in efx_loopback_type_t loopback_type
);
417 #endif /* EFSYS_OPT_LOOPBACK */
419 #if EFSYS_OPT_MAC_STATS
421 extern __checkReturn efx_rc_t
422 siena_mac_stats_get_mask(
424 __inout_bcount(mask_size
) uint32_t *maskp
,
425 __in
size_t mask_size
);
427 extern __checkReturn efx_rc_t
428 siena_mac_stats_update(
430 __in efsys_mem_t
*esmp
,
431 __inout_ecount(EFX_MAC_NSTATS
) efsys_stat_t
*stat
,
432 __inout_opt
uint32_t *generationp
);
434 #endif /* EFSYS_OPT_MAC_STATS */
440 #endif /* _SYS_SIENA_IMPL_H */