ceph/src/seastar/dpdk/kernel/linux/kni/ethtool/igb/e1000_i210.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*******************************************************************************
   3
   4   Intel(R) Gigabit Ethernet Linux driver
   5   Copyright(c) 2007-2013 Intel Corporation.
   6
   7   Contact Information:
   8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
   9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  10
  11 *******************************************************************************/
  12
  13 #ifndef _E1000_I210_H_
  14 #define _E1000_I210_H_
  15
  16 bool e1000_get_flash_presence_i210(struct e1000_hw *hw);
  17 s32 e1000_update_flash_i210(struct e1000_hw *hw);
  18 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
  19 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
  20 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
  21                               u16 words, u16 *data);
  22 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
  23                              u16 words, u16 *data);
  24 s32 e1000_read_invm_version(struct e1000_hw *hw,
  25                             struct e1000_fw_version *invm_ver);
  26 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
  27 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
  28 s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
  29                          u16 *data);
  30 s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
  31                           u16 data);
  32
  33 #define E1000_STM_OPCODE                0xDB00
  34 #define E1000_EEPROM_FLASH_SIZE_WORD    0x11
  35
  36 #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
  37         (u8)((invm_dword) & 0x7)
  38 #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
  39         (u8)(((invm_dword) & 0x0000FE00) >> 9)
  40 #define INVM_DWORD_TO_WORD_DATA(invm_dword) \
  41         (u16)(((invm_dword) & 0xFFFF0000) >> 16)
  42
  43 enum E1000_INVM_STRUCTURE_TYPE {
  44         E1000_INVM_UNINITIALIZED_STRUCTURE              = 0x00,
  45         E1000_INVM_WORD_AUTOLOAD_STRUCTURE              = 0x01,
  46         E1000_INVM_CSR_AUTOLOAD_STRUCTURE               = 0x02,
  47         E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE      = 0x03,
  48         E1000_INVM_RSA_KEY_SHA256_STRUCTURE             = 0x04,
  49         E1000_INVM_INVALIDATED_STRUCTURE                = 0x0F,
  50 };
  51
  52 #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS   8
  53 #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS     1
  54 #define E1000_INVM_ULT_BYTES_SIZE       8
  55 #define E1000_INVM_RECORD_SIZE_IN_BYTES 4
  56 #define E1000_INVM_VER_FIELD_ONE        0x1FF8
  57 #define E1000_INVM_VER_FIELD_TWO        0x7FE000
  58 #define E1000_INVM_IMGTYPE_FIELD        0x1F800000
  59
  60 #define E1000_INVM_MAJOR_MASK   0x3F0
  61 #define E1000_INVM_MINOR_MASK   0xF
  62 #define E1000_INVM_MAJOR_SHIFT  4
  63
  64 #define ID_LED_DEFAULT_I210             ((ID_LED_OFF1_ON2  << 8) | \
  65                                          (ID_LED_DEF1_DEF2 <<  4) | \
  66                                          (ID_LED_OFF1_OFF2))
  67 #define ID_LED_DEFAULT_I210_SERDES      ((ID_LED_DEF1_DEF2 << 8) | \
  68                                          (ID_LED_DEF1_DEF2 <<  4) | \
  69                                          (ID_LED_OFF1_ON2))
  70
  71 /* NVM offset defaults for I211 devices */
  72 #define NVM_INIT_CTRL_2_DEFAULT_I211    0X7243
  73 #define NVM_INIT_CTRL_4_DEFAULT_I211    0x00C1
  74 #define NVM_LED_1_CFG_DEFAULT_I211      0x0184
  75 #define NVM_LED_0_2_CFG_DEFAULT_I211    0x200C
  76 #endif