1 // SPDX-License-Identifier: GPL-2.0
2 /*******************************************************************************
4 Intel(R) Gigabit Ethernet Linux driver
5 Copyright(c) 2007-2013 Intel Corporation.
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
11 *******************************************************************************/
13 #include "e1000_api.h"
15 static void e1000_reload_nvm_generic(struct e1000_hw
*hw
);
18 * e1000_init_nvm_ops_generic - Initialize NVM function pointers
19 * @hw: pointer to the HW structure
21 * Setups up the function pointers to no-op functions
23 void e1000_init_nvm_ops_generic(struct e1000_hw
*hw
)
25 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
26 DEBUGFUNC("e1000_init_nvm_ops_generic");
28 /* Initialize function pointers */
29 nvm
->ops
.init_params
= e1000_null_ops_generic
;
30 nvm
->ops
.acquire
= e1000_null_ops_generic
;
31 nvm
->ops
.read
= e1000_null_read_nvm
;
32 nvm
->ops
.release
= e1000_null_nvm_generic
;
33 nvm
->ops
.reload
= e1000_reload_nvm_generic
;
34 nvm
->ops
.update
= e1000_null_ops_generic
;
35 nvm
->ops
.valid_led_default
= e1000_null_led_default
;
36 nvm
->ops
.validate
= e1000_null_ops_generic
;
37 nvm
->ops
.write
= e1000_null_write_nvm
;
41 * e1000_null_nvm_read - No-op function, return 0
42 * @hw: pointer to the HW structure
44 s32
e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG
*hw
,
45 u16 E1000_UNUSEDARG a
, u16 E1000_UNUSEDARG b
,
46 u16 E1000_UNUSEDARG
*c
)
48 DEBUGFUNC("e1000_null_read_nvm");
53 * e1000_null_nvm_generic - No-op function, return void
54 * @hw: pointer to the HW structure
56 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG
*hw
)
58 DEBUGFUNC("e1000_null_nvm_generic");
63 * e1000_null_led_default - No-op function, return 0
64 * @hw: pointer to the HW structure
66 s32
e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG
*hw
,
67 u16 E1000_UNUSEDARG
*data
)
69 DEBUGFUNC("e1000_null_led_default");
74 * e1000_null_write_nvm - No-op function, return 0
75 * @hw: pointer to the HW structure
77 s32
e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG
*hw
,
78 u16 E1000_UNUSEDARG a
, u16 E1000_UNUSEDARG b
,
79 u16 E1000_UNUSEDARG
*c
)
81 DEBUGFUNC("e1000_null_write_nvm");
86 * e1000_raise_eec_clk - Raise EEPROM clock
87 * @hw: pointer to the HW structure
88 * @eecd: pointer to the EEPROM
90 * Enable/Raise the EEPROM clock bit.
92 static void e1000_raise_eec_clk(struct e1000_hw
*hw
, u32
*eecd
)
94 *eecd
= *eecd
| E1000_EECD_SK
;
95 E1000_WRITE_REG(hw
, E1000_EECD
, *eecd
);
96 E1000_WRITE_FLUSH(hw
);
97 usec_delay(hw
->nvm
.delay_usec
);
101 * e1000_lower_eec_clk - Lower EEPROM clock
102 * @hw: pointer to the HW structure
103 * @eecd: pointer to the EEPROM
105 * Clear/Lower the EEPROM clock bit.
107 static void e1000_lower_eec_clk(struct e1000_hw
*hw
, u32
*eecd
)
109 *eecd
= *eecd
& ~E1000_EECD_SK
;
110 E1000_WRITE_REG(hw
, E1000_EECD
, *eecd
);
111 E1000_WRITE_FLUSH(hw
);
112 usec_delay(hw
->nvm
.delay_usec
);
116 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
117 * @hw: pointer to the HW structure
118 * @data: data to send to the EEPROM
119 * @count: number of bits to shift out
121 * We need to shift 'count' bits out to the EEPROM. So, the value in the
122 * "data" parameter will be shifted out to the EEPROM one bit at a time.
123 * In order to do this, "data" must be broken down into bits.
125 static void e1000_shift_out_eec_bits(struct e1000_hw
*hw
, u16 data
, u16 count
)
127 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
128 u32 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
131 DEBUGFUNC("e1000_shift_out_eec_bits");
133 mask
= 0x01 << (count
- 1);
134 if (nvm
->type
== e1000_nvm_eeprom_spi
)
135 eecd
|= E1000_EECD_DO
;
138 eecd
&= ~E1000_EECD_DI
;
141 eecd
|= E1000_EECD_DI
;
143 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
144 E1000_WRITE_FLUSH(hw
);
146 usec_delay(nvm
->delay_usec
);
148 e1000_raise_eec_clk(hw
, &eecd
);
149 e1000_lower_eec_clk(hw
, &eecd
);
154 eecd
&= ~E1000_EECD_DI
;
155 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
159 * e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
160 * @hw: pointer to the HW structure
161 * @count: number of bits to shift in
163 * In order to read a register from the EEPROM, we need to shift 'count' bits
164 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
165 * the EEPROM (setting the SK bit), and then reading the value of the data out
166 * "DO" bit. During this "shifting in" process the data in "DI" bit should
169 static u16
e1000_shift_in_eec_bits(struct e1000_hw
*hw
, u16 count
)
175 DEBUGFUNC("e1000_shift_in_eec_bits");
177 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
179 eecd
&= ~(E1000_EECD_DO
| E1000_EECD_DI
);
182 for (i
= 0; i
< count
; i
++) {
184 e1000_raise_eec_clk(hw
, &eecd
);
186 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
188 eecd
&= ~E1000_EECD_DI
;
189 if (eecd
& E1000_EECD_DO
)
192 e1000_lower_eec_clk(hw
, &eecd
);
199 * e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
200 * @hw: pointer to the HW structure
201 * @ee_reg: EEPROM flag for polling
203 * Polls the EEPROM status bit for either read or write completion based
204 * upon the value of 'ee_reg'.
206 s32
e1000_poll_eerd_eewr_done(struct e1000_hw
*hw
, int ee_reg
)
208 u32 attempts
= 100000;
211 DEBUGFUNC("e1000_poll_eerd_eewr_done");
213 for (i
= 0; i
< attempts
; i
++) {
214 if (ee_reg
== E1000_NVM_POLL_READ
)
215 reg
= E1000_READ_REG(hw
, E1000_EERD
);
217 reg
= E1000_READ_REG(hw
, E1000_EEWR
);
219 if (reg
& E1000_NVM_RW_REG_DONE
)
220 return E1000_SUCCESS
;
225 return -E1000_ERR_NVM
;
229 * e1000_acquire_nvm_generic - Generic request for access to EEPROM
230 * @hw: pointer to the HW structure
232 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
233 * Return successful if access grant bit set, else clear the request for
234 * EEPROM access and return -E1000_ERR_NVM (-1).
236 s32
e1000_acquire_nvm_generic(struct e1000_hw
*hw
)
238 u32 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
239 s32 timeout
= E1000_NVM_GRANT_ATTEMPTS
;
241 DEBUGFUNC("e1000_acquire_nvm_generic");
243 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
| E1000_EECD_REQ
);
244 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
247 if (eecd
& E1000_EECD_GNT
)
250 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
255 eecd
&= ~E1000_EECD_REQ
;
256 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
257 DEBUGOUT("Could not acquire NVM grant\n");
258 return -E1000_ERR_NVM
;
261 return E1000_SUCCESS
;
265 * e1000_standby_nvm - Return EEPROM to standby state
266 * @hw: pointer to the HW structure
268 * Return the EEPROM to a standby state.
270 static void e1000_standby_nvm(struct e1000_hw
*hw
)
272 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
273 u32 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
275 DEBUGFUNC("e1000_standby_nvm");
277 if (nvm
->type
== e1000_nvm_eeprom_spi
) {
278 /* Toggle CS to flush commands */
279 eecd
|= E1000_EECD_CS
;
280 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
281 E1000_WRITE_FLUSH(hw
);
282 usec_delay(nvm
->delay_usec
);
283 eecd
&= ~E1000_EECD_CS
;
284 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
285 E1000_WRITE_FLUSH(hw
);
286 usec_delay(nvm
->delay_usec
);
291 * e1000_stop_nvm - Terminate EEPROM command
292 * @hw: pointer to the HW structure
294 * Terminates the current command by inverting the EEPROM's chip select pin.
296 static void e1000_stop_nvm(struct e1000_hw
*hw
)
300 DEBUGFUNC("e1000_stop_nvm");
302 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
303 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
) {
305 eecd
|= E1000_EECD_CS
;
306 e1000_lower_eec_clk(hw
, &eecd
);
311 * e1000_release_nvm_generic - Release exclusive access to EEPROM
312 * @hw: pointer to the HW structure
314 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
316 void e1000_release_nvm_generic(struct e1000_hw
*hw
)
320 DEBUGFUNC("e1000_release_nvm_generic");
324 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
325 eecd
&= ~E1000_EECD_REQ
;
326 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
330 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
331 * @hw: pointer to the HW structure
333 * Setups the EEPROM for reading and writing.
335 static s32
e1000_ready_nvm_eeprom(struct e1000_hw
*hw
)
337 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
338 u32 eecd
= E1000_READ_REG(hw
, E1000_EECD
);
341 DEBUGFUNC("e1000_ready_nvm_eeprom");
343 if (nvm
->type
== e1000_nvm_eeprom_spi
) {
344 u16 timeout
= NVM_MAX_RETRY_SPI
;
346 /* Clear SK and CS */
347 eecd
&= ~(E1000_EECD_CS
| E1000_EECD_SK
);
348 E1000_WRITE_REG(hw
, E1000_EECD
, eecd
);
349 E1000_WRITE_FLUSH(hw
);
352 /* Read "Status Register" repeatedly until the LSB is cleared.
353 * The EEPROM will signal that the command has been completed
354 * by clearing bit 0 of the internal status register. If it's
355 * not cleared within 'timeout', then error out.
358 e1000_shift_out_eec_bits(hw
, NVM_RDSR_OPCODE_SPI
,
359 hw
->nvm
.opcode_bits
);
360 spi_stat_reg
= (u8
)e1000_shift_in_eec_bits(hw
, 8);
361 if (!(spi_stat_reg
& NVM_STATUS_RDY_SPI
))
365 e1000_standby_nvm(hw
);
370 DEBUGOUT("SPI NVM Status error\n");
371 return -E1000_ERR_NVM
;
375 return E1000_SUCCESS
;
379 * e1000_read_nvm_spi - Read EEPROM's using SPI
380 * @hw: pointer to the HW structure
381 * @offset: offset of word in the EEPROM to read
382 * @words: number of words to read
383 * @data: word read from the EEPROM
385 * Reads a 16 bit word from the EEPROM.
387 s32
e1000_read_nvm_spi(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
389 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
393 u8 read_opcode
= NVM_READ_OPCODE_SPI
;
395 DEBUGFUNC("e1000_read_nvm_spi");
397 /* A check for invalid values: offset too large, too many words,
398 * and not enough words.
400 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
402 DEBUGOUT("nvm parameter(s) out of bounds\n");
403 return -E1000_ERR_NVM
;
406 ret_val
= nvm
->ops
.acquire(hw
);
410 ret_val
= e1000_ready_nvm_eeprom(hw
);
414 e1000_standby_nvm(hw
);
416 if ((nvm
->address_bits
== 8) && (offset
>= 128))
417 read_opcode
|= NVM_A8_OPCODE_SPI
;
419 /* Send the READ command (opcode + addr) */
420 e1000_shift_out_eec_bits(hw
, read_opcode
, nvm
->opcode_bits
);
421 e1000_shift_out_eec_bits(hw
, (u16
)(offset
*2), nvm
->address_bits
);
423 /* Read the data. SPI NVMs increment the address with each byte
424 * read and will roll over if reading beyond the end. This allows
425 * us to read the whole NVM from any offset
427 for (i
= 0; i
< words
; i
++) {
428 word_in
= e1000_shift_in_eec_bits(hw
, 16);
429 data
[i
] = (word_in
>> 8) | (word_in
<< 8);
433 nvm
->ops
.release(hw
);
439 * e1000_read_nvm_eerd - Reads EEPROM using EERD register
440 * @hw: pointer to the HW structure
441 * @offset: offset of word in the EEPROM to read
442 * @words: number of words to read
443 * @data: word read from the EEPROM
445 * Reads a 16 bit word from the EEPROM using the EERD register.
447 s32
e1000_read_nvm_eerd(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
449 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
451 s32 ret_val
= E1000_SUCCESS
;
453 DEBUGFUNC("e1000_read_nvm_eerd");
455 /* A check for invalid values: offset too large, too many words,
456 * too many words for the offset, and not enough words.
458 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
460 DEBUGOUT("nvm parameter(s) out of bounds\n");
461 return -E1000_ERR_NVM
;
464 for (i
= 0; i
< words
; i
++) {
465 eerd
= ((offset
+i
) << E1000_NVM_RW_ADDR_SHIFT
) +
466 E1000_NVM_RW_REG_START
;
468 E1000_WRITE_REG(hw
, E1000_EERD
, eerd
);
469 ret_val
= e1000_poll_eerd_eewr_done(hw
, E1000_NVM_POLL_READ
);
473 data
[i
] = (E1000_READ_REG(hw
, E1000_EERD
) >>
474 E1000_NVM_RW_REG_DATA
);
481 * e1000_write_nvm_spi - Write to EEPROM using SPI
482 * @hw: pointer to the HW structure
483 * @offset: offset within the EEPROM to be written to
484 * @words: number of words to write
485 * @data: 16 bit word(s) to be written to the EEPROM
487 * Writes data to EEPROM at offset using SPI interface.
489 * If e1000_update_nvm_checksum is not called after this function , the
490 * EEPROM will most likely contain an invalid checksum.
492 s32
e1000_write_nvm_spi(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
494 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
495 s32 ret_val
= -E1000_ERR_NVM
;
498 DEBUGFUNC("e1000_write_nvm_spi");
500 /* A check for invalid values: offset too large, too many words,
501 * and not enough words.
503 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
505 DEBUGOUT("nvm parameter(s) out of bounds\n");
506 return -E1000_ERR_NVM
;
509 while (widx
< words
) {
510 u8 write_opcode
= NVM_WRITE_OPCODE_SPI
;
512 ret_val
= nvm
->ops
.acquire(hw
);
516 ret_val
= e1000_ready_nvm_eeprom(hw
);
518 nvm
->ops
.release(hw
);
522 e1000_standby_nvm(hw
);
524 /* Send the WRITE ENABLE command (8 bit opcode) */
525 e1000_shift_out_eec_bits(hw
, NVM_WREN_OPCODE_SPI
,
528 e1000_standby_nvm(hw
);
530 /* Some SPI eeproms use the 8th address bit embedded in the
533 if ((nvm
->address_bits
== 8) && (offset
>= 128))
534 write_opcode
|= NVM_A8_OPCODE_SPI
;
536 /* Send the Write command (8-bit opcode + addr) */
537 e1000_shift_out_eec_bits(hw
, write_opcode
, nvm
->opcode_bits
);
538 e1000_shift_out_eec_bits(hw
, (u16
)((offset
+ widx
) * 2),
541 /* Loop to allow for up to whole page write of eeprom */
542 while (widx
< words
) {
543 u16 word_out
= data
[widx
];
544 word_out
= (word_out
>> 8) | (word_out
<< 8);
545 e1000_shift_out_eec_bits(hw
, word_out
, 16);
548 if ((((offset
+ widx
) * 2) % nvm
->page_size
) == 0) {
549 e1000_standby_nvm(hw
);
554 nvm
->ops
.release(hw
);
561 * e1000_read_pba_string_generic - Read device part number
562 * @hw: pointer to the HW structure
563 * @pba_num: pointer to device part number
564 * @pba_num_size: size of part number buffer
566 * Reads the product board assembly (PBA) number from the EEPROM and stores
567 * the value in pba_num.
569 s32
e1000_read_pba_string_generic(struct e1000_hw
*hw
, u8
*pba_num
,
578 DEBUGFUNC("e1000_read_pba_string_generic");
580 if (pba_num
== NULL
) {
581 DEBUGOUT("PBA string buffer was null\n");
582 return -E1000_ERR_INVALID_ARGUMENT
;
585 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_0
, 1, &nvm_data
);
587 DEBUGOUT("NVM Read Error\n");
591 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_1
, 1, &pba_ptr
);
593 DEBUGOUT("NVM Read Error\n");
597 /* if nvm_data is not ptr guard the PBA must be in legacy format which
598 * means pba_ptr is actually our second data word for the PBA number
599 * and we can decode it into an ascii string
601 if (nvm_data
!= NVM_PBA_PTR_GUARD
) {
602 DEBUGOUT("NVM PBA number is not stored as string\n");
604 /* make sure callers buffer is big enough to store the PBA */
605 if (pba_num_size
< E1000_PBANUM_LENGTH
) {
606 DEBUGOUT("PBA string buffer too small\n");
607 return E1000_ERR_NO_SPACE
;
610 /* extract hex string from data and pba_ptr */
611 pba_num
[0] = (nvm_data
>> 12) & 0xF;
612 pba_num
[1] = (nvm_data
>> 8) & 0xF;
613 pba_num
[2] = (nvm_data
>> 4) & 0xF;
614 pba_num
[3] = nvm_data
& 0xF;
615 pba_num
[4] = (pba_ptr
>> 12) & 0xF;
616 pba_num
[5] = (pba_ptr
>> 8) & 0xF;
619 pba_num
[8] = (pba_ptr
>> 4) & 0xF;
620 pba_num
[9] = pba_ptr
& 0xF;
622 /* put a null character on the end of our string */
625 /* switch all the data but the '-' to hex char */
626 for (offset
= 0; offset
< 10; offset
++) {
627 if (pba_num
[offset
] < 0xA)
628 pba_num
[offset
] += '0';
629 else if (pba_num
[offset
] < 0x10)
630 pba_num
[offset
] += 'A' - 0xA;
633 return E1000_SUCCESS
;
636 ret_val
= hw
->nvm
.ops
.read(hw
, pba_ptr
, 1, &length
);
638 DEBUGOUT("NVM Read Error\n");
642 if (length
== 0xFFFF || length
== 0) {
643 DEBUGOUT("NVM PBA number section invalid length\n");
644 return -E1000_ERR_NVM_PBA_SECTION
;
646 /* check if pba_num buffer is big enough */
647 if (pba_num_size
< (((u32
)length
* 2) - 1)) {
648 DEBUGOUT("PBA string buffer too small\n");
649 return -E1000_ERR_NO_SPACE
;
652 /* trim pba length from start of string */
656 for (offset
= 0; offset
< length
; offset
++) {
657 ret_val
= hw
->nvm
.ops
.read(hw
, pba_ptr
+ offset
, 1, &nvm_data
);
659 DEBUGOUT("NVM Read Error\n");
662 pba_num
[offset
* 2] = (u8
)(nvm_data
>> 8);
663 pba_num
[(offset
* 2) + 1] = (u8
)(nvm_data
& 0xFF);
665 pba_num
[offset
* 2] = '\0';
667 return E1000_SUCCESS
;
671 * e1000_read_pba_length_generic - Read device part number length
672 * @hw: pointer to the HW structure
673 * @pba_num_size: size of part number buffer
675 * Reads the product board assembly (PBA) number length from the EEPROM and
676 * stores the value in pba_num_size.
678 s32
e1000_read_pba_length_generic(struct e1000_hw
*hw
, u32
*pba_num_size
)
685 DEBUGFUNC("e1000_read_pba_length_generic");
687 if (pba_num_size
== NULL
) {
688 DEBUGOUT("PBA buffer size was null\n");
689 return -E1000_ERR_INVALID_ARGUMENT
;
692 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_0
, 1, &nvm_data
);
694 DEBUGOUT("NVM Read Error\n");
698 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_1
, 1, &pba_ptr
);
700 DEBUGOUT("NVM Read Error\n");
704 /* if data is not ptr guard the PBA must be in legacy format */
705 if (nvm_data
!= NVM_PBA_PTR_GUARD
) {
706 *pba_num_size
= E1000_PBANUM_LENGTH
;
707 return E1000_SUCCESS
;
710 ret_val
= hw
->nvm
.ops
.read(hw
, pba_ptr
, 1, &length
);
712 DEBUGOUT("NVM Read Error\n");
716 if (length
== 0xFFFF || length
== 0) {
717 DEBUGOUT("NVM PBA number section invalid length\n");
718 return -E1000_ERR_NVM_PBA_SECTION
;
721 /* Convert from length in u16 values to u8 chars, add 1 for NULL,
722 * and subtract 2 because length field is included in length.
724 *pba_num_size
= ((u32
)length
* 2) - 1;
726 return E1000_SUCCESS
;
734 * e1000_read_mac_addr_generic - Read device MAC address
735 * @hw: pointer to the HW structure
737 * Reads the device MAC address from the EEPROM and stores the value.
738 * Since devices with two ports use the same EEPROM, we increment the
739 * last bit in the MAC address for the second port.
741 s32
e1000_read_mac_addr_generic(struct e1000_hw
*hw
)
747 rar_high
= E1000_READ_REG(hw
, E1000_RAH(0));
748 rar_low
= E1000_READ_REG(hw
, E1000_RAL(0));
750 for (i
= 0; i
< E1000_RAL_MAC_ADDR_LEN
; i
++)
751 hw
->mac
.perm_addr
[i
] = (u8
)(rar_low
>> (i
*8));
753 for (i
= 0; i
< E1000_RAH_MAC_ADDR_LEN
; i
++)
754 hw
->mac
.perm_addr
[i
+4] = (u8
)(rar_high
>> (i
*8));
756 for (i
= 0; i
< ETH_ADDR_LEN
; i
++)
757 hw
->mac
.addr
[i
] = hw
->mac
.perm_addr
[i
];
759 return E1000_SUCCESS
;
763 * e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
764 * @hw: pointer to the HW structure
766 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
767 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
769 s32
e1000_validate_nvm_checksum_generic(struct e1000_hw
*hw
)
775 DEBUGFUNC("e1000_validate_nvm_checksum_generic");
777 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
778 ret_val
= hw
->nvm
.ops
.read(hw
, i
, 1, &nvm_data
);
780 DEBUGOUT("NVM Read Error\n");
783 checksum
+= nvm_data
;
786 if (checksum
!= (u16
) NVM_SUM
) {
787 DEBUGOUT("NVM Checksum Invalid\n");
788 return -E1000_ERR_NVM
;
791 return E1000_SUCCESS
;
795 * e1000_update_nvm_checksum_generic - Update EEPROM checksum
796 * @hw: pointer to the HW structure
798 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
799 * up to the checksum. Then calculates the EEPROM checksum and writes the
800 * value to the EEPROM.
802 s32
e1000_update_nvm_checksum_generic(struct e1000_hw
*hw
)
808 DEBUGFUNC("e1000_update_nvm_checksum");
810 for (i
= 0; i
< NVM_CHECKSUM_REG
; i
++) {
811 ret_val
= hw
->nvm
.ops
.read(hw
, i
, 1, &nvm_data
);
813 DEBUGOUT("NVM Read Error while updating checksum.\n");
816 checksum
+= nvm_data
;
818 checksum
= (u16
) NVM_SUM
- checksum
;
819 ret_val
= hw
->nvm
.ops
.write(hw
, NVM_CHECKSUM_REG
, 1, &checksum
);
821 DEBUGOUT("NVM Write Error while updating checksum.\n");
827 * e1000_reload_nvm_generic - Reloads EEPROM
828 * @hw: pointer to the HW structure
830 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
831 * extended control register.
833 static void e1000_reload_nvm_generic(struct e1000_hw
*hw
)
837 DEBUGFUNC("e1000_reload_nvm_generic");
840 ctrl_ext
= E1000_READ_REG(hw
, E1000_CTRL_EXT
);
841 ctrl_ext
|= E1000_CTRL_EXT_EE_RST
;
842 E1000_WRITE_REG(hw
, E1000_CTRL_EXT
, ctrl_ext
);
843 E1000_WRITE_FLUSH(hw
);
847 * e1000_get_fw_version - Get firmware version information
848 * @hw: pointer to the HW structure
849 * @fw_vers: pointer to output version structure
851 * unsupported/not present features return 0 in version structure
853 void e1000_get_fw_version(struct e1000_hw
*hw
, struct e1000_fw_version
*fw_vers
)
855 u16 eeprom_verh
, eeprom_verl
, etrack_test
, fw_version
;
856 u8 q
, hval
, rem
, result
;
857 u16 comb_verh
, comb_verl
, comb_offset
;
859 memset(fw_vers
, 0, sizeof(struct e1000_fw_version
));
861 /* basic eeprom version numbers, bits used vary by part and by tool
862 * used to create the nvm images */
863 /* Check which data format we have */
864 hw
->nvm
.ops
.read(hw
, NVM_ETRACK_HIWORD
, 1, &etrack_test
);
865 switch (hw
->mac
.type
) {
867 e1000_read_invm_version(hw
, fw_vers
);
872 /* Use this format, unless EETRACK ID exists,
873 * then use alternate format
875 if ((etrack_test
& NVM_MAJOR_MASK
) != NVM_ETRACK_VALID
) {
876 hw
->nvm
.ops
.read(hw
, NVM_VERSION
, 1, &fw_version
);
877 fw_vers
->eep_major
= (fw_version
& NVM_MAJOR_MASK
)
879 fw_vers
->eep_minor
= (fw_version
& NVM_MINOR_MASK
)
881 fw_vers
->eep_build
= (fw_version
& NVM_IMAGE_ID_MASK
);
886 if (!(e1000_get_flash_presence_i210(hw
))) {
887 e1000_read_invm_version(hw
, fw_vers
);
893 /* find combo image version */
894 hw
->nvm
.ops
.read(hw
, NVM_COMB_VER_PTR
, 1, &comb_offset
);
895 if ((comb_offset
!= 0x0) &&
896 (comb_offset
!= NVM_VER_INVALID
)) {
898 hw
->nvm
.ops
.read(hw
, (NVM_COMB_VER_OFF
+ comb_offset
899 + 1), 1, &comb_verh
);
900 hw
->nvm
.ops
.read(hw
, (NVM_COMB_VER_OFF
+ comb_offset
),
903 /* get Option Rom version if it exists and is valid */
904 if ((comb_verh
&& comb_verl
) &&
905 ((comb_verh
!= NVM_VER_INVALID
) &&
906 (comb_verl
!= NVM_VER_INVALID
))) {
908 fw_vers
->or_valid
= true;
910 comb_verl
>> NVM_COMB_VER_SHFT
;
912 (comb_verl
<< NVM_COMB_VER_SHFT
)
913 | (comb_verh
>> NVM_COMB_VER_SHFT
);
915 comb_verh
& NVM_COMB_VER_MASK
;
922 hw
->nvm
.ops
.read(hw
, NVM_VERSION
, 1, &fw_version
);
923 fw_vers
->eep_major
= (fw_version
& NVM_MAJOR_MASK
)
926 /* check for old style version format in newer images*/
927 if ((fw_version
& NVM_NEW_DEC_MASK
) == 0x0) {
928 eeprom_verl
= (fw_version
& NVM_COMB_VER_MASK
);
930 eeprom_verl
= (fw_version
& NVM_MINOR_MASK
)
933 /* Convert minor value to hex before assigning to output struct
934 * Val to be converted will not be higher than 99, per tool output
936 q
= eeprom_verl
/ NVM_HEX_CONV
;
937 hval
= q
* NVM_HEX_TENS
;
938 rem
= eeprom_verl
% NVM_HEX_CONV
;
940 fw_vers
->eep_minor
= result
;
943 if ((etrack_test
& NVM_MAJOR_MASK
) == NVM_ETRACK_VALID
) {
944 hw
->nvm
.ops
.read(hw
, NVM_ETRACK_WORD
, 1, &eeprom_verl
);
945 hw
->nvm
.ops
.read(hw
, (NVM_ETRACK_WORD
+ 1), 1, &eeprom_verh
);
946 fw_vers
->etrack_id
= (eeprom_verh
<< NVM_ETRACK_SHIFT
)