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[ceph.git] / ceph / src / seastar / dpdk / lib / librte_eal / common / arch / arm / rte_cpuflags.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (C) Cavium, Inc. 2015.
3 * Copyright(c) 2015 RehiveTech. All rights reserved.
4 */
5
6 #include "rte_cpuflags.h"
7
8 #include <elf.h>
9 #include <fcntl.h>
10 #include <assert.h>
11 #include <unistd.h>
12 #include <string.h>
13
14 #ifndef AT_HWCAP
15 #define AT_HWCAP 16
16 #endif
17
18 #ifndef AT_HWCAP2
19 #define AT_HWCAP2 26
20 #endif
21
22 #ifndef AT_PLATFORM
23 #define AT_PLATFORM 15
24 #endif
25
26 enum cpu_register_t {
27 REG_NONE = 0,
28 REG_HWCAP,
29 REG_HWCAP2,
30 REG_PLATFORM,
31 REG_MAX
32 };
33
34 typedef uint32_t hwcap_registers_t[REG_MAX];
35
36 /**
37 * Struct to hold a processor feature entry
38 */
39 struct feature_entry {
40 uint32_t reg;
41 uint32_t bit;
42 #define CPU_FLAG_NAME_MAX_LEN 64
43 char name[CPU_FLAG_NAME_MAX_LEN];
44 };
45
46 #define FEAT_DEF(name, reg, bit) \
47 [RTE_CPUFLAG_##name] = {reg, bit, #name},
48
49 #ifdef RTE_ARCH_ARMv7
50 #define PLATFORM_STR "v7l"
51 typedef Elf32_auxv_t _Elfx_auxv_t;
52
53 const struct feature_entry rte_cpu_feature_table[] = {
54 FEAT_DEF(SWP, REG_HWCAP, 0)
55 FEAT_DEF(HALF, REG_HWCAP, 1)
56 FEAT_DEF(THUMB, REG_HWCAP, 2)
57 FEAT_DEF(A26BIT, REG_HWCAP, 3)
58 FEAT_DEF(FAST_MULT, REG_HWCAP, 4)
59 FEAT_DEF(FPA, REG_HWCAP, 5)
60 FEAT_DEF(VFP, REG_HWCAP, 6)
61 FEAT_DEF(EDSP, REG_HWCAP, 7)
62 FEAT_DEF(JAVA, REG_HWCAP, 8)
63 FEAT_DEF(IWMMXT, REG_HWCAP, 9)
64 FEAT_DEF(CRUNCH, REG_HWCAP, 10)
65 FEAT_DEF(THUMBEE, REG_HWCAP, 11)
66 FEAT_DEF(NEON, REG_HWCAP, 12)
67 FEAT_DEF(VFPv3, REG_HWCAP, 13)
68 FEAT_DEF(VFPv3D16, REG_HWCAP, 14)
69 FEAT_DEF(TLS, REG_HWCAP, 15)
70 FEAT_DEF(VFPv4, REG_HWCAP, 16)
71 FEAT_DEF(IDIVA, REG_HWCAP, 17)
72 FEAT_DEF(IDIVT, REG_HWCAP, 18)
73 FEAT_DEF(VFPD32, REG_HWCAP, 19)
74 FEAT_DEF(LPAE, REG_HWCAP, 20)
75 FEAT_DEF(EVTSTRM, REG_HWCAP, 21)
76 FEAT_DEF(AES, REG_HWCAP2, 0)
77 FEAT_DEF(PMULL, REG_HWCAP2, 1)
78 FEAT_DEF(SHA1, REG_HWCAP2, 2)
79 FEAT_DEF(SHA2, REG_HWCAP2, 3)
80 FEAT_DEF(CRC32, REG_HWCAP2, 4)
81 FEAT_DEF(V7L, REG_PLATFORM, 0)
82 };
83
84 #elif defined RTE_ARCH_ARM64
85 #define PLATFORM_STR "aarch64"
86 typedef Elf64_auxv_t _Elfx_auxv_t;
87
88 const struct feature_entry rte_cpu_feature_table[] = {
89 FEAT_DEF(FP, REG_HWCAP, 0)
90 FEAT_DEF(NEON, REG_HWCAP, 1)
91 FEAT_DEF(EVTSTRM, REG_HWCAP, 2)
92 FEAT_DEF(AES, REG_HWCAP, 3)
93 FEAT_DEF(PMULL, REG_HWCAP, 4)
94 FEAT_DEF(SHA1, REG_HWCAP, 5)
95 FEAT_DEF(SHA2, REG_HWCAP, 6)
96 FEAT_DEF(CRC32, REG_HWCAP, 7)
97 FEAT_DEF(ATOMICS, REG_HWCAP, 8)
98 FEAT_DEF(AARCH64, REG_PLATFORM, 1)
99 };
100 #endif /* RTE_ARCH */
101
102 /*
103 * Read AUXV software register and get cpu features for ARM
104 */
105 static void
106 rte_cpu_get_features(hwcap_registers_t out)
107 {
108 out[REG_HWCAP] = rte_cpu_getauxval(AT_HWCAP);
109 out[REG_HWCAP2] = rte_cpu_getauxval(AT_HWCAP2);
110 if (!rte_cpu_strcmp_auxval(AT_PLATFORM, PLATFORM_STR))
111 out[REG_PLATFORM] = 0x0001;
112 }
113
114 /*
115 * Checks if a particular flag is available on current machine.
116 */
117 int
118 rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
119 {
120 const struct feature_entry *feat;
121 hwcap_registers_t regs = {0};
122
123 if (feature >= RTE_CPUFLAG_NUMFLAGS)
124 return -ENOENT;
125
126 feat = &rte_cpu_feature_table[feature];
127 if (feat->reg == REG_NONE)
128 return -EFAULT;
129
130 rte_cpu_get_features(regs);
131 return (regs[feat->reg] >> feat->bit) & 1;
132 }
133
134 const char *
135 rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)
136 {
137 if (feature >= RTE_CPUFLAG_NUMFLAGS)
138 return NULL;
139 return rte_cpu_feature_table[feature].name;
140 }