ceph/src/seastar/dpdk/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h

   1 /*
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015 RehiveTech. All rights reserved.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of RehiveTech nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #ifndef _RTE_CPUFLAGS_ARM32_H_
  34 #define _RTE_CPUFLAGS_ARM32_H_
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 /**
  41  * Enumeration of all CPU features supported
  42  */
  43 enum rte_cpu_flag_t {
  44         RTE_CPUFLAG_SWP = 0,
  45         RTE_CPUFLAG_HALF,
  46         RTE_CPUFLAG_THUMB,
  47         RTE_CPUFLAG_A26BIT,
  48         RTE_CPUFLAG_FAST_MULT,
  49         RTE_CPUFLAG_FPA,
  50         RTE_CPUFLAG_VFP,
  51         RTE_CPUFLAG_EDSP,
  52         RTE_CPUFLAG_JAVA,
  53         RTE_CPUFLAG_IWMMXT,
  54         RTE_CPUFLAG_CRUNCH,
  55         RTE_CPUFLAG_THUMBEE,
  56         RTE_CPUFLAG_NEON,
  57         RTE_CPUFLAG_VFPv3,
  58         RTE_CPUFLAG_VFPv3D16,
  59         RTE_CPUFLAG_TLS,
  60         RTE_CPUFLAG_VFPv4,
  61         RTE_CPUFLAG_IDIVA,
  62         RTE_CPUFLAG_IDIVT,
  63         RTE_CPUFLAG_VFPD32,
  64         RTE_CPUFLAG_LPAE,
  65         RTE_CPUFLAG_EVTSTRM,
  66         RTE_CPUFLAG_AES,
  67         RTE_CPUFLAG_PMULL,
  68         RTE_CPUFLAG_SHA1,
  69         RTE_CPUFLAG_SHA2,
  70         RTE_CPUFLAG_CRC32,
  71         RTE_CPUFLAG_V7L,
  72         /* The last item */
  73         RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
  74 };
  75
  76 #include "generic/rte_cpuflags.h"
  77
  78 #ifdef __cplusplus
  79 }
  80 #endif
  81
  82 #endif /* _RTE_CPUFLAGS_ARM32_H_ */