ceph/src/seastar/dpdk/lib/librte_ether/rte_eth_ctrl.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _RTE_ETH_CTRL_H_
  35 #define _RTE_ETH_CTRL_H_
  36
  37 #include <stdint.h>
  38 #include <rte_common.h>
  39 #include "rte_ether.h"
  40
  41 /**
  42  * @file
  43  *
  44  * Ethernet device features and related data structures used
  45  * by control APIs should be defined in this file.
  46  *
  47  */
  48
  49 #ifdef __cplusplus
  50 extern "C" {
  51 #endif
  52
  53 /*
  54  * A packet can be identified by hardware as different flow types. Different
  55  * NIC hardwares may support different flow types.
  56  * Basically, the NIC hardware identifies the flow type as deep protocol as
  57  * possible, and exclusively. For example, if a packet is identified as
  58  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
  59  * though it is an actual IPV4 packet.
  60  * Note that the flow types are used to define RSS offload types in
  61  * rte_ethdev.h.
  62  */
  63 #define RTE_ETH_FLOW_UNKNOWN             0
  64 #define RTE_ETH_FLOW_RAW                 1
  65 #define RTE_ETH_FLOW_IPV4                2
  66 #define RTE_ETH_FLOW_FRAG_IPV4           3
  67 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP    4
  68 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP    5
  69 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP   6
  70 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER  7
  71 #define RTE_ETH_FLOW_IPV6                8
  72 #define RTE_ETH_FLOW_FRAG_IPV6           9
  73 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP   10
  74 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP   11
  75 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP  12
  76 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
  77 #define RTE_ETH_FLOW_L2_PAYLOAD         14
  78 #define RTE_ETH_FLOW_IPV6_EX            15
  79 #define RTE_ETH_FLOW_IPV6_TCP_EX        16
  80 #define RTE_ETH_FLOW_IPV6_UDP_EX        17
  81 #define RTE_ETH_FLOW_PORT               18
  82         /**< Consider device port number as a flow differentiator */
  83 #define RTE_ETH_FLOW_VXLAN              19 /**< VXLAN protocol based flow */
  84 #define RTE_ETH_FLOW_GENEVE             20 /**< GENEVE protocol based flow */
  85 #define RTE_ETH_FLOW_NVGRE              21 /**< NVGRE protocol based flow */
  86 #define RTE_ETH_FLOW_MAX                22
  87
  88 /**
  89  * Feature filter types
  90  */
  91 enum rte_filter_type {
  92         RTE_ETH_FILTER_NONE = 0,
  93         RTE_ETH_FILTER_MACVLAN,
  94         RTE_ETH_FILTER_ETHERTYPE,
  95         RTE_ETH_FILTER_FLEXIBLE,
  96         RTE_ETH_FILTER_SYN,
  97         RTE_ETH_FILTER_NTUPLE,
  98         RTE_ETH_FILTER_TUNNEL,
  99         RTE_ETH_FILTER_FDIR,
 100         RTE_ETH_FILTER_HASH,
 101         RTE_ETH_FILTER_L2_TUNNEL,
 102         RTE_ETH_FILTER_GENERIC,
 103         RTE_ETH_FILTER_MAX
 104 };
 105
 106 /**
 107  * Generic operations on filters
 108  */
 109 enum rte_filter_op {
 110         /** used to check whether the type filter is supported */
 111         RTE_ETH_FILTER_NOP = 0,
 112         RTE_ETH_FILTER_ADD,      /**< add filter entry */
 113         RTE_ETH_FILTER_UPDATE,   /**< update filter entry */
 114         RTE_ETH_FILTER_DELETE,   /**< delete filter entry */
 115         RTE_ETH_FILTER_FLUSH,    /**< flush all entries */
 116         RTE_ETH_FILTER_GET,      /**< get filter entry */
 117         RTE_ETH_FILTER_SET,      /**< configurations */
 118         RTE_ETH_FILTER_INFO,     /**< retrieve information */
 119         RTE_ETH_FILTER_STATS,    /**< retrieve statistics */
 120         RTE_ETH_FILTER_OP_MAX
 121 };
 122
 123 /**
 124  * MAC filter type
 125  */
 126 enum rte_mac_filter_type {
 127         RTE_MAC_PERFECT_MATCH = 1, /**< exact match of MAC addr. */
 128         RTE_MACVLAN_PERFECT_MATCH, /**< exact match of MAC addr and VLAN ID. */
 129         RTE_MAC_HASH_MATCH, /**< hash match of MAC addr. */
 130         /** hash match of MAC addr and exact match of VLAN ID. */
 131         RTE_MACVLAN_HASH_MATCH,
 132 };
 133
 134 /**
 135  * MAC filter info
 136  */
 137 struct rte_eth_mac_filter {
 138         uint8_t is_vf; /**< 1 for VF, 0 for port dev */
 139         uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
 140         enum rte_mac_filter_type filter_type; /**< MAC filter type */
 141         struct ether_addr mac_addr;
 142 };
 143
 144 /**
 145  * Define all structures for Ethertype Filter type.
 146  */
 147
 148 #define RTE_ETHTYPE_FLAGS_MAC    0x0001 /**< If set, compare mac */
 149 #define RTE_ETHTYPE_FLAGS_DROP   0x0002 /**< If set, drop packet when match */
 150
 151 /**
 152  * A structure used to define the ethertype filter entry
 153  * to support RTE_ETH_FILTER_ETHERTYPE with RTE_ETH_FILTER_ADD,
 154  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 155  */
 156 struct rte_eth_ethertype_filter {
 157         struct ether_addr mac_addr;   /**< Mac address to match. */
 158         uint16_t ether_type;          /**< Ether type to match */
 159         uint16_t flags;               /**< Flags from RTE_ETHTYPE_FLAGS_* */
 160         uint16_t queue;               /**< Queue assigned to when match*/
 161 };
 162
 163 #define RTE_FLEX_FILTER_MAXLEN  128     /**< bytes to use in flex filter. */
 164 #define RTE_FLEX_FILTER_MASK_SIZE       \
 165         (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
 166                                         /**< mask bytes in flex filter. */
 167
 168 /**
 169  *  A structure used to define the flex filter entry
 170  *  to support RTE_ETH_FILTER_FLEXIBLE with RTE_ETH_FILTER_ADD,
 171  *  RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 172  */
 173 struct rte_eth_flex_filter {
 174         uint16_t len;
 175         uint8_t bytes[RTE_FLEX_FILTER_MAXLEN];  /**< flex bytes in big endian.*/
 176         uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE];    /**< if mask bit is 1b, do
 177                                         not compare corresponding byte. */
 178         uint8_t priority;
 179         uint16_t queue;       /**< Queue assigned to when match. */
 180 };
 181
 182 /**
 183  * A structure used to define the TCP syn filter entry
 184  * to support RTE_ETH_FILTER_SYN with RTE_ETH_FILTER_ADD,
 185  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 186  */
 187 struct rte_eth_syn_filter {
 188         uint8_t hig_pri;     /**< 1 - higher priority than other filters,
 189                                   0 - lower priority. */
 190         uint16_t queue;      /**< Queue assigned to when match */
 191 };
 192
 193 /**
 194  * Define all structures for ntuple Filter type.
 195  */
 196
 197 #define RTE_NTUPLE_FLAGS_DST_IP    0x0001 /**< If set, dst_ip is part of ntuple */
 198 #define RTE_NTUPLE_FLAGS_SRC_IP    0x0002 /**< If set, src_ip is part of ntuple */
 199 #define RTE_NTUPLE_FLAGS_DST_PORT  0x0004 /**< If set, dst_port is part of ntuple */
 200 #define RTE_NTUPLE_FLAGS_SRC_PORT  0x0008 /**< If set, src_port is part of ntuple */
 201 #define RTE_NTUPLE_FLAGS_PROTO     0x0010 /**< If set, protocol is part of ntuple */
 202 #define RTE_NTUPLE_FLAGS_TCP_FLAG  0x0020 /**< If set, tcp flag is involved */
 203
 204 #define RTE_5TUPLE_FLAGS ( \
 205                 RTE_NTUPLE_FLAGS_DST_IP | \
 206                 RTE_NTUPLE_FLAGS_SRC_IP | \
 207                 RTE_NTUPLE_FLAGS_DST_PORT | \
 208                 RTE_NTUPLE_FLAGS_SRC_PORT | \
 209                 RTE_NTUPLE_FLAGS_PROTO)
 210
 211 #define RTE_2TUPLE_FLAGS ( \
 212                 RTE_NTUPLE_FLAGS_DST_PORT | \
 213                 RTE_NTUPLE_FLAGS_PROTO)
 214
 215 #define TCP_URG_FLAG 0x20
 216 #define TCP_ACK_FLAG 0x10
 217 #define TCP_PSH_FLAG 0x08
 218 #define TCP_RST_FLAG 0x04
 219 #define TCP_SYN_FLAG 0x02
 220 #define TCP_FIN_FLAG 0x01
 221 #define TCP_FLAG_ALL 0x3F
 222
 223 /**
 224  * A structure used to define the ntuple filter entry
 225  * to support RTE_ETH_FILTER_NTUPLE with RTE_ETH_FILTER_ADD,
 226  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
 227  */
 228 struct rte_eth_ntuple_filter {
 229         uint16_t flags;          /**< Flags from RTE_NTUPLE_FLAGS_* */
 230         uint32_t dst_ip;         /**< Destination IP address in big endian. */
 231         uint32_t dst_ip_mask;    /**< Mask of destination IP address. */
 232         uint32_t src_ip;         /**< Source IP address in big endian. */
 233         uint32_t src_ip_mask;    /**< Mask of destination IP address. */
 234         uint16_t dst_port;       /**< Destination port in big endian. */
 235         uint16_t dst_port_mask;  /**< Mask of destination port. */
 236         uint16_t src_port;       /**< Source Port in big endian. */
 237         uint16_t src_port_mask;  /**< Mask of source port. */
 238         uint8_t proto;           /**< L4 protocol. */
 239         uint8_t proto_mask;      /**< Mask of L4 protocol. */
 240         /** tcp_flags only meaningful when the proto is TCP.
 241             The packet matched above ntuple fields and contain
 242             any set bit in tcp_flags will hit this filter. */
 243         uint8_t tcp_flags;
 244         uint16_t priority;       /**< seven levels (001b-111b), 111b is highest,
 245                                       used when more than one filter matches. */
 246         uint16_t queue;          /**< Queue assigned to when match*/
 247 };
 248
 249 /**
 250  * Tunneled type.
 251  */
 252 enum rte_eth_tunnel_type {
 253         RTE_TUNNEL_TYPE_NONE = 0,
 254         RTE_TUNNEL_TYPE_VXLAN,
 255         RTE_TUNNEL_TYPE_GENEVE,
 256         RTE_TUNNEL_TYPE_TEREDO,
 257         RTE_TUNNEL_TYPE_NVGRE,
 258         RTE_TUNNEL_TYPE_IP_IN_GRE,
 259         RTE_L2_TUNNEL_TYPE_E_TAG,
 260         RTE_TUNNEL_TYPE_MAX,
 261 };
 262
 263 /**
 264  * filter type of tunneling packet
 265  */
 266 #define ETH_TUNNEL_FILTER_OMAC  0x01 /**< filter by outer MAC addr */
 267 #define ETH_TUNNEL_FILTER_OIP   0x02 /**< filter by outer IP Addr */
 268 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */
 269 #define ETH_TUNNEL_FILTER_IMAC  0x08 /**< filter by inner MAC addr */
 270 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */
 271 #define ETH_TUNNEL_FILTER_IIP   0x20 /**< filter by inner IP addr */
 272
 273 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
 274                                         ETH_TUNNEL_FILTER_IVLAN)
 275 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
 276                                         ETH_TUNNEL_FILTER_IVLAN | \
 277                                         ETH_TUNNEL_FILTER_TENID)
 278 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
 279                                         ETH_TUNNEL_FILTER_TENID)
 280 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
 281                                         ETH_TUNNEL_FILTER_TENID | \
 282                                         ETH_TUNNEL_FILTER_IMAC)
 283
 284 /**
 285  *  Select IPv4 or IPv6 for tunnel filters.
 286  */
 287 enum rte_tunnel_iptype {
 288         RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */
 289         RTE_TUNNEL_IPTYPE_IPV6,     /**< IPv6. */
 290 };
 291
 292 /**
 293  * Tunneling Packet filter configuration.
 294  */
 295 struct rte_eth_tunnel_filter_conf {
 296         struct ether_addr outer_mac;    /**< Outer MAC address to match. */
 297         struct ether_addr inner_mac;    /**< Inner MAC address to match. */
 298         uint16_t inner_vlan;            /**< Inner VLAN to match. */
 299         enum rte_tunnel_iptype ip_type; /**< IP address type. */
 300         /** Outer destination IP address to match if ETH_TUNNEL_FILTER_OIP
 301             is set in filter_type, or inner destination IP address to match
 302             if ETH_TUNNEL_FILTER_IIP is set in filter_type . */
 303         union {
 304                 uint32_t ipv4_addr;     /**< IPv4 address in big endian. */
 305                 uint32_t ipv6_addr[4];  /**< IPv6 address in big endian. */
 306         } ip_addr;
 307         /** Flags from ETH_TUNNEL_FILTER_XX - see above. */
 308         uint16_t filter_type;
 309         enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */
 310         uint32_t tenant_id;     /**< Tenant ID to match. VNI, GRE key... */
 311         uint16_t queue_id;      /**< Queue assigned to if match. */
 312 };
 313
 314 /**
 315  * Global eth device configuration type.
 316  */
 317 enum rte_eth_global_cfg_type {
 318         RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
 319         RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
 320         RTE_ETH_GLOBAL_CFG_TYPE_MAX,
 321 };
 322
 323 /**
 324  * Global eth device configuration.
 325  */
 326 struct rte_eth_global_cfg {
 327         enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */
 328         union {
 329                 uint8_t gre_key_len; /**< Valid GRE key length in byte. */
 330                 uint64_t reserved; /**< Reserve space for future use. */
 331         } cfg;
 332 };
 333
 334 #define RTE_ETH_FDIR_MAX_FLEXLEN 16  /**< Max length of flexbytes. */
 335 #define RTE_ETH_INSET_SIZE_MAX   128 /**< Max length of input set. */
 336
 337 /**
 338  * Input set fields for Flow Director and Hash filters
 339  */
 340 enum rte_eth_input_set_field {
 341         RTE_ETH_INPUT_SET_UNKNOWN = 0,
 342
 343         /* L2 */
 344         RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
 345         RTE_ETH_INPUT_SET_L2_DST_MAC,
 346         RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
 347         RTE_ETH_INPUT_SET_L2_INNER_VLAN,
 348         RTE_ETH_INPUT_SET_L2_ETHERTYPE,
 349
 350         /* L3 */
 351         RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
 352         RTE_ETH_INPUT_SET_L3_DST_IP4,
 353         RTE_ETH_INPUT_SET_L3_SRC_IP6,
 354         RTE_ETH_INPUT_SET_L3_DST_IP6,
 355         RTE_ETH_INPUT_SET_L3_IP4_TOS,
 356         RTE_ETH_INPUT_SET_L3_IP4_PROTO,
 357         RTE_ETH_INPUT_SET_L3_IP6_TC,
 358         RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
 359         RTE_ETH_INPUT_SET_L3_IP4_TTL,
 360         RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
 361
 362         /* L4 */
 363         RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
 364         RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
 365         RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
 366         RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
 367         RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
 368         RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
 369         RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
 370
 371         /* Tunnel */
 372         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
 373         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
 374         RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
 375         RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
 376         RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
 377
 378         /* Flexible Payload */
 379         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
 380         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
 381         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
 382         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
 383         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
 384         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
 385         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
 386         RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
 387
 388         RTE_ETH_INPUT_SET_DEFAULT = 65533,
 389         RTE_ETH_INPUT_SET_NONE = 65534,
 390         RTE_ETH_INPUT_SET_MAX = 65535,
 391 };
 392
 393 /**
 394  * Filters input set operations
 395  */
 396 enum rte_filter_input_set_op {
 397         RTE_ETH_INPUT_SET_OP_UNKNOWN,
 398         RTE_ETH_INPUT_SET_SELECT, /**< select input set */
 399         RTE_ETH_INPUT_SET_ADD,    /**< add input set entry */
 400         RTE_ETH_INPUT_SET_OP_MAX
 401 };
 402
 403
 404 /**
 405  * A structure used to define the input set configuration for
 406  * flow director and hash filters
 407  */
 408 struct rte_eth_input_set_conf {
 409         uint16_t flow_type;
 410         uint16_t inset_size;
 411         enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
 412         enum rte_filter_input_set_op op;
 413 };
 414
 415 /**
 416  * A structure used to define the input for L2 flow
 417  */
 418 struct rte_eth_l2_flow {
 419         uint16_t ether_type;          /**< Ether type in big endian */
 420 };
 421
 422 /**
 423  * A structure used to define the input for IPV4 flow
 424  */
 425 struct rte_eth_ipv4_flow {
 426         uint32_t src_ip;      /**< IPv4 source address in big endian. */
 427         uint32_t dst_ip;      /**< IPv4 destination address in big endian. */
 428         uint8_t  tos;         /**< Type of service to match. */
 429         uint8_t  ttl;         /**< Time to live to match. */
 430         uint8_t  proto;       /**< Protocol, next header in big endian. */
 431 };
 432
 433 /**
 434  * A structure used to define the input for IPV4 UDP flow
 435  */
 436 struct rte_eth_udpv4_flow {
 437         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 438         uint16_t src_port;           /**< UDP source port in big endian. */
 439         uint16_t dst_port;           /**< UDP destination port in big endian. */
 440 };
 441
 442 /**
 443  * A structure used to define the input for IPV4 TCP flow
 444  */
 445 struct rte_eth_tcpv4_flow {
 446         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 447         uint16_t src_port;           /**< TCP source port in big endian. */
 448         uint16_t dst_port;           /**< TCP destination port in big endian. */
 449 };
 450
 451 /**
 452  * A structure used to define the input for IPV4 SCTP flow
 453  */
 454 struct rte_eth_sctpv4_flow {
 455         struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
 456         uint16_t src_port;           /**< SCTP source port in big endian. */
 457         uint16_t dst_port;           /**< SCTP destination port in big endian. */
 458         uint32_t verify_tag;         /**< Verify tag in big endian */
 459 };
 460
 461 /**
 462  * A structure used to define the input for IPV6 flow
 463  */
 464 struct rte_eth_ipv6_flow {
 465         uint32_t src_ip[4];      /**< IPv6 source address in big endian. */
 466         uint32_t dst_ip[4];      /**< IPv6 destination address in big endian. */
 467         uint8_t  tc;             /**< Traffic class to match. */
 468         uint8_t  proto;          /**< Protocol, next header to match. */
 469         uint8_t  hop_limits;     /**< Hop limits to match. */
 470 };
 471
 472 /**
 473  * A structure used to define the input for IPV6 UDP flow
 474  */
 475 struct rte_eth_udpv6_flow {
 476         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 477         uint16_t src_port;           /**< UDP source port in big endian. */
 478         uint16_t dst_port;           /**< UDP destination port in big endian. */
 479 };
 480
 481 /**
 482  * A structure used to define the input for IPV6 TCP flow
 483  */
 484 struct rte_eth_tcpv6_flow {
 485         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 486         uint16_t src_port;           /**< TCP source port to in big endian. */
 487         uint16_t dst_port;           /**< TCP destination port in big endian. */
 488 };
 489
 490 /**
 491  * A structure used to define the input for IPV6 SCTP flow
 492  */
 493 struct rte_eth_sctpv6_flow {
 494         struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
 495         uint16_t src_port;           /**< SCTP source port in big endian. */
 496         uint16_t dst_port;           /**< SCTP destination port in big endian. */
 497         uint32_t verify_tag;         /**< Verify tag in big endian. */
 498 };
 499
 500 /**
 501  * A structure used to define the input for MAC VLAN flow
 502  */
 503 struct rte_eth_mac_vlan_flow {
 504         struct ether_addr mac_addr;  /**< Mac address to match. */
 505 };
 506
 507 /**
 508  * Tunnel type for flow director.
 509  */
 510 enum rte_eth_fdir_tunnel_type {
 511         RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
 512         RTE_FDIR_TUNNEL_TYPE_NVGRE,
 513         RTE_FDIR_TUNNEL_TYPE_VXLAN,
 514 };
 515
 516 /**
 517  * A structure used to define the input for tunnel flow, now it's VxLAN or
 518  * NVGRE
 519  */
 520 struct rte_eth_tunnel_flow {
 521         enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
 522         /** Tunnel ID to match. TNI, VNI... in big endian. */
 523         uint32_t tunnel_id;
 524         struct ether_addr mac_addr;                /**< Mac address to match. */
 525 };
 526
 527 /**
 528  * An union contains the inputs for all types of flow
 529  * Items in flows need to be in big endian
 530  */
 531 union rte_eth_fdir_flow {
 532         struct rte_eth_l2_flow     l2_flow;
 533         struct rte_eth_udpv4_flow  udp4_flow;
 534         struct rte_eth_tcpv4_flow  tcp4_flow;
 535         struct rte_eth_sctpv4_flow sctp4_flow;
 536         struct rte_eth_ipv4_flow   ip4_flow;
 537         struct rte_eth_udpv6_flow  udp6_flow;
 538         struct rte_eth_tcpv6_flow  tcp6_flow;
 539         struct rte_eth_sctpv6_flow sctp6_flow;
 540         struct rte_eth_ipv6_flow   ipv6_flow;
 541         struct rte_eth_mac_vlan_flow mac_vlan_flow;
 542         struct rte_eth_tunnel_flow   tunnel_flow;
 543 };
 544
 545 /**
 546  * A structure used to contain extend input of flow
 547  */
 548 struct rte_eth_fdir_flow_ext {
 549         uint16_t vlan_tci;
 550         uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
 551         /**< It is filled by the flexible payload to match. */
 552         uint8_t is_vf;   /**< 1 for VF, 0 for port dev */
 553         uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
 554 };
 555
 556 /**
 557  * A structure used to define the input for a flow director filter entry
 558  */
 559 struct rte_eth_fdir_input {
 560         uint16_t flow_type;
 561         union rte_eth_fdir_flow flow;
 562         /**< Flow fields to match, dependent on flow_type */
 563         struct rte_eth_fdir_flow_ext flow_ext;
 564         /**< Additional fields to match */
 565 };
 566
 567 /**
 568  * Behavior will be taken if FDIR match
 569  */
 570 enum rte_eth_fdir_behavior {
 571         RTE_ETH_FDIR_ACCEPT = 0,
 572         RTE_ETH_FDIR_REJECT,
 573         RTE_ETH_FDIR_PASSTHRU,
 574 };
 575
 576 /**
 577  * Flow director report status
 578  * It defines what will be reported if FDIR entry is matched.
 579  */
 580 enum rte_eth_fdir_status {
 581         RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
 582         RTE_ETH_FDIR_REPORT_ID,            /**< Only report FD ID. */
 583         RTE_ETH_FDIR_REPORT_ID_FLEX_4,     /**< Report FD ID and 4 flex bytes. */
 584         RTE_ETH_FDIR_REPORT_FLEX_8,        /**< Report 8 flex bytes. */
 585 };
 586
 587 /**
 588  * A structure used to define an action when match FDIR packet filter.
 589  */
 590 struct rte_eth_fdir_action {
 591         uint16_t rx_queue;        /**< Queue assigned to if FDIR match. */
 592         enum rte_eth_fdir_behavior behavior;     /**< Behavior will be taken */
 593         enum rte_eth_fdir_status report_status;  /**< Status report option */
 594         uint8_t flex_off;
 595         /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
 596              RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
 597              flex bytes start from in flexible payload. */
 598 };
 599
 600 /**
 601  * A structure used to define the flow director filter entry by filter_ctrl API
 602  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and
 603  * RTE_ETH_FILTER_DELETE operations.
 604  */
 605 struct rte_eth_fdir_filter {
 606         uint32_t soft_id;
 607         /**< ID, an unique value is required when deal with FDIR entry */
 608         struct rte_eth_fdir_input input;    /**< Input set */
 609         struct rte_eth_fdir_action action;  /**< Action taken when match */
 610 };
 611
 612 /**
 613  *  A structure used to configure FDIR masks that are used by the device
 614  *  to match the various fields of RX packet headers.
 615  */
 616 struct rte_eth_fdir_masks {
 617         uint16_t vlan_tci_mask;   /**< Bit mask for vlan_tci in big endian */
 618         /** Bit mask for ipv4 flow in big endian. */
 619         struct rte_eth_ipv4_flow   ipv4_mask;
 620         /** Bit maks for ipv6 flow in big endian. */
 621         struct rte_eth_ipv6_flow   ipv6_mask;
 622         /** Bit mask for L4 source port in big endian. */
 623         uint16_t src_port_mask;
 624         /** Bit mask for L4 destination port in big endian. */
 625         uint16_t dst_port_mask;
 626         /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
 627             first byte on the wire */
 628         uint8_t mac_addr_byte_mask;
 629         /** Bit mask for tunnel ID in big endian. */
 630         uint32_t tunnel_id_mask;
 631         uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
 632                                        0 - Ignore tunnel type. */
 633 };
 634
 635 /**
 636  * Payload type
 637  */
 638 enum rte_eth_payload_type {
 639         RTE_ETH_PAYLOAD_UNKNOWN = 0,
 640         RTE_ETH_RAW_PAYLOAD,
 641         RTE_ETH_L2_PAYLOAD,
 642         RTE_ETH_L3_PAYLOAD,
 643         RTE_ETH_L4_PAYLOAD,
 644         RTE_ETH_PAYLOAD_MAX = 8,
 645 };
 646
 647 /**
 648  * A structure used to select bytes extracted from the protocol layers to
 649  * flexible payload for filter
 650  */
 651 struct rte_eth_flex_payload_cfg {
 652         enum rte_eth_payload_type type;  /**< Payload type */
 653         uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
 654         /**< Offset in bytes from the beginning of packet's payload
 655              src_offset[i] indicates the flexbyte i's offset in original
 656              packet payload. This value should be less than
 657              flex_payload_limit in struct rte_eth_fdir_info.*/
 658 };
 659
 660 /**
 661  * A structure used to define FDIR masks for flexible payload
 662  * for each flow type
 663  */
 664 struct rte_eth_fdir_flex_mask {
 665         uint16_t flow_type;
 666         uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
 667         /**< Mask for the whole flexible payload */
 668 };
 669
 670 /**
 671  * A structure used to define all flexible payload related setting
 672  * include flex payload and flex mask
 673  */
 674 struct rte_eth_fdir_flex_conf {
 675         uint16_t nb_payloads;  /**< The number of following payload cfg */
 676         uint16_t nb_flexmasks; /**< The number of following mask */
 677         struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
 678         /**< Flex payload configuration for each payload type */
 679         struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
 680         /**< Flex mask configuration for each flow type */
 681 };
 682
 683 /**
 684  *  Flow Director setting modes: none, signature or perfect.
 685  */
 686 enum rte_fdir_mode {
 687         RTE_FDIR_MODE_NONE      = 0, /**< Disable FDIR support. */
 688         RTE_FDIR_MODE_SIGNATURE,     /**< Enable FDIR signature filter mode. */
 689         RTE_FDIR_MODE_PERFECT,       /**< Enable FDIR perfect filter mode. */
 690         RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
 691         RTE_FDIR_MODE_PERFECT_TUNNEL,   /**< Enable FDIR filter mode - tunnel. */
 692 };
 693
 694 #define UINT32_BIT (CHAR_BIT * sizeof(uint32_t))
 695 #define RTE_FLOW_MASK_ARRAY_SIZE \
 696         (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
 697
 698 /**
 699  * A structure used to get the information of flow director filter.
 700  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
 701  * It includes the mode, flexible payload configuration information,
 702  * capabilities and supported flow types, flexible payload characters.
 703  * It can be gotten to help taking specific configurations per device.
 704  */
 705 struct rte_eth_fdir_info {
 706         enum rte_fdir_mode mode; /**< Flow director mode */
 707         struct rte_eth_fdir_masks mask;
 708         /** Flex payload configuration information */
 709         struct rte_eth_fdir_flex_conf flex_conf;
 710         uint32_t guarant_spc; /**< Guaranteed spaces.*/
 711         uint32_t best_spc; /**< Best effort spaces.*/
 712         /** Bit mask for every supported flow type. */
 713         uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
 714         uint32_t max_flexpayload; /**< Total flex payload in bytes. */
 715         /** Flexible payload unit in bytes. Size and alignments of all flex
 716             payload segments should be multiplies of this value. */
 717         uint32_t flex_payload_unit;
 718         /** Max number of flexible payload continuous segments.
 719             Each segment should be a multiple of flex_payload_unit.*/
 720         uint32_t max_flex_payload_segment_num;
 721         /** Maximum src_offset in bytes allowed. It indicates that
 722             src_offset[i] in struct rte_eth_flex_payload_cfg should be less
 723             than this value. */
 724         uint16_t flex_payload_limit;
 725         /** Flex bitmask unit in bytes. Size of flex bitmasks should be a
 726             multiply of this value. */
 727         uint32_t flex_bitmask_unit;
 728         /** Max supported size of flex bitmasks in flex_bitmask_unit */
 729         uint32_t max_flex_bitmask_num;
 730 };
 731
 732 /**
 733  * A structure used to define the statistics of flow director.
 734  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
 735  */
 736 struct rte_eth_fdir_stats {
 737         uint32_t collision;    /**< Number of filters with collision. */
 738         uint32_t free;         /**< Number of free filters. */
 739         uint32_t maxhash;
 740         /**< The lookup hash value of the added filter that updated the value
 741            of the MAXLEN field */
 742         uint32_t maxlen;       /**< Longest linked list of filters. */
 743         uint64_t add;          /**< Number of added filters. */
 744         uint64_t remove;       /**< Number of removed filters. */
 745         uint64_t f_add;        /**< Number of failed added filters. */
 746         uint64_t f_remove;     /**< Number of failed removed filters. */
 747         uint32_t guarant_cnt;  /**< Number of filters in guaranteed spaces. */
 748         uint32_t best_cnt;     /**< Number of filters in best effort spaces. */
 749 };
 750
 751 /**
 752  * Flow Director filter information types.
 753  */
 754 enum rte_eth_fdir_filter_info_type {
 755         RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
 756         /** Flow Director filter input set configuration */
 757         RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
 758         RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
 759 };
 760
 761 /**
 762  * A structure used to set FDIR filter information, to support filter type
 763  * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation.
 764  */
 765 struct rte_eth_fdir_filter_info {
 766         enum rte_eth_fdir_filter_info_type info_type; /**< Information type */
 767         /** Details of fdir filter information */
 768         union {
 769                 /** Flow Director input set configuration per port */
 770                 struct rte_eth_input_set_conf input_set_conf;
 771         } info;
 772 };
 773
 774 /**
 775  * Hash filter information types.
 776  * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the
 777  *   information/configuration of 'symmetric hash enable' per port.
 778  * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global
 779  *   configurations of hash filters. Those global configurations are valid
 780  *   for all ports of the same NIC.
 781  * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global
 782  *   hash input set fields
 783  */
 784 enum rte_eth_hash_filter_info_type {
 785         RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
 786         /** Symmetric hash enable per port */
 787         RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
 788         /** Configure globally for hash filter */
 789         RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
 790         /** Global Hash filter input set configuration */
 791         RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
 792         RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
 793 };
 794
 795 /**
 796  * Hash function types.
 797  */
 798 enum rte_eth_hash_function {
 799         RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
 800         RTE_ETH_HASH_FUNCTION_TOEPLITZ, /**< Toeplitz */
 801         RTE_ETH_HASH_FUNCTION_SIMPLE_XOR, /**< Simple XOR */
 802         RTE_ETH_HASH_FUNCTION_MAX,
 803 };
 804
 805 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
 806         (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
 807 /**
 808  * A structure used to set or get global hash function configurations which
 809  * include symmetric hash enable per flow type and hash function type.
 810  * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the
 811  * corresponding flow type is enabled or not.
 812  * Each bit in valid_bit_mask[] indicates if the corresponding bit in
 813  * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it
 814  * also means if the flow type is supported by hardware or not.
 815  */
 816 struct rte_eth_hash_global_conf {
 817         enum rte_eth_hash_function hash_func; /**< Hash function type */
 818         /** Bit mask for symmetric hash enable per flow type */
 819         uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
 820         /** Bit mask indicates if the corresponding bit is valid */
 821         uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
 822 };
 823
 824 /**
 825  * A structure used to set or get hash filter information, to support filter
 826  * type of 'RTE_ETH_FILTER_HASH' and its operations.
 827  */
 828 struct rte_eth_hash_filter_info {
 829         enum rte_eth_hash_filter_info_type info_type; /**< Information type */
 830         /** Details of hash filter information */
 831         union {
 832                 /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */
 833                 uint8_t enable;
 834                 /** Global configurations of hash filter */
 835                 struct rte_eth_hash_global_conf global_conf;
 836                 /** Global configurations of hash filter input set */
 837                 struct rte_eth_input_set_conf input_set_conf;
 838         } info;
 839 };
 840
 841 /**
 842  * l2 tunnel configuration.
 843  */
 844 struct rte_eth_l2_tunnel_conf {
 845         enum rte_eth_tunnel_type l2_tunnel_type;
 846         uint16_t ether_type; /* ether type in l2 header */
 847         uint32_t tunnel_id; /* port tag id for e-tag */
 848         uint16_t vf_id; /* VF id for tag insertion */
 849         uint32_t pool; /* destination pool for tag based forwarding */
 850 };
 851
 852 #ifdef __cplusplus
 853 }
 854 #endif
 855
 856 #endif /* _RTE_ETH_CTRL_H_ */