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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2017 Intel Corporation
3 */
4
5 #include <rte_malloc.h>
6 #include <rte_cycles.h>
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9
10 #include "cperf_test_throughput.h"
11 #include "cperf_ops.h"
12 #include "cperf_test_common.h"
13
14 struct cperf_throughput_ctx {
15 uint8_t dev_id;
16 uint16_t qp_id;
17 uint8_t lcore_id;
18
19 struct rte_mempool *pool;
20
21 struct rte_cryptodev_sym_session *sess;
22
23 cperf_populate_ops_t populate_ops;
24
25 uint32_t src_buf_offset;
26 uint32_t dst_buf_offset;
27
28 const struct cperf_options *options;
29 const struct cperf_test_vector *test_vector;
30 };
31
32 static void
33 cperf_throughput_test_free(struct cperf_throughput_ctx *ctx)
34 {
35 if (ctx) {
36 if (ctx->sess) {
37 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
38 rte_cryptodev_sym_session_free(ctx->sess);
39 }
40
41 if (ctx->pool)
42 rte_mempool_free(ctx->pool);
43
44 rte_free(ctx);
45 }
46 }
47
48 void *
49 cperf_throughput_test_constructor(struct rte_mempool *sess_mp,
50 uint8_t dev_id, uint16_t qp_id,
51 const struct cperf_options *options,
52 const struct cperf_test_vector *test_vector,
53 const struct cperf_op_fns *op_fns)
54 {
55 struct cperf_throughput_ctx *ctx = NULL;
56
57 ctx = rte_malloc(NULL, sizeof(struct cperf_throughput_ctx), 0);
58 if (ctx == NULL)
59 goto err;
60
61 ctx->dev_id = dev_id;
62 ctx->qp_id = qp_id;
63
64 ctx->populate_ops = op_fns->populate_ops;
65 ctx->options = options;
66 ctx->test_vector = test_vector;
67
68 /* IV goes at the end of the crypto operation */
69 uint16_t iv_offset = sizeof(struct rte_crypto_op) +
70 sizeof(struct rte_crypto_sym_op);
71
72 ctx->sess = op_fns->sess_create(sess_mp, dev_id, options, test_vector,
73 iv_offset);
74 if (ctx->sess == NULL)
75 goto err;
76
77 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
78 &ctx->src_buf_offset, &ctx->dst_buf_offset,
79 &ctx->pool) < 0)
80 goto err;
81
82 return ctx;
83 err:
84 cperf_throughput_test_free(ctx);
85
86 return NULL;
87 }
88
89 int
90 cperf_throughput_test_runner(void *test_ctx)
91 {
92 struct cperf_throughput_ctx *ctx = test_ctx;
93 uint16_t test_burst_size;
94 uint8_t burst_size_idx = 0;
95 uint32_t imix_idx = 0;
96
97 static int only_once;
98
99 struct rte_crypto_op *ops[ctx->options->max_burst_size];
100 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
101 uint64_t i;
102
103 uint32_t lcore = rte_lcore_id();
104
105 #ifdef CPERF_LINEARIZATION_ENABLE
106 struct rte_cryptodev_info dev_info;
107 int linearize = 0;
108
109 /* Check if source mbufs require coalescing */
110 if (ctx->options->segment_sz < ctx->options->max_buffer_size) {
111 rte_cryptodev_info_get(ctx->dev_id, &dev_info);
112 if ((dev_info.feature_flags &
113 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0)
114 linearize = 1;
115 }
116 #endif /* CPERF_LINEARIZATION_ENABLE */
117
118 ctx->lcore_id = lcore;
119
120 /* Warm up the host CPU before starting the test */
121 for (i = 0; i < ctx->options->total_ops; i++)
122 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
123
124 /* Get first size from range or list */
125 if (ctx->options->inc_burst_size != 0)
126 test_burst_size = ctx->options->min_burst_size;
127 else
128 test_burst_size = ctx->options->burst_size_list[0];
129
130 uint16_t iv_offset = sizeof(struct rte_crypto_op) +
131 sizeof(struct rte_crypto_sym_op);
132
133 while (test_burst_size <= ctx->options->max_burst_size) {
134 uint64_t ops_enqd = 0, ops_enqd_total = 0, ops_enqd_failed = 0;
135 uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;
136
137 uint64_t tsc_start, tsc_end, tsc_duration;
138
139 uint16_t ops_unused = 0;
140
141 tsc_start = rte_rdtsc_precise();
142
143 while (ops_enqd_total < ctx->options->total_ops) {
144
145 uint16_t burst_size = ((ops_enqd_total + test_burst_size)
146 <= ctx->options->total_ops) ?
147 test_burst_size :
148 ctx->options->total_ops -
149 ops_enqd_total;
150
151 uint16_t ops_needed = burst_size - ops_unused;
152
153 /* Allocate objects containing crypto operations and mbufs */
154 if (rte_mempool_get_bulk(ctx->pool, (void **)ops,
155 ops_needed) != 0) {
156 RTE_LOG(ERR, USER1,
157 "Failed to allocate more crypto operations "
158 "from the crypto operation pool.\n"
159 "Consider increasing the pool size "
160 "with --pool-sz\n");
161 return -1;
162 }
163
164 /* Setup crypto op, attach mbuf etc */
165 (ctx->populate_ops)(ops, ctx->src_buf_offset,
166 ctx->dst_buf_offset,
167 ops_needed, ctx->sess,
168 ctx->options, ctx->test_vector,
169 iv_offset, &imix_idx);
170
171 /**
172 * When ops_needed is smaller than ops_enqd, the
173 * unused ops need to be moved to the front for
174 * next round use.
175 */
176 if (unlikely(ops_enqd > ops_needed)) {
177 size_t nb_b_to_mov = ops_unused * sizeof(
178 struct rte_crypto_op *);
179
180 memmove(&ops[ops_needed], &ops[ops_enqd],
181 nb_b_to_mov);
182 }
183
184 #ifdef CPERF_LINEARIZATION_ENABLE
185 if (linearize) {
186 /* PMD doesn't support scatter-gather and source buffer
187 * is segmented.
188 * We need to linearize it before enqueuing.
189 */
190 for (i = 0; i < burst_size; i++)
191 rte_pktmbuf_linearize(ops[i]->sym->m_src);
192 }
193 #endif /* CPERF_LINEARIZATION_ENABLE */
194
195 /* Enqueue burst of ops on crypto device */
196 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id,
197 ops, burst_size);
198 if (ops_enqd < burst_size)
199 ops_enqd_failed++;
200
201 /**
202 * Calculate number of ops not enqueued (mainly for hw
203 * accelerators whose ingress queue can fill up).
204 */
205 ops_unused = burst_size - ops_enqd;
206 ops_enqd_total += ops_enqd;
207
208
209 /* Dequeue processed burst of ops from crypto device */
210 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
211 ops_processed, test_burst_size);
212
213 if (likely(ops_deqd)) {
214 /* Free crypto ops so they can be reused. */
215 rte_mempool_put_bulk(ctx->pool,
216 (void **)ops_processed, ops_deqd);
217
218 ops_deqd_total += ops_deqd;
219 } else {
220 /**
221 * Count dequeue polls which didn't return any
222 * processed operations. This statistic is mainly
223 * relevant to hw accelerators.
224 */
225 ops_deqd_failed++;
226 }
227
228 }
229
230 /* Dequeue any operations still in the crypto device */
231
232 while (ops_deqd_total < ctx->options->total_ops) {
233 /* Sending 0 length burst to flush sw crypto device */
234 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
235
236 /* dequeue burst */
237 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
238 ops_processed, test_burst_size);
239 if (ops_deqd == 0)
240 ops_deqd_failed++;
241 else {
242 rte_mempool_put_bulk(ctx->pool,
243 (void **)ops_processed, ops_deqd);
244 ops_deqd_total += ops_deqd;
245 }
246 }
247
248 tsc_end = rte_rdtsc_precise();
249 tsc_duration = (tsc_end - tsc_start);
250
251 /* Calculate average operations processed per second */
252 double ops_per_second = ((double)ctx->options->total_ops /
253 tsc_duration) * rte_get_tsc_hz();
254
255 /* Calculate average throughput (Gbps) in bits per second */
256 double throughput_gbps = ((ops_per_second *
257 ctx->options->test_buffer_size * 8) / 1000000000);
258
259 /* Calculate average cycles per packet */
260 double cycles_per_packet = ((double)tsc_duration /
261 ctx->options->total_ops);
262
263 if (!ctx->options->csv) {
264 if (!only_once)
265 printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
266 "lcore id", "Buf Size", "Burst Size",
267 "Enqueued", "Dequeued", "Failed Enq",
268 "Failed Deq", "MOps", "Gbps",
269 "Cycles/Buf");
270 only_once = 1;
271
272 printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64
273 "%12"PRIu64"%12.4f%12.4f%12.2f\n",
274 ctx->lcore_id,
275 ctx->options->test_buffer_size,
276 test_burst_size,
277 ops_enqd_total,
278 ops_deqd_total,
279 ops_enqd_failed,
280 ops_deqd_failed,
281 ops_per_second/1000000,
282 throughput_gbps,
283 cycles_per_packet);
284 } else {
285 if (!only_once)
286 printf("#lcore id,Buffer Size(B),"
287 "Burst Size,Enqueued,Dequeued,Failed Enq,"
288 "Failed Deq,Ops(Millions),Throughput(Gbps),"
289 "Cycles/Buf\n\n");
290 only_once = 1;
291
292 printf("%u;%u;%u;%"PRIu64";%"PRIu64";%"PRIu64";%"PRIu64";"
293 "%.3f;%.3f;%.3f\n",
294 ctx->lcore_id,
295 ctx->options->test_buffer_size,
296 test_burst_size,
297 ops_enqd_total,
298 ops_deqd_total,
299 ops_enqd_failed,
300 ops_deqd_failed,
301 ops_per_second/1000000,
302 throughput_gbps,
303 cycles_per_packet);
304 }
305
306 /* Get next size from range or list */
307 if (ctx->options->inc_burst_size != 0)
308 test_burst_size += ctx->options->inc_burst_size;
309 else {
310 if (++burst_size_idx == ctx->options->burst_size_count)
311 break;
312 test_burst_size = ctx->options->burst_size_list[burst_size_idx];
313 }
314
315 }
316
317 return 0;
318 }
319
320
321 void
322 cperf_throughput_test_destructor(void *arg)
323 {
324 struct cperf_throughput_ctx *ctx = arg;
325
326 if (ctx == NULL)
327 return;
328
329 cperf_throughput_test_free(ctx);
330 }