ceph/src/spdk/dpdk/config/arm/meson.build

   1 # SPDX-License-Identifier: BSD-3-Clause
   2 # Copyright(c) 2017 Intel Corporation.
   3 # Copyright(c) 2017 Cavium, Inc
   4
   5 # for checking defines we need to use the correct compiler flags
   6 march_opt = '-march=@0@'.format(machine)
   7
   8 arm_force_native_march = false
   9
  10 machine_args_generic = [
  11         ['default', ['-march=armv8-a+crc+crypto']],
  12         ['native', ['-march=native']],
  13         ['0xd03', ['-mcpu=cortex-a53']],
  14         ['0xd04', ['-mcpu=cortex-a35']],
  15         ['0xd07', ['-mcpu=cortex-a57']],
  16         ['0xd08', ['-mcpu=cortex-a72']],
  17         ['0xd09', ['-mcpu=cortex-a73']],
  18         ['0xd0a', ['-mcpu=cortex-a75']],
  19 ]
  20 machine_args_cavium = [
  21         ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
  22         ['native', ['-march=native']],
  23         ['0xa1', ['-mcpu=thunderxt88']],
  24         ['0xa2', ['-mcpu=thunderxt81']],
  25         ['0xa3', ['-mcpu=thunderxt83']]]
  26
  27 flags_common_default = [
  28         # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
  29         # to determine the best threshold in code. Refer to notes in source file
  30         # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
  31         ['RTE_ARCH_ARM64_MEMCPY', false],
  32         #       ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
  33         #       ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
  34         # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
  35         # strong reasons.
  36         #       ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
  37         #       ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
  38         #       ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
  39
  40         ['RTE_LIBRTE_FM10K_PMD', false],
  41         ['RTE_LIBRTE_SFC_EFX_PMD', false],
  42         ['RTE_LIBRTE_AVP_PMD', false],
  43
  44         ['RTE_SCHED_VECTOR', false],
  45 ]
  46
  47 flags_generic = [
  48         ['RTE_MACHINE', '"armv8a"'],
  49         ['RTE_CACHE_LINE_SIZE', 128]]
  50 flags_cavium = [
  51         ['RTE_MACHINE', '"thunderx"'],
  52         ['RTE_CACHE_LINE_SIZE', 128],
  53         ['RTE_MAX_NUMA_NODES', 2],
  54         ['RTE_MAX_LCORE', 96],
  55         ['RTE_MAX_VFIO_GROUPS', 128],
  56         ['RTE_RING_USE_C11_MEM_MODEL', false]]
  57 flags_dpaa = [
  58         ['RTE_MACHINE', '"dpaa"'],
  59         ['RTE_CACHE_LINE_SIZE', 64],
  60         ['RTE_MAX_NUMA_NODES', 1],
  61         ['RTE_MAX_LCORE', 16]]
  62 flags_dpaa2 = [
  63         ['RTE_MACHINE', '"dpaa2"'],
  64         ['RTE_CACHE_LINE_SIZE', 64],
  65         ['RTE_MAX_NUMA_NODES', 1],
  66         ['RTE_MAX_LCORE', 16],
  67         ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
  68
  69 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
  70 impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
  71 impl_0x41 = ['Arm', flags_generic, machine_args_generic]
  72 impl_0x42 = ['Broadcom', flags_generic, machine_args_generic]
  73 impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
  74 impl_0x44 = ['DEC', flags_generic, machine_args_generic]
  75 impl_0x49 = ['Infineon', flags_generic, machine_args_generic]
  76 impl_0x4d = ['Motorola', flags_generic, machine_args_generic]
  77 impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
  78 impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic]
  79 impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
  80 impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
  81 impl_0x56 = ['Marvell', flags_generic, machine_args_generic]
  82 impl_0x69 = ['Intel', flags_generic, machine_args_generic]
  83 impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
  84 impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic]
  85
  86 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
  87
  88 if cc.sizeof('void *') != 8
  89         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
  90         dpdk_conf.set('RTE_ARCH_ARM', 1)
  91         dpdk_conf.set('RTE_ARCH_ARMv7', 1)
  92 else
  93         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
  94         dpdk_conf.set('RTE_ARCH_ARM64', 1)
  95         dpdk_conf.set('RTE_ARCH_64', 1)
  96
  97         machine = []
  98         cmd_generic = ['generic', '', '', 'default', '']
  99         cmd_output = cmd_generic # Set generic by default
 100         machine_args = [] # Clear previous machine args
 101         if not meson.is_cross_build()
 102                 # The script returns ['Implementer', 'Variant', 'Architecture',
 103                 # 'Primary Part number', 'Revision']
 104                 detect_vendor = find_program(join_paths(
 105                                 meson.current_source_dir(), 'armv8_machine.py'))
 106                 cmd = run_command(detect_vendor.path())
 107                 if cmd.returncode() == 0
 108                         cmd_output = cmd.stdout().to_lower().strip().split(' ')
 109                 endif
 110                 # Set to generic if variable is not found
 111                 machine = get_variable('impl_' + cmd_output[0], 'generic')
 112                 if machine == 'generic'
 113                         machine = impl_generic
 114                         cmd_output = cmd_generic
 115                 endif
 116                 impl_pn = cmd_output[3]
 117                 if arm_force_native_march == true
 118                         impl_pn = 'native'
 119                 endif
 120         else
 121                 impl_id = meson.get_cross_property('implementor_id', 'generic')
 122                 impl_pn = meson.get_cross_property('implementor_pn', 'default')
 123                 machine = get_variable('impl_' + impl_id)
 124         endif
 125
 126         # Apply Common Defaults. These settings may be overwritten by machine
 127         # settings later.
 128         foreach flag: flags_common_default
 129                 if flag.length() > 0
 130                         dpdk_conf.set(flag[0], flag[1])
 131                 endif
 132         endforeach
 133
 134         message('Implementer : ' + machine[0])
 135         foreach flag: machine[1]
 136                 if flag.length() > 0
 137                         dpdk_conf.set(flag[0], flag[1])
 138                 endif
 139         endforeach
 140         # Primary part number based mcpu flags are supported
 141         # for gcc versions > 7
 142         if cc.version().version_compare(
 143                         '<7.0') or cmd_output.length() == 0
 144                 if not meson.is_cross_build() and arm_force_native_march == true
 145                         impl_pn = 'native'
 146                 else
 147                         impl_pn = 'default'
 148                 endif
 149         endif
 150         foreach marg: machine[2]
 151                 if marg[0] == impl_pn
 152                         foreach f: marg[1]
 153                                 machine_args += f
 154                         endforeach
 155                 endif
 156         endforeach
 157 endif
 158 message(machine_args)
 159
 160 if cc.get_define('__ARM_NEON', args: machine_args) != ''
 161         dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
 162         compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
 163 endif
 164
 165 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
 166         dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
 167         compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
 168 endif
 169
 170 if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
 171         dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
 172         dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
 173         dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
 174         dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
 175         compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
 176         'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
 177 endif