ceph/src/spdk/dpdk/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016-2019 NXP
   5  *
   6  */
   7
   8 #ifndef _DPAA2_HW_DPIO_H_
   9 #define _DPAA2_HW_DPIO_H_
  10
  11 #include <mc/fsl_dpio.h>
  12 #include <mc/fsl_mc_sys.h>
  13
  14 struct dpaa2_io_portal_t {
  15         struct dpaa2_dpio_dev *dpio_dev;
  16         struct dpaa2_dpio_dev *ethrx_dpio_dev;
  17         uint64_t net_tid;
  18         uint64_t sec_tid;
  19         void *eventdev;
  20 };
  21
  22 /*! Global per thread DPIO portal */
  23 RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);
  24
  25 #define DPAA2_PER_LCORE_DPIO RTE_PER_LCORE(_dpaa2_io).dpio_dev
  26 #define DPAA2_PER_LCORE_PORTAL DPAA2_PER_LCORE_DPIO->sw_portal
  27
  28 #define DPAA2_PER_LCORE_ETHRX_DPIO RTE_PER_LCORE(_dpaa2_io).ethrx_dpio_dev
  29 #define DPAA2_PER_LCORE_ETHRX_PORTAL DPAA2_PER_LCORE_ETHRX_DPIO->sw_portal
  30
  31 /* Variable to store DPAA2 DQRR size */
  32 extern uint8_t dpaa2_dqrr_size;
  33 /* Variable to store DPAA2 EQCR size */
  34 extern uint8_t dpaa2_eqcr_size;
  35
  36 extern struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
  37
  38 /* Affine a DPIO portal to current processing thread */
  39 __rte_internal
  40 int dpaa2_affine_qbman_swp(void);
  41
  42 /* Affine additional DPIO portal to current crypto processing thread */
  43 __rte_internal
  44 int dpaa2_affine_qbman_ethrx_swp(void);
  45
  46 /* allocate memory for FQ - dq storage */
  47 __rte_internal
  48 int
  49 dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage);
  50
  51 /* free memory for FQ- dq storage */
  52 __rte_internal
  53 void
  54 dpaa2_free_dq_storage(struct queue_storage_info_t *q_storage);
  55
  56 /* free the enqueue response descriptors */
  57 __rte_internal
  58 uint32_t
  59 dpaa2_free_eq_descriptors(void);
  60
  61 #endif /* _DPAA2_HW_DPIO_H_ */