ceph/src/spdk/dpdk/drivers/bus/fslmc/qbman/qbman_portal.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
   4  *
   5  */
   6
   7 #include "qbman_sys.h"
   8 #include <fsl_qbman_portal.h>
   9
  10 #define QMAN_REV_4000   0x04000000
  11 #define QMAN_REV_4100   0x04010000
  12 #define QMAN_REV_4101   0x04010001
  13
  14 /* All QBMan command and result structures use this "valid bit" encoding */
  15 #define QB_VALID_BIT ((uint32_t)0x80)
  16
  17 /* Management command result codes */
  18 #define QBMAN_MC_RSLT_OK      0xf0
  19
  20 /* QBMan DQRR size is set at runtime in qbman_portal.c */
  21
  22 #define QBMAN_EQCR_SIZE 8
  23
  24 static inline uint8_t qm_cyc_diff(uint8_t ringsize, uint8_t first,
  25                                   uint8_t last)
  26 {
  27         /* 'first' is included, 'last' is excluded */
  28         if (first <= last)
  29                 return last - first;
  30         return (2 * ringsize) + last - first;
  31 }
  32
  33 /* --------------------- */
  34 /* portal data structure */
  35 /* --------------------- */
  36
  37 struct qbman_swp {
  38         struct qbman_swp_desc desc;
  39         /* The qbman_sys (ie. arch/OS-specific) support code can put anything it
  40          * needs in here.
  41          */
  42         struct qbman_swp_sys sys;
  43         /* Management commands */
  44         struct {
  45 #ifdef QBMAN_CHECKING
  46                 enum swp_mc_check {
  47                         swp_mc_can_start, /* call __qbman_swp_mc_start() */
  48                         swp_mc_can_submit, /* call __qbman_swp_mc_submit() */
  49                         swp_mc_can_poll, /* call __qbman_swp_mc_result() */
  50                 } check;
  51 #endif
  52                 uint32_t valid_bit; /* 0x00 or 0x80 */
  53         } mc;
  54         /* Push dequeues */
  55         uint32_t sdq;
  56         /* Volatile dequeues */
  57         struct {
  58                 /* VDQCR supports a "1 deep pipeline", meaning that if you know
  59                  * the last-submitted command is already executing in the
  60                  * hardware (as evidenced by at least 1 valid dequeue result),
  61                  * you can write another dequeue command to the register, the
  62                  * hardware will start executing it as soon as the
  63                  * already-executing command terminates. (This minimises latency
  64                  * and stalls.) With that in mind, this "busy" variable refers
  65                  * to whether or not a command can be submitted, not whether or
  66                  * not a previously-submitted command is still executing. In
  67                  * other words, once proof is seen that the previously-submitted
  68                  * command is executing, "vdq" is no longer "busy".
  69                  */
  70                 atomic_t busy;
  71                 uint32_t valid_bit; /* 0x00 or 0x80 */
  72                 /* We need to determine when vdq is no longer busy. This depends
  73                  * on whether the "busy" (last-submitted) dequeue command is
  74                  * targeting DQRR or main-memory, and detected is based on the
  75                  * presence of the dequeue command's "token" showing up in
  76                  * dequeue entries in DQRR or main-memory (respectively).
  77                  */
  78                 struct qbman_result *storage; /* NULL if DQRR */
  79         } vdq;
  80         /* DQRR */
  81         struct {
  82                 uint32_t next_idx;
  83                 uint32_t valid_bit;
  84                 uint8_t dqrr_size;
  85                 int reset_bug;
  86         } dqrr;
  87         struct {
  88                 uint32_t pi;
  89                 uint32_t pi_vb;
  90                 uint32_t ci;
  91                 int available;
  92         } eqcr;
  93 };
  94
  95 /* -------------------------- */
  96 /* portal management commands */
  97 /* -------------------------- */
  98
  99 /* Different management commands all use this common base layer of code to issue
 100  * commands and poll for results. The first function returns a pointer to where
 101  * the caller should fill in their MC command (though they should ignore the
 102  * verb byte), the second function commits merges in the caller-supplied command
 103  * verb (which should not include the valid-bit) and submits the command to
 104  * hardware, and the third function checks for a completed response (returns
 105  * non-NULL if only if the response is complete).
 106  */
 107 void *qbman_swp_mc_start(struct qbman_swp *p);
 108 void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb);
 109 void *qbman_swp_mc_result(struct qbman_swp *p);
 110
 111 /* Wraps up submit + poll-for-result */
 112 static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
 113                                           uint8_t cmd_verb)
 114 {
 115         int loopvar = 1000;
 116
 117         qbman_swp_mc_submit(swp, cmd, cmd_verb);
 118         do {
 119                 cmd = qbman_swp_mc_result(swp);
 120         } while (!cmd && loopvar--);
 121         QBMAN_BUG_ON(!loopvar);
 122
 123         return cmd;
 124 }
 125
 126 /* ---------------------- */
 127 /* Descriptors/cachelines */
 128 /* ---------------------- */
 129
 130 /* To avoid needless dynamic allocation, the driver API often gives the caller
 131  * a "descriptor" type that the caller can instantiate however they like.
 132  * Ultimately though, it is just a cacheline of binary storage (or something
 133  * smaller when it is known that the descriptor doesn't need all 64 bytes) for
 134  * holding pre-formatted pieces of hardware commands. The performance-critical
 135  * code can then copy these descriptors directly into hardware command
 136  * registers more efficiently than trying to construct/format commands
 137  * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
 138  * order for the compiler to know its size, but the internal details are not
 139  * exposed. The following macro is used within the driver for converting *any*
 140  * descriptor pointer to a usable array pointer. The use of a macro (instead of
 141  * an inline) is necessary to work with different descriptor types and to work
 142  * correctly with const and non-const inputs (and similarly-qualified outputs).
 143  */
 144 #define qb_cl(d) (&(d)->donot_manipulate_directly[0])