ceph/src/spdk/dpdk/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2016-2017 Intel Corporation
   3  */
   4
   5 #ifndef _RTE_AESNI_GCM_PMD_PRIVATE_H_
   6 #define _RTE_AESNI_GCM_PMD_PRIVATE_H_
   7
   8 #include "aesni_gcm_ops.h"
   9
  10 /*
  11  * IMB_VERSION_NUM macro was introduced in version Multi-buffer 0.50,
  12  * so if macro is not defined, it means that the version is 0.49.
  13  */
  14 #if !defined(IMB_VERSION_NUM)
  15 #define IMB_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
  16 #define IMB_VERSION_NUM IMB_VERSION(0, 49, 0)
  17 #endif
  18
  19 #define CRYPTODEV_NAME_AESNI_GCM_PMD    crypto_aesni_gcm
  20 /**< AES-NI GCM PMD device name */
  21
  22 /** AES-NI GCM PMD  LOGTYPE DRIVER */
  23 int aesni_gcm_logtype_driver;
  24 #define AESNI_GCM_LOG(level, fmt, ...) \
  25         rte_log(RTE_LOG_ ## level, aesni_gcm_logtype_driver,    \
  26                         "%s() line %u: "fmt "\n", __func__, __LINE__,   \
  27                                         ## __VA_ARGS__)
  28
  29 /* Maximum length for digest */
  30 #define DIGEST_LENGTH_MAX 16
  31
  32 /** private data structure for each virtual AESNI GCM device */
  33 struct aesni_gcm_private {
  34         enum aesni_gcm_vector_mode vector_mode;
  35         /**< Vector mode */
  36         unsigned max_nb_queue_pairs;
  37         /**< Max number of queue pairs supported by device */
  38 };
  39
  40 struct aesni_gcm_qp {
  41         const struct aesni_gcm_ops *ops;
  42         /**< Architecture dependent function pointer table of the gcm APIs */
  43         struct rte_ring *processed_pkts;
  44         /**< Ring for placing process packets */
  45         struct gcm_context_data gdata_ctx; /* (16 * 5) + 8 = 88 B */
  46         /**< GCM parameters */
  47         struct rte_cryptodev_stats qp_stats; /* 8 * 4 = 32 B */
  48         /**< Queue pair statistics */
  49         struct rte_mempool *sess_mp;
  50         /**< Session Mempool */
  51         uint16_t id;
  52         /**< Queue Pair Identifier */
  53         char name[RTE_CRYPTODEV_NAME_MAX_LEN];
  54         /**< Unique Queue Pair Name */
  55         uint8_t temp_digest[DIGEST_LENGTH_MAX];
  56         /**< Buffer used to store the digest generated
  57          * by the driver when verifying a digest provided
  58          * by the user (using authentication verify operation)
  59          */
  60 } __rte_cache_aligned;
  61
  62
  63 enum aesni_gcm_operation {
  64         AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION,
  65         AESNI_GCM_OP_AUTHENTICATED_DECRYPTION,
  66         AESNI_GMAC_OP_GENERATE,
  67         AESNI_GMAC_OP_VERIFY
  68 };
  69
  70 /** AESNI GCM private session structure */
  71 struct aesni_gcm_session {
  72         struct {
  73                 uint16_t length;
  74                 uint16_t offset;
  75         } iv;
  76         /**< IV parameters */
  77         uint16_t aad_length;
  78         /**< AAD length */
  79         uint16_t digest_length;
  80         /**< Digest length */
  81         enum aesni_gcm_operation op;
  82         /**< GCM operation type */
  83         enum aesni_gcm_key key;
  84         /**< GCM key type */
  85         struct gcm_key_data gdata_key;
  86         /**< GCM parameters */
  87 };
  88
  89
  90 /**
  91  * Setup GCM session parameters
  92  * @param       sess    aesni gcm session structure
  93  * @param       xform   crypto transform chain
  94  *
  95  * @return
  96  * - On success returns 0
  97  * - On failure returns error code < 0
  98  */
  99 extern int
 100 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *ops,
 101                 struct aesni_gcm_session *sess,
 102                 const struct rte_crypto_sym_xform *xform);
 103
 104
 105 /**
 106  * Device specific operations function pointer structure */
 107 extern struct rte_cryptodev_ops *rte_aesni_gcm_pmd_ops;
 108
 109
 110 #endif /* _RTE_AESNI_GCM_PMD_PRIVATE_H_ */