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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
3 */
4
5 #ifndef _CCP_PMD_PRIVATE_H_
6 #define _CCP_PMD_PRIVATE_H_
7
8 #include <rte_cryptodev.h>
9 #include "ccp_crypto.h"
10
11 #define CRYPTODEV_NAME_CCP_PMD crypto_ccp
12
13 #define CCP_LOG_ERR(fmt, args...) \
14 RTE_LOG(ERR, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
15 RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
16 __func__, __LINE__, ## args)
17
18 #ifdef RTE_LIBRTE_CCP_DEBUG
19 #define CCP_LOG_INFO(fmt, args...) \
20 RTE_LOG(INFO, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
21 RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
22 __func__, __LINE__, ## args)
23
24 #define CCP_LOG_DBG(fmt, args...) \
25 RTE_LOG(DEBUG, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
26 RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
27 __func__, __LINE__, ## args)
28 #else
29 #define CCP_LOG_INFO(fmt, args...)
30 #define CCP_LOG_DBG(fmt, args...)
31 #endif
32
33 /**< Maximum queue pairs supported by CCP PMD */
34 #define CCP_PMD_MAX_QUEUE_PAIRS 1
35 #define CCP_NB_MAX_DESCRIPTORS 1024
36 #define CCP_MAX_BURST 64
37
38 #include "ccp_dev.h"
39
40 /* private data structure for each CCP crypto device */
41 struct ccp_private {
42 unsigned int max_nb_qpairs; /**< Max number of queue pairs */
43 uint8_t crypto_num_dev; /**< Number of working crypto devices */
44 bool auth_opt; /**< Authentication offload option */
45 struct ccp_device *last_dev; /**< Last working crypto device */
46 };
47
48 /* CCP batch info */
49 struct ccp_batch_info {
50 struct rte_crypto_op *op[CCP_MAX_BURST];
51 /**< optable populated at enque time from app*/
52 int op_idx;
53 struct ccp_queue *cmd_q;
54 uint16_t opcnt;
55 /**< no. of crypto ops in batch*/
56 int desccnt;
57 /**< no. of ccp queue descriptors*/
58 uint32_t head_offset;
59 /**< ccp queue head tail offsets time of enqueue*/
60 uint32_t tail_offset;
61 uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST];
62 phys_addr_t lsb_buf_phys;
63 /**< LSB intermediate buf for passthru */
64 int lsb_buf_idx;
65 uint16_t auth_ctr;
66 /**< auth only ops batch for CPU based auth */
67 } __rte_cache_aligned;
68
69 /**< CCP crypto queue pair */
70 struct ccp_qp {
71 uint16_t id;
72 /**< Queue Pair Identifier */
73 char name[RTE_CRYPTODEV_NAME_MAX_LEN];
74 /**< Unique Queue Pair Name */
75 struct rte_ring *processed_pkts;
76 /**< Ring for placing process packets */
77 struct rte_mempool *sess_mp;
78 /**< Session Mempool */
79 struct rte_mempool *sess_mp_priv;
80 /**< Session Private Data Mempool */
81 struct rte_mempool *batch_mp;
82 /**< Session Mempool for batch info */
83 struct rte_cryptodev_stats qp_stats;
84 /**< Queue pair statistics */
85 struct ccp_batch_info *b_info;
86 /**< Store ops pulled out of queue */
87 struct rte_cryptodev *dev;
88 /**< rte crypto device to which this qp belongs */
89 uint8_t temp_digest[DIGEST_LENGTH_MAX];
90 /**< Buffer used to store the digest generated
91 * by the driver when verifying a digest provided
92 * by the user (using authentication verify operation)
93 */
94 } __rte_cache_aligned;
95
96
97 /**< device specific operations function pointer structure */
98 extern struct rte_cryptodev_ops *ccp_pmd_ops;
99
100 uint16_t
101 ccp_cpu_pmd_enqueue_burst(void *queue_pair,
102 struct rte_crypto_op **ops,
103 uint16_t nb_ops);
104 uint16_t
105 ccp_cpu_pmd_dequeue_burst(void *queue_pair,
106 struct rte_crypto_op **ops,
107 uint16_t nb_ops);
108
109 #endif /* _CCP_PMD_PRIVATE_H_ */