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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Marvell International Ltd.
3 * Copyright(c) 2017 Semihalf.
4 * All rights reserved.
5 */
6
7 #include <string.h>
8
9 #include <rte_common.h>
10 #include <rte_malloc.h>
11 #include <rte_cryptodev_pmd.h>
12
13 #include "rte_mrvl_pmd_private.h"
14
15 /**
16 * Capabilities list to be used in reporting to DPDK.
17 */
18 static const struct rte_cryptodev_capabilities
19 mrvl_crypto_pmd_capabilities[] = {
20 { /* MD5 HMAC */
21 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
22 {.sym = {
23 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
24 {.auth = {
25 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
26 .block_size = 64,
27 .key_size = {
28 .min = 1,
29 .max = 64,
30 .increment = 1
31 },
32 .digest_size = {
33 .min = 16,
34 .max = 16,
35 .increment = 0
36 },
37 }, }
38 }, }
39 },
40 { /* MD5 */
41 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
42 {.sym = {
43 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
44 {.auth = {
45 .algo = RTE_CRYPTO_AUTH_MD5,
46 .block_size = 64,
47 .key_size = {
48 .min = 0,
49 .max = 0,
50 .increment = 0
51 },
52 .digest_size = {
53 .min = 16,
54 .max = 16,
55 .increment = 0
56 },
57 }, }
58 }, }
59 },
60 { /* SHA1 HMAC */
61 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
62 {.sym = {
63 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
64 {.auth = {
65 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
66 .block_size = 64,
67 .key_size = {
68 .min = 1,
69 .max = 64,
70 .increment = 1
71 },
72 .digest_size = {
73 .min = 20,
74 .max = 20,
75 .increment = 0
76 },
77 }, }
78 }, }
79 },
80 { /* SHA1 */
81 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
82 {.sym = {
83 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
84 {.auth = {
85 .algo = RTE_CRYPTO_AUTH_SHA1,
86 .block_size = 64,
87 .key_size = {
88 .min = 0,
89 .max = 0,
90 .increment = 0
91 },
92 .digest_size = {
93 .min = 20,
94 .max = 20,
95 .increment = 0
96 },
97 }, }
98 }, }
99 },
100 { /* SHA224 */
101 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
102 {.sym = {
103 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
104 {.auth = {
105 .algo = RTE_CRYPTO_AUTH_SHA224,
106 .block_size = 64,
107 .key_size = {
108 .min = 0,
109 .max = 0,
110 .increment = 0
111 },
112 .digest_size = {
113 .min = 28,
114 .max = 28,
115 .increment = 0
116 },
117 }, }
118 }, }
119 },
120 { /* SHA256 HMAC */
121 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
122 {.sym = {
123 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
124 {.auth = {
125 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
126 .block_size = 64,
127 .key_size = {
128 .min = 1,
129 .max = 64,
130 .increment = 1
131 },
132 .digest_size = {
133 .min = 32,
134 .max = 32,
135 .increment = 0
136 },
137 }, }
138 }, }
139 },
140 { /* SHA256 */
141 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
142 {.sym = {
143 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
144 {.auth = {
145 .algo = RTE_CRYPTO_AUTH_SHA256,
146 .block_size = 64,
147 .key_size = {
148 .min = 0,
149 .max = 0,
150 .increment = 0
151 },
152 .digest_size = {
153 .min = 32,
154 .max = 32,
155 .increment = 0
156 },
157 }, }
158 }, }
159 },
160 { /* SHA384 HMAC */
161 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
162 {.sym = {
163 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
164 {.auth = {
165 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
166 .block_size = 128,
167 .key_size = {
168 .min = 1,
169 .max = 128,
170 .increment = 1
171 },
172 .digest_size = {
173 .min = 48,
174 .max = 48,
175 .increment = 0
176 },
177 }, }
178 }, }
179 },
180 { /* SHA384 */
181 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
182 {.sym = {
183 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
184 {.auth = {
185 .algo = RTE_CRYPTO_AUTH_SHA384,
186 .block_size = 128,
187 .key_size = {
188 .min = 0,
189 .max = 0,
190 .increment = 0
191 },
192 .digest_size = {
193 .min = 48,
194 .max = 48,
195 .increment = 0
196 },
197 }, }
198 }, }
199 },
200 { /* SHA512 HMAC */
201 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
202 {.sym = {
203 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
204 {.auth = {
205 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
206 .block_size = 128,
207 .key_size = {
208 .min = 1,
209 .max = 128,
210 .increment = 1
211 },
212 .digest_size = {
213 .min = 64,
214 .max = 64,
215 .increment = 0
216 },
217 }, }
218 }, }
219 },
220 { /* SHA512 */
221 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
222 {.sym = {
223 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
224 {.auth = {
225 .algo = RTE_CRYPTO_AUTH_SHA512,
226 .block_size = 128,
227 .key_size = {
228 .min = 0,
229 .max = 0,
230 .increment = 0
231 },
232 .digest_size = {
233 .min = 64,
234 .max = 64,
235 .increment = 0
236 },
237 }, }
238 }, }
239 },
240 { /* AES CBC */
241 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
242 {.sym = {
243 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
244 {.cipher = {
245 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
246 .block_size = 16,
247 .key_size = {
248 .min = 16,
249 .max = 32,
250 .increment = 8
251 },
252 .iv_size = {
253 .min = 16,
254 .max = 16,
255 .increment = 0
256 }
257 }, }
258 }, }
259 },
260 { /* AES CTR */
261 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
262 {.sym = {
263 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
264 {.cipher = {
265 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
266 .block_size = 16,
267 .key_size = {
268 .min = 16,
269 .max = 32,
270 .increment = 8
271 },
272 .iv_size = {
273 .min = 16,
274 .max = 16,
275 .increment = 0
276 }
277 }, }
278 }, }
279 },
280 { /* AES GCM */
281 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
282 {.sym = {
283 .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
284 {.aead = {
285 .algo = RTE_CRYPTO_AEAD_AES_GCM,
286 .block_size = 16,
287 .key_size = {
288 .min = 16,
289 .max = 32,
290 .increment = 8
291 },
292 .digest_size = {
293 .min = 16,
294 .max = 16,
295 .increment = 0
296 },
297 .aad_size = {
298 .min = 8,
299 .max = 12,
300 .increment = 4
301 },
302 .iv_size = {
303 .min = 12,
304 .max = 16,
305 .increment = 4
306 }
307 }, }
308 }, }
309 },
310 { /* AES GMAC (AUTH) */
311 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
312 {.sym = {
313 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
314 {.auth = {
315 .algo = RTE_CRYPTO_AUTH_AES_GMAC,
316 .block_size = 16,
317 .key_size = {
318 .min = 16,
319 .max = 32,
320 .increment = 8
321 },
322 .digest_size = {
323 .min = 16,
324 .max = 16,
325 .increment = 0
326 },
327 .iv_size = {
328 .min = 8,
329 .max = 65532,
330 .increment = 4
331 }
332 }, }
333 }, }
334 },
335 { /* 3DES CBC */
336 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
337 {.sym = {
338 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
339 {.cipher = {
340 .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
341 .block_size = 8,
342 .key_size = {
343 .min = 24,
344 .max = 24,
345 .increment = 0
346 },
347 .iv_size = {
348 .min = 8,
349 .max = 8,
350 .increment = 0
351 }
352 }, }
353 }, }
354 },
355 { /* 3DES CTR */
356 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
357 {.sym = {
358 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
359 {.cipher = {
360 .algo = RTE_CRYPTO_CIPHER_3DES_CTR,
361 .block_size = 8,
362 .key_size = {
363 .min = 24,
364 .max = 24,
365 .increment = 0
366 },
367 .iv_size = {
368 .min = 8,
369 .max = 8,
370 .increment = 0
371 }
372 }, }
373 }, }
374 },
375
376 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
377 };
378
379
380 /**
381 * Configure device (PMD ops callback).
382 *
383 * @param dev Pointer to the device structure.
384 * @param config Pointer to configuration structure.
385 * @returns 0. Always.
386 */
387 static int
388 mrvl_crypto_pmd_config(__rte_unused struct rte_cryptodev *dev,
389 __rte_unused struct rte_cryptodev_config *config)
390 {
391 return 0;
392 }
393
394 /**
395 * Start device (PMD ops callback).
396 *
397 * @param dev Pointer to the device structure.
398 * @returns 0. Always.
399 */
400 static int
401 mrvl_crypto_pmd_start(__rte_unused struct rte_cryptodev *dev)
402 {
403 return 0;
404 }
405
406 /**
407 * Stop device (PMD ops callback).
408 *
409 * @param dev Pointer to the device structure.
410 * @returns 0. Always.
411 */
412 static void
413 mrvl_crypto_pmd_stop(__rte_unused struct rte_cryptodev *dev)
414 {
415 }
416
417 /**
418 * Get device statistics (PMD ops callback).
419 *
420 * @param dev Pointer to the device structure.
421 * @param stats Pointer to statistics structure [out].
422 */
423 static void
424 mrvl_crypto_pmd_stats_get(struct rte_cryptodev *dev,
425 struct rte_cryptodev_stats *stats)
426 {
427 int qp_id;
428
429 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
430 struct mrvl_crypto_qp *qp = dev->data->queue_pairs[qp_id];
431
432 stats->enqueued_count += qp->stats.enqueued_count;
433 stats->dequeued_count += qp->stats.dequeued_count;
434
435 stats->enqueue_err_count += qp->stats.enqueue_err_count;
436 stats->dequeue_err_count += qp->stats.dequeue_err_count;
437 }
438 }
439
440 /**
441 * Reset device statistics (PMD ops callback).
442 *
443 * @param dev Pointer to the device structure.
444 */
445 static void
446 mrvl_crypto_pmd_stats_reset(struct rte_cryptodev *dev)
447 {
448 int qp_id;
449
450 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
451 struct mrvl_crypto_qp *qp = dev->data->queue_pairs[qp_id];
452
453 memset(&qp->stats, 0, sizeof(qp->stats));
454 }
455 }
456
457 /**
458 * Get device info (PMD ops callback).
459 *
460 * @param dev Pointer to the device structure.
461 * @param dev_info Pointer to the device info structure [out].
462 */
463 static void
464 mrvl_crypto_pmd_info_get(struct rte_cryptodev *dev,
465 struct rte_cryptodev_info *dev_info)
466 {
467 struct mrvl_crypto_private *internals = dev->data->dev_private;
468
469 if (dev_info != NULL) {
470 dev_info->driver_id = dev->driver_id;
471 dev_info->feature_flags = dev->feature_flags;
472 dev_info->capabilities = mrvl_crypto_pmd_capabilities;
473 dev_info->max_nb_queue_pairs = internals->max_nb_qpairs;
474 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
475 }
476 }
477
478 /**
479 * Release queue pair (PMD ops callback).
480 *
481 * @param dev Pointer to the device structure.
482 * @param qp_id ID of Queue Pair to release.
483 * @returns 0. Always.
484 */
485 static int
486 mrvl_crypto_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
487 {
488 struct mrvl_crypto_qp *qp =
489 (struct mrvl_crypto_qp *)dev->data->queue_pairs[qp_id];
490
491 if (dev->data->queue_pairs[qp_id] != NULL) {
492 sam_cio_flush(qp->cio);
493 sam_cio_deinit(qp->cio);
494 rte_free(dev->data->queue_pairs[qp_id]);
495 dev->data->queue_pairs[qp_id] = NULL;
496 }
497
498 return 0;
499 }
500
501 /**
502 * Close device (PMD ops callback).
503 *
504 * @param dev Pointer to the device structure.
505 * @returns 0. Always.
506 */
507 static int
508 mrvl_crypto_pmd_close(struct rte_cryptodev *dev)
509 {
510 int qp_id;
511
512 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++)
513 mrvl_crypto_pmd_qp_release(dev, qp_id);
514
515 return 0;
516 }
517
518 /**
519 * Setup a queue pair (PMD ops callback).
520 *
521 * @param dev Pointer to the device structure.
522 * @param qp_id ID of the Queue Pair.
523 * @param qp_conf Queue pair configuration (nb of descriptors).
524 * @param socket_id NUMA socket to allocate memory on.
525 * @returns 0 upon success, negative value otherwise.
526 */
527 static int
528 mrvl_crypto_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
529 const struct rte_cryptodev_qp_conf *qp_conf,
530 int socket_id, struct rte_mempool *session_pool)
531 {
532 struct mrvl_crypto_qp *qp = NULL;
533 char match[RTE_CRYPTODEV_NAME_MAX_LEN];
534 unsigned int n;
535
536 /* Allocate the queue pair data structure. */
537 qp = rte_zmalloc_socket("MRVL Crypto PMD Queue Pair", sizeof(*qp),
538 RTE_CACHE_LINE_SIZE, socket_id);
539 if (qp == NULL)
540 return -ENOMEM;
541
542 /* Free old qp prior setup if needed. */
543 if (dev->data->queue_pairs[qp_id] != NULL)
544 mrvl_crypto_pmd_qp_release(dev, qp_id);
545
546 do { /* Error handling block */
547
548 /*
549 * This extra check is necessary due to a bug in
550 * crypto library.
551 */
552 int num = sam_get_num_inst();
553 if (num == 0) {
554 MRVL_CRYPTO_LOG_ERR("No crypto engines detected.\n");
555 return -1;
556 }
557
558 /*
559 * In case two crypto engines are enabled qps will
560 * be evenly spread among them. Even and odd qps will
561 * be handled by cio-0 and cio-1 respectively. qp-cio mapping
562 * will look as follows:
563 *
564 * qp: 0 1 2 3
565 * cio-x:y: cio-0:0, cio-1:0, cio-0:1, cio-1:1
566 *
567 * qp: 4 5 6 7
568 * cio-x:y: cio-0:2, cio-1:2, cio-0:3, cio-1:3
569 *
570 * In case just one engine is enabled mapping will look as
571 * follows:
572 * qp: 0 1 2 3
573 * cio-x:y: cio-0:0, cio-0:1, cio-0:2, cio-0:3
574 */
575 n = snprintf(match, sizeof(match), "cio-%u:%u",
576 qp_id % num, qp_id / num);
577
578 if (n >= sizeof(match))
579 break;
580
581 qp->cio_params.match = match;
582 qp->cio_params.size = qp_conf->nb_descriptors;
583
584 if (sam_cio_init(&qp->cio_params, &qp->cio) < 0)
585 break;
586
587 qp->sess_mp = session_pool;
588
589 memset(&qp->stats, 0, sizeof(qp->stats));
590 dev->data->queue_pairs[qp_id] = qp;
591 return 0;
592 } while (0);
593
594 rte_free(qp);
595 return -1;
596 }
597
598 /** Return the number of allocated queue pairs (PMD ops callback).
599 *
600 * @param dev Pointer to the device structure.
601 * @returns Number of allocated queue pairs.
602 */
603 static uint32_t
604 mrvl_crypto_pmd_qp_count(struct rte_cryptodev *dev)
605 {
606 return dev->data->nb_queue_pairs;
607 }
608
609 /** Returns the size of the session structure (PMD ops callback).
610 *
611 * @param dev Pointer to the device structure [Unused].
612 * @returns Size of Marvell crypto session.
613 */
614 static unsigned
615 mrvl_crypto_pmd_sym_session_get_size(__rte_unused struct rte_cryptodev *dev)
616 {
617 return sizeof(struct mrvl_crypto_session);
618 }
619
620 /** Configure the session from a crypto xform chain (PMD ops callback).
621 *
622 * @param dev Pointer to the device structure.
623 * @param xform Pointer to the crytpo configuration structure.
624 * @param sess Pointer to the empty session structure.
625 * @returns 0 upon success, negative value otherwise.
626 */
627 static int
628 mrvl_crypto_pmd_sym_session_configure(__rte_unused struct rte_cryptodev *dev,
629 struct rte_crypto_sym_xform *xform,
630 struct rte_cryptodev_sym_session *sess,
631 struct rte_mempool *mp)
632 {
633 struct mrvl_crypto_session *mrvl_sess;
634 void *sess_private_data;
635 int ret;
636
637 if (sess == NULL) {
638 MRVL_CRYPTO_LOG_ERR("Invalid session struct.");
639 return -EINVAL;
640 }
641
642 if (rte_mempool_get(mp, &sess_private_data)) {
643 CDEV_LOG_ERR("Couldn't get object from session mempool.");
644 return -ENOMEM;
645 }
646
647 ret = mrvl_crypto_set_session_parameters(sess_private_data, xform);
648 if (ret != 0) {
649 MRVL_CRYPTO_LOG_ERR("Failed to configure session parameters.");
650
651 /* Return session to mempool */
652 rte_mempool_put(mp, sess_private_data);
653 return ret;
654 }
655
656 set_sym_session_private_data(sess, dev->driver_id, sess_private_data);
657
658 mrvl_sess = (struct mrvl_crypto_session *)sess_private_data;
659 if (sam_session_create(&mrvl_sess->sam_sess_params,
660 &mrvl_sess->sam_sess) < 0) {
661 MRVL_CRYPTO_LOG_DBG("Failed to create session!");
662 return -EIO;
663 }
664
665 return 0;
666 }
667
668 /**
669 * Clear the memory of session so it doesn't leave key material behind.
670 *
671 * @param dev Pointer to the device structure.
672 * @returns 0. Always.
673 */
674 static void
675 mrvl_crypto_pmd_sym_session_clear(struct rte_cryptodev *dev,
676 struct rte_cryptodev_sym_session *sess)
677 {
678
679 uint8_t index = dev->driver_id;
680 void *sess_priv = get_sym_session_private_data(sess, index);
681
682 /* Zero out the whole structure */
683 if (sess_priv) {
684 struct mrvl_crypto_session *mrvl_sess =
685 (struct mrvl_crypto_session *)sess_priv;
686
687 if (mrvl_sess->sam_sess &&
688 sam_session_destroy(mrvl_sess->sam_sess) < 0) {
689 MRVL_CRYPTO_LOG_INFO("Error while destroying session!");
690 }
691
692 memset(sess, 0, sizeof(struct mrvl_crypto_session));
693 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
694 set_sym_session_private_data(sess, index, NULL);
695 rte_mempool_put(sess_mp, sess_priv);
696 }
697 }
698
699 /**
700 * PMD handlers for crypto ops.
701 */
702 static struct rte_cryptodev_ops mrvl_crypto_pmd_ops = {
703 .dev_configure = mrvl_crypto_pmd_config,
704 .dev_start = mrvl_crypto_pmd_start,
705 .dev_stop = mrvl_crypto_pmd_stop,
706 .dev_close = mrvl_crypto_pmd_close,
707
708 .dev_infos_get = mrvl_crypto_pmd_info_get,
709
710 .stats_get = mrvl_crypto_pmd_stats_get,
711 .stats_reset = mrvl_crypto_pmd_stats_reset,
712
713 .queue_pair_setup = mrvl_crypto_pmd_qp_setup,
714 .queue_pair_release = mrvl_crypto_pmd_qp_release,
715 .queue_pair_count = mrvl_crypto_pmd_qp_count,
716
717 .sym_session_get_size = mrvl_crypto_pmd_sym_session_get_size,
718 .sym_session_configure = mrvl_crypto_pmd_sym_session_configure,
719 .sym_session_clear = mrvl_crypto_pmd_sym_session_clear
720 };
721
722 struct rte_cryptodev_ops *rte_mrvl_crypto_pmd_ops = &mrvl_crypto_pmd_ops;