ceph/src/spdk/dpdk/drivers/net/atlantic/atl_types.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Aquantia Corporation
   3  */
   4 #ifndef ATL_TYPES_H
   5 #define ATL_TYPES_H
   6
   7 #include <stdint.h>
   8 #include <stddef.h>
   9 #include <inttypes.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12 #include <netinet/in.h>
  13 #include <pthread.h>
  14
  15 #include <rte_common.h>
  16
  17 typedef uint8_t         u8;
  18 typedef int8_t          s8;
  19 typedef uint16_t        u16;
  20 typedef int16_t         s16;
  21 typedef uint32_t        u32;
  22 typedef int32_t         s32;
  23 typedef uint64_t        u64;
  24
  25 #define min(a, b)       RTE_MIN(a, b)
  26 #define max(a, b)       RTE_MAX(a, b)
  27
  28 #include "hw_atl/hw_atl_b0_internal.h"
  29 #include "hw_atl/hw_atl_utils.h"
  30
  31 struct aq_hw_link_status_s {
  32         unsigned int mbps;
  33 };
  34
  35 struct aq_stats_s {
  36         u64 uprc;
  37         u64 mprc;
  38         u64 bprc;
  39         u64 erpt;
  40         u64 uptc;
  41         u64 mptc;
  42         u64 bptc;
  43         u64 erpr;
  44         u64 mbtc;
  45         u64 bbtc;
  46         u64 mbrc;
  47         u64 bbrc;
  48         u64 ubrc;
  49         u64 ubtc;
  50         u64 dpc;
  51         u64 dma_pkt_rc;
  52         u64 dma_pkt_tc;
  53         u64 dma_oct_rc;
  54         u64 dma_oct_tc;
  55 };
  56
  57 struct aq_rss_parameters {
  58         u16 base_cpu_number;
  59         u16 indirection_table_size;
  60         u16 hash_secret_key_size;
  61         u32 hash_secret_key[HW_ATL_B0_RSS_HASHKEY_BITS / 8];
  62         u8 indirection_table[HW_ATL_B0_RSS_REDIRECTION_MAX];
  63 };
  64
  65 /* Macsec stuff */
  66 struct aq_macsec_config {
  67         struct {
  68                 u32 macsec_enabled;
  69                 u32 encryption_enabled;
  70                 u32 replay_protection_enabled;
  71         } common;
  72
  73         struct {
  74                 u32 idx;
  75                 u32 mac[2]; /* 6 bytes */
  76         } txsc;
  77
  78         struct {
  79                 u32 idx;
  80                 u32 an; /* association number on the local side */
  81                 u32 pn; /* packet number on the local side */
  82                 u32 key[4]; /* 128 bit key */
  83         } txsa;
  84
  85         struct {
  86                 u32 mac[2]; /* 6 bytes */
  87                 u32 pi;
  88         } rxsc;
  89
  90         struct {
  91                 u32 idx;
  92                 u32 an; /* association number on the remote side */
  93                 u32 pn; /* packet number on the remote side */
  94                 u32 key[4]; /* 128 bit key */
  95         } rxsa;
  96 };
  97
  98 struct aq_hw_cfg_s {
  99         bool is_lro;
 100         bool is_rss;
 101         unsigned int num_rss_queues;
 102         int wol;
 103
 104         int link_speed_msk;
 105         int irq_type;
 106         int irq_mask;
 107         unsigned int vecs;
 108
 109         bool vlan_strip;
 110         uint32_t vlan_filter[HW_ATL_B0_MAX_VLAN_IDS];
 111         uint32_t flow_control;
 112
 113         struct aq_rss_parameters aq_rss;
 114         struct aq_macsec_config aq_macsec;
 115 };
 116
 117 struct aq_hw_s {
 118         u16 device_id;
 119         u16 vendor_id;
 120         bool adapter_stopped;
 121
 122         u8 rbl_enabled:1;
 123         struct aq_hw_cfg_s *aq_nic_cfg;
 124         const struct aq_fw_ops *aq_fw_ops;
 125         void *mmio;
 126
 127         struct aq_hw_link_status_s aq_link_status;
 128         bool is_autoneg;
 129
 130         struct hw_aq_atl_utils_mbox mbox;
 131         struct hw_atl_stats_s last_stats;
 132         struct aq_stats_s curr_stats;
 133
 134         u32 caps_lo;
 135
 136         u64 speed;
 137         unsigned int chip_features;
 138         u32 fw_ver_actual;
 139         u32 mbox_addr;
 140         u32 rpc_addr;
 141         u32 rpc_tid;
 142         struct hw_aq_atl_utils_fw_rpc rpc;
 143
 144         pthread_mutex_t mbox_mutex;
 145 };
 146
 147 struct aq_fw_ops {
 148         int (*init)(struct aq_hw_s *self);
 149
 150         int (*deinit)(struct aq_hw_s *self);
 151
 152         int (*reset)(struct aq_hw_s *self);
 153
 154         int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac);
 155
 156         int (*set_link_speed)(struct aq_hw_s *self, u32 speed);
 157
 158         int (*set_state)(struct aq_hw_s *self,
 159                         enum hal_atl_utils_fw_state_e state);
 160
 161         int (*update_link_status)(struct aq_hw_s *self);
 162
 163         int (*update_stats)(struct aq_hw_s *self);
 164
 165         int (*set_power)(struct aq_hw_s *self, unsigned int power_state,
 166                         u8 *mac);
 167
 168         int (*get_temp)(struct aq_hw_s *self, int *temp);
 169
 170         int (*get_cable_len)(struct aq_hw_s *self, int *cable_len);
 171
 172         int (*set_eee_rate)(struct aq_hw_s *self, u32 speed);
 173
 174         int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate,
 175                         u32 *supported_rates);
 176
 177         int (*get_flow_control)(struct aq_hw_s *self, u32 *fc);
 178         int (*set_flow_control)(struct aq_hw_s *self);
 179
 180         int (*led_control)(struct aq_hw_s *self, u32 mode);
 181
 182         int (*get_eeprom)(struct aq_hw_s *self, int dev_addr,
 183                           u32 *data, u32 len, u32 offset);
 184
 185         int (*set_eeprom)(struct aq_hw_s *self, int dev_addr,
 186                           u32 *data, u32 len, u32 offset);
 187
 188         int (*send_macsec_req)(struct aq_hw_s *self,
 189                                struct macsec_msg_fw_request *req,
 190                                struct macsec_msg_fw_response *response);
 191 };
 192
 193 struct atl_sw_stats {
 194         u64 crcerrs;
 195         u64 errbc;
 196         u64 mspdc;
 197         u64 mpctotal;
 198         u64 mpc[8];
 199         u64 mlfc;
 200         u64 mrfc;
 201         u64 rlec;
 202         u64 lxontxc;
 203         u64 lxonrxc;
 204         u64 lxofftxc;
 205         u64 lxoffrxc;
 206         u64 pxontxc[8];
 207         u64 pxonrxc[8];
 208         u64 pxofftxc[8];
 209         u64 pxoffrxc[8];
 210         u64 gprc;
 211         u64 bprc;
 212         u64 mprc;
 213         u64 gptc;
 214         u64 gorc;
 215         u64 gotc;
 216         u64 tor;
 217         u64 tpr;
 218         u64 tpt;
 219         u64 mptc;
 220         u64 bptc;
 221         u64 xec;
 222         u64 fccrc;
 223         u64 ldpcec;
 224         u64 pcrc8ec;
 225
 226         u64 rx_nombuf;
 227         u64 q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 228         u64 q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 229         u64 q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 230         u64 q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 231         u64 q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 232 };
 233
 234 #endif