1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) */
2 /* Copyright (C) 2014-2017 aQuantia Corporation. */
4 /* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
11 #define BIT(x) (1UL << (x))
12 #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
14 /* Hardware tx descriptor */
30 } __attribute__((__packed__
));
33 } __attribute__((__packed__
));
35 /* Hardware tx context descriptor */
54 } __attribute__((__packed__
));
55 } __attribute__((__packed__
));
57 enum aq_tx_desc_type
{
58 tx_desc_type_desc
= 1,
67 tx_desc_cmd_lso
= 0x10,
68 tx_desc_cmd_wb
= 0x20,
72 /* Hardware rx descriptor */
76 } __attribute__((__packed__
));
78 /* Hardware rx descriptor writeback */
79 struct hw_atl_rxd_wb_s
{
92 } __attribute__((__packed__
));
94 struct hw_atl_stats_s
{
110 } __attribute__((__packed__
));
120 } __attribute__((__packed__
));
122 struct hw_aq_atl_utils_fw_rpc
{
149 u32 next_wol_pattern_offset
;
153 u8 ipv4_source_address
[4];
154 u8 ipv4_dest_address
[4];
155 u16 tcp_source_port_number
;
156 u16 tcp_dest_port_number
;
157 } ipv4_tcp_syn_parameters
;
161 u8 ipv6_source_address
[16];
162 u8 ipv6_dest_address
[16];
163 u16 tcp_source_port_number
;
164 u16 tcp_dest_port_number
;
165 } ipv6_tcp_syn_parameters
;
169 } eapol_request_id_message_parameters
;
177 } wol_bit_map_pattern
;
180 } wol_magic_packet_pattern
;
188 } msg_msm_pfc_quantas
;
194 u32 aq_pm_wol_reason_arp_v4_pkt
: 1;
195 u32 aq_pm_wol_reason_ipv4_ping_pkt
: 1;
196 u32 aq_pm_wol_reason_ipv6_ns_pkt
: 1;
197 u32 aq_pm_wol_reason_ipv6_ping_pkt
: 1;
198 u32 aq_pm_wol_reason_link_up
: 1;
199 u32 aq_pm_wol_reason_link_down
: 1;
200 u32 aq_pm_wol_reason_maximum
: 1;
210 u32 protocol_offload_type
;
211 u32 protocol_offload_id
;
212 u32 next_protocol_offload_offset
;
217 u8 remote_ipv4_addr
[4];
218 u8 host_ipv4_addr
[4];
229 } __attribute__((__packed__
));
231 struct hw_aq_atl_utils_mbox_header
{
235 } __attribute__((__packed__
));
243 u32 cable_diag_data
[4];
247 } __attribute__((__packed__
));
249 struct hw_aq_atl_utils_mbox
{
250 struct hw_aq_atl_utils_mbox_header header
;
251 struct hw_atl_stats_s stats
;
252 struct hw_aq_info info
;
253 } __attribute__((__packed__
));
256 typedef u16 in_port_t
;
257 typedef u32 ip4_addr_t
;
259 typedef short int16_t;
260 typedef u32 fw_offset_t
;
264 } __attribute__((__packed__
));
266 struct offload_ka_v4
{
268 in_port_t local_port
;
269 in_port_t remote_port
;
270 u8 remote_mac_addr
[6];
275 ip4_addr_t remote_ip
;
276 } __attribute__((__packed__
));
278 struct offload_ka_v6
{
280 in_port_t local_port
;
281 in_port_t remote_port
;
282 u8 remote_mac_addr
[6];
286 struct ip6_addr local_ip
;
287 struct ip6_addr remote_ip
;
288 } __attribute__((__packed__
));
290 struct offload_ip_info
{
291 u8 v4_local_addr_count
;
293 u8 v6_local_addr_count
;
296 fw_offset_t v4_prefix
;
298 fw_offset_t v6_prefix
;
299 } __attribute__((__packed__
));
301 struct offload_port_info
{
304 fw_offset_t udp_port
;
305 fw_offset_t tcp_port
;
306 } __attribute__((__packed__
));
308 struct offload_ka_info
{
315 } __attribute__((__packed__
));
317 struct offload_rr_info
{
322 } __attribute__((__packed__
));
324 struct offload_info
{
325 u32 version
; // current version is 0x00000000
326 u32 len
; // The whole structure length
327 // including the variable-size buf
328 u8 mac_addr
[6]; // 8 bytes to keep alignment. Only
329 // first 6 meaningful.
333 struct offload_ip_info ips
;
334 struct offload_port_info ports
;
335 struct offload_ka_info kas
;
336 struct offload_rr_info rrs
;
338 } __attribute__((__packed__
));
340 struct smbus_request
{
341 u32 msg_id
; /* not used */
345 } __attribute__((__packed__
));
347 enum macsec_msg_type
{
349 macsec_add_rx_sc_msg
,
350 macsec_add_tx_sc_msg
,
351 macsec_add_rx_sa_msg
,
352 macsec_add_tx_sa_msg
,
353 macsec_get_stats_msg
,
358 uint32_t egress_threshold
;
359 uint32_t ingress_threshold
;
360 uint32_t interrupts_enabled
;
361 } __attribute__((__packed__
));
365 uint32_t pi
; /* Port identifier */
366 uint32_t sci
[2]; /* Secure Channel identifier */
367 uint32_t sci_mask
; /* 1: enable comparison of SCI, 0: don't care */
371 uint32_t sa_mask
; /* 0: ignore mac_sa */
373 uint32_t da_mask
; /* 0: ignore mac_da */
374 uint32_t validate_frames
; /* 0: strict, 1:check, 2:disabled */
375 uint32_t replay_protect
; /* 1: enabled, 0:disabled */
376 uint32_t anti_replay_window
; /* default 0 */
377 /* 1: auto_rollover enabled (when SA next_pn is saturated */
379 } __attribute__((__packed__
));
383 uint32_t pi
; /* Port identifier */
384 uint32_t sci
[2]; /* Secure Channel identifier */
385 uint32_t sci_mask
; /* 1: enable comparison of SCI, 0: don't care */
386 uint32_t tci
; /* TCI value, used if packet is not explicitly tagged */
389 uint32_t sa_mask
; /* 0: ignore mac_sa */
391 uint32_t da_mask
; /* 0: ignore mac_da */
393 uint32_t curr_an
; /* SA index which currently used */
394 } __attribute__((__packed__
));
399 uint32_t key
[4]; /* 128 bit key */
400 } __attribute__((__packed__
));
405 uint32_t key
[4]; /* 128 bit key */
406 } __attribute__((__packed__
));
409 uint32_t version_only
;
410 uint32_t ingress_sa_index
;
411 uint32_t egress_sa_index
;
412 uint32_t egress_sc_index
;
413 } __attribute__((__packed__
));
415 struct macsec_stats
{
416 uint32_t api_version
;
417 /* Ingress Common Counters */
418 uint64_t in_ctl_pkts
;
419 uint64_t in_tagged_miss_pkts
;
420 uint64_t in_untagged_miss_pkts
;
421 uint64_t in_notag_pkts
;
422 uint64_t in_untagged_pkts
;
423 uint64_t in_bad_tag_pkts
;
424 uint64_t in_no_sci_pkts
;
425 uint64_t in_unknown_sci_pkts
;
426 uint64_t in_ctrl_prt_pass_pkts
;
427 uint64_t in_unctrl_prt_pass_pkts
;
428 uint64_t in_ctrl_prt_fail_pkts
;
429 uint64_t in_unctrl_prt_fail_pkts
;
430 uint64_t in_too_long_pkts
;
431 uint64_t in_igpoc_ctl_pkts
;
432 uint64_t in_ecc_error_pkts
;
433 uint64_t in_unctrl_hit_drop_redir
;
435 /* Egress Common Counters */
436 uint64_t out_ctl_pkts
;
437 uint64_t out_unknown_sa_pkts
;
438 uint64_t out_untagged_pkts
;
439 uint64_t out_too_long
;
440 uint64_t out_ecc_error_pkts
;
441 uint64_t out_unctrl_hit_drop_redir
;
443 /* Ingress SA Counters */
444 uint64_t in_untagged_hit_pkts
;
445 uint64_t in_ctrl_hit_drop_redir_pkts
;
446 uint64_t in_not_using_sa
;
447 uint64_t in_unused_sa
;
448 uint64_t in_not_valid_pkts
;
449 uint64_t in_invalid_pkts
;
451 uint64_t in_late_pkts
;
452 uint64_t in_delayed_pkts
;
453 uint64_t in_unchecked_pkts
;
454 uint64_t in_validated_octets
;
455 uint64_t in_decrypted_octets
;
457 /* Egress SA Counters */
458 uint64_t out_sa_hit_drop_redirect
;
459 uint64_t out_sa_protected2_pkts
;
460 uint64_t out_sa_protected_pkts
;
461 uint64_t out_sa_encrypted_pkts
;
463 /* Egress SC Counters */
464 uint64_t out_sc_protected_pkts
;
465 uint64_t out_sc_encrypted_pkts
;
466 uint64_t out_sc_protected_octets
;
467 uint64_t out_sc_encrypted_octets
;
469 /* SA Counters expiration info */
470 uint32_t egress_threshold_expired
;
471 uint32_t ingress_threshold_expired
;
472 uint32_t egress_expired
;
473 uint32_t ingress_expired
;
474 } __attribute__((__packed__
));
476 struct macsec_msg_fw_request
{
477 uint32_t offset
; /* not used */
481 struct macsec_cfg cfg
;
482 struct add_rx_sc rxsc
;
483 struct add_tx_sc txsc
;
484 struct add_rx_sa rxsa
;
485 struct add_tx_sa txsa
;
486 struct get_stats stats
;
488 } __attribute__((__packed__
));
490 struct macsec_msg_fw_response
{
492 struct macsec_stats stats
;
493 } __attribute__((__packed__
));
495 #define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
496 #define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
497 #define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
498 #define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ 0x00000010U
499 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 0x01000000U
500 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
501 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 0x04000000U
504 #define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
507 enum hal_atl_utils_fw_state_e
{
514 #define HAL_ATLANTIC_RATE_10G BIT(0)
515 #define HAL_ATLANTIC_RATE_5G BIT(1)
516 #define HAL_ATLANTIC_RATE_5GSR BIT(2)
517 #define HAL_ATLANTIC_RATE_2GS BIT(3)
518 #define HAL_ATLANTIC_RATE_1G BIT(4)
519 #define HAL_ATLANTIC_RATE_100M BIT(5)
520 #define HAL_ATLANTIC_RATE_INVALID BIT(6)
522 #define HAL_ATLANTIC_UTILS_FW_MSG_PING 1U
523 #define HAL_ATLANTIC_UTILS_FW_MSG_ARP 2U
524 #define HAL_ATLANTIC_UTILS_FW_MSG_INJECT 3U
525 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_ADD 4U
526 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_DEL 5U
527 #define HAL_ATLANTIC_UTILS_FW_MSG_ENABLE_WAKEUP 6U
528 #define HAL_ATLANTIC_UTILS_FW_MSG_MSM_PFC 7U
529 #define HAL_ATLANTIC_UTILS_FW_MSG_PROVISIONING 8U
530 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_ADD 9U
531 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_DEL 10U
532 #define HAL_ATLANTIC_UTILS_FW_MSG_CABLE_DIAG 13U // 0xd
534 #define SMBUS_DEVICE_ID 0x50
536 enum hw_atl_fw2x_caps_lo
{
537 CAPS_LO_10BASET_HD
= 0x00,
539 CAPS_LO_100BASETX_HD
,
540 CAPS_LO_100BASET4_HD
,
541 CAPS_LO_100BASET2_HD
,
542 CAPS_LO_100BASETX_FD
,
543 CAPS_LO_100BASET2_FD
,
544 CAPS_LO_1000BASET_HD
,
545 CAPS_LO_1000BASET_FD
,
546 CAPS_LO_2P5GBASET_FD
,
555 enum hw_atl_fw2x_caps_hi
{
556 CAPS_HI_RESERVED1
= 0x00,
560 CAPS_HI_ASYMMETRIC_PAUSE
,
561 CAPS_HI_100BASETX_EEE
,
564 CAPS_HI_1000BASET_FD_EEE
,
565 CAPS_HI_2P5GBASET_FD_EEE
,
566 CAPS_HI_5GBASET_FD_EEE
,
567 CAPS_HI_10GBASET_FD_EEE
,
577 CAPS_HI_MEDIA_DETECT
,
582 CAPS_HI_EXT_LOOPBACK
,
583 CAPS_HI_INT_LOOPBACK
,
587 CAPS_HI_TRANSACTION_ID
,
590 enum hw_atl_fw2x_rate
{
591 FW2X_RATE_100M
= BIT(CAPS_LO_100BASETX_FD
),
592 FW2X_RATE_1G
= BIT(CAPS_LO_1000BASET_FD
),
593 FW2X_RATE_2G5
= BIT(CAPS_LO_2P5GBASET_FD
),
594 FW2X_RATE_5G
= BIT(CAPS_LO_5GBASET_FD
),
595 FW2X_RATE_10G
= BIT(CAPS_LO_10GBASET_FD
),
600 struct aq_hw_link_status_s
;
602 int hw_atl_utils_initfw(struct aq_hw_s
*self
, const struct aq_fw_ops
**fw_ops
);
604 int hw_atl_utils_soft_reset(struct aq_hw_s
*self
);
606 void hw_atl_utils_hw_chip_features_init(struct aq_hw_s
*self
, u32
*p
);
608 int hw_atl_utils_mpi_read_mbox(struct aq_hw_s
*self
,
609 struct hw_aq_atl_utils_mbox_header
*pmbox
);
611 void hw_atl_utils_mpi_read_stats(struct aq_hw_s
*self
,
612 struct hw_aq_atl_utils_mbox
*pmbox
);
614 void hw_atl_utils_mpi_set(struct aq_hw_s
*self
,
615 enum hal_atl_utils_fw_state_e state
,
618 int hw_atl_utils_mpi_get_link_status(struct aq_hw_s
*self
);
620 unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps
);
622 unsigned int hw_atl_utils_hw_get_reg_length(void);
624 int hw_atl_utils_hw_get_regs(struct aq_hw_s
*self
,
627 int hw_atl_utils_hw_set_power(struct aq_hw_s
*self
,
628 unsigned int power_state
);
630 int hw_atl_utils_hw_deinit(struct aq_hw_s
*self
);
632 int hw_atl_utils_get_fw_version(struct aq_hw_s
*self
, u32
*fw_version
);
634 int hw_atl_utils_update_stats(struct aq_hw_s
*self
);
636 struct aq_stats_s
*hw_atl_utils_get_hw_stats(struct aq_hw_s
*self
);
638 int hw_atl_utils_fw_downld_dwords(struct aq_hw_s
*self
, u32 a
,
641 int hw_atl_utils_fw_upload_dwords(struct aq_hw_s
*self
, u32 a
, u32
*p
,
644 int hw_atl_utils_fw_set_wol(struct aq_hw_s
*self
, bool wol_enabled
, u8
*mac
);
646 int hw_atl_utils_fw_rpc_call(struct aq_hw_s
*self
, unsigned int rpc_size
);
648 int hw_atl_utils_fw_rpc_wait(struct aq_hw_s
*self
,
649 struct hw_aq_atl_utils_fw_rpc
**rpc
);
651 extern const struct aq_fw_ops aq_fw_1x_ops
;
652 extern const struct aq_fw_ops aq_fw_2x_ops
;
654 #endif /* HW_ATL_UTILS_H */