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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2007-2013 Broadcom Corporation.
3 *
4 * Eric Davis <edavis@broadcom.com>
5 * David Christensen <davidch@broadcom.com>
6 * Gary Zambrano <zambrano@broadcom.com>
7 *
8 * Copyright (c) 2014-2018 Cavium Inc.
9 * All rights reserved.
10 * www.cavium.com
11 */
12
13 #ifndef ECORE_MFW_REQ_H
14 #define ECORE_MFW_REQ_H
15
16
17
18 #define PORT_0 0
19 #define PORT_1 1
20 #define PORT_MAX 2
21 #define NVM_PATH_MAX 2
22
23 /* FCoE capabilities required from the driver */
24 struct fcoe_capabilities {
25 uint32_t capability1;
26 /* Maximum number of I/Os per connection */
27 #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff
28 #define FCOE_IOS_PER_CONNECTION_SHIFT 0
29 /* Maximum number of Logins per port */
30 #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000
31 #define FCOE_LOGINS_PER_PORT_SHIFT 16
32
33 uint32_t capability2;
34 /* Maximum number of exchanges */
35 #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff
36 #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0
37 /* Maximum NPIV WWN per port */
38 #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000
39 #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16
40
41 uint32_t capability3;
42 /* Maximum number of targets supported */
43 #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff
44 #define FCOE_TARGETS_SUPPORTED_SHIFT 0
45 /* Maximum number of outstanding commands across all connections */
46 #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000
47 #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16
48
49 uint32_t capability4;
50 #define FCOE_CAPABILITY4_STATEFUL 0x00000001
51 #define FCOE_CAPABILITY4_STATELESS 0x00000002
52 #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004
53 };
54
55 struct glob_ncsi_oem_data
56 {
57 uint32_t driver_version;
58 uint32_t unused[3];
59 struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX];
60 };
61
62 /* current drv_info version */
63 #define DRV_INFO_CUR_VER 2
64
65 /* drv_info op codes supported */
66 enum drv_info_opcode {
67 ETH_STATS_OPCODE,
68 FCOE_STATS_OPCODE,
69 ISCSI_STATS_OPCODE
70 };
71
72 #define ETH_STAT_INFO_VERSION_LEN 12
73 /* Per PCI Function Ethernet Statistics required from the driver */
74 struct eth_stats_info {
75 /* Function's Driver Version. padded to 12 */
76 char version[ETH_STAT_INFO_VERSION_LEN];
77 /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */
78 uint8_t mac_local[8];
79 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */
80 uint8_t mac_add2[8]; /* Additional Programmed MAC Addr 2. */
81 uint32_t mtu_size; /* MTU Size. Note : Negotiated MTU */
82 uint32_t feature_flags; /* Feature_Flags. */
83 #define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01
84 #define FEATURE_ETH_LSO_MASK 0x02
85 #define FEATURE_ETH_BOOTMODE_MASK 0x1C
86 #define FEATURE_ETH_BOOTMODE_SHIFT 2
87 #define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2)
88 #define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2)
89 #define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2)
90 #define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2)
91 #define FEATURE_ETH_TOE_MASK 0x20
92 uint32_t lso_max_size; /* LSO MaxOffloadSize. */
93 uint32_t lso_min_seg_cnt; /* LSO MinSegmentCount. */
94 /* Num Offloaded Connections TCP_IPv4. */
95 uint32_t ipv4_ofld_cnt;
96 /* Num Offloaded Connections TCP_IPv6. */
97 uint32_t ipv6_ofld_cnt;
98 uint32_t promiscuous_mode; /* Promiscuous Mode. non-zero true */
99 uint32_t txq_size; /* TX Descriptors Queue Size */
100 uint32_t rxq_size; /* RX Descriptors Queue Size */
101 /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */
102 uint32_t txq_avg_depth;
103 /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */
104 uint32_t rxq_avg_depth;
105 /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/
106 uint32_t iov_offload;
107 /* Number of NetQueue/VMQ Config'd. */
108 uint32_t netq_cnt;
109 uint32_t vf_cnt; /* Num VF assigned to this PF. */
110 };
111
112 /* Per PCI Function FCOE Statistics required from the driver */
113 struct fcoe_stats_info {
114 uint8_t version[12]; /* Function's Driver Version. */
115 uint8_t mac_local[8]; /* Locally Admin Addr. */
116 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */
117 uint8_t mac_add2[8]; /* Additional Programmed MAC Addr 2. */
118 /* QoS Priority (per 802.1p). 0-7255 */
119 uint32_t qos_priority;
120 uint32_t txq_size; /* FCoE TX Descriptors Queue Size. */
121 uint32_t rxq_size; /* FCoE RX Descriptors Queue Size. */
122 /* FCoE TX Descriptor Queue Avg Depth. */
123 uint32_t txq_avg_depth;
124 /* FCoE RX Descriptors Queue Avg Depth. */
125 uint32_t rxq_avg_depth;
126 uint32_t rx_frames_lo; /* FCoE RX Frames received. */
127 uint32_t rx_frames_hi; /* FCoE RX Frames received. */
128 uint32_t rx_bytes_lo; /* FCoE RX Bytes received. */
129 uint32_t rx_bytes_hi; /* FCoE RX Bytes received. */
130 uint32_t tx_frames_lo; /* FCoE TX Frames sent. */
131 uint32_t tx_frames_hi; /* FCoE TX Frames sent. */
132 uint32_t tx_bytes_lo; /* FCoE TX Bytes sent. */
133 uint32_t tx_bytes_hi; /* FCoE TX Bytes sent. */
134 uint32_t rx_fcs_errors; /* number of receive packets with FCS errors */
135 uint32_t rx_fc_crc_errors; /* number of FC frames with CRC errors*/
136 uint32_t fip_login_failures; /* number of FCoE/FIP Login failures */
137 };
138
139 /* Per PCI Function iSCSI Statistics required from the driver*/
140 struct iscsi_stats_info {
141 uint8_t version[12]; /* Function's Driver Version. */
142 uint8_t mac_local[8]; /* Locally Admin iSCSI MAC Addr. */
143 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */
144 /* QoS Priority (per 802.1p). 0-7255 */
145 uint32_t qos_priority;
146
147 uint8_t initiator_name[64]; /* iSCSI Boot Initiator Node name. */
148
149 uint8_t ww_port_name[64]; /* iSCSI World wide port name */
150
151 uint8_t boot_target_name[64];/* iSCSI Boot Target Name. */
152
153 uint8_t boot_target_ip[16]; /* iSCSI Boot Target IP. */
154 uint32_t boot_target_portal; /* iSCSI Boot Target Portal. */
155 uint8_t boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */
156 uint32_t max_frame_size; /* Max Frame Size. bytes */
157 uint32_t txq_size; /* PDU TX Descriptors Queue Size. */
158 uint32_t rxq_size; /* PDU RX Descriptors Queue Size. */
159
160 uint32_t txq_avg_depth; /*PDU TX Descriptor Queue Avg Depth. */
161 uint32_t rxq_avg_depth; /*PDU RX Descriptors Queue Avg Depth. */
162 uint32_t rx_pdus_lo; /* iSCSI PDUs received. */
163 uint32_t rx_pdus_hi; /* iSCSI PDUs received. */
164
165 uint32_t rx_bytes_lo; /* iSCSI RX Bytes received. */
166 uint32_t rx_bytes_hi; /* iSCSI RX Bytes received. */
167 uint32_t tx_pdus_lo; /* iSCSI PDUs sent. */
168 uint32_t tx_pdus_hi; /* iSCSI PDUs sent. */
169
170 uint32_t tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */
171 uint32_t tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */
172 uint32_t pcp_prior_map_tbl; /*C-PCP to S-PCP Priority MapTable.
173 9 nibbles, the position of each nibble
174 represents the C-PCP value, the value
175 of the nibble = S-PCP value.*/
176 };
177
178 union drv_info_to_mcp {
179 struct eth_stats_info ether_stat;
180 struct fcoe_stats_info fcoe_stat;
181 struct iscsi_stats_info iscsi_stat;
182 };
183
184
185 #endif /* ECORE_MFW_REQ_H */