ceph/src/spdk/dpdk/drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  24 {
  25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  26                 rxq->cp_ring->hw_stats = NULL;
  27 }
  28
  29 int bnxt_mq_rx_configure(struct bnxt *bp)
  30 {
  31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  32         const struct rte_eth_vmdq_rx_conf *conf =
  33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  35         int start_grp_id, end_grp_id = 1, rc = 0;
  36         struct bnxt_vnic_info *vnic;
  37         struct bnxt_filter_info *filter;
  38         enum rte_eth_nb_pools pools = 1, max_pools = 0;
  39         struct bnxt_rx_queue *rxq;
  40
  41         bp->nr_vnics = 0;
  42
  43         /* Single queue mode */
  44         if (bp->rx_cp_nr_rings < 2) {
  45                 vnic = &bp->vnic_info[0];
  46                 if (!vnic) {
  47                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
  48                         rc = -ENOMEM;
  49                         goto err_out;
  50                 }
  51                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
  52                 bp->nr_vnics++;
  53
  54                 rxq = bp->eth_dev->data->rx_queues[0];
  55                 rxq->vnic = vnic;
  56
  57                 vnic->func_default = true;
  58                 vnic->start_grp_id = 0;
  59                 vnic->end_grp_id = vnic->start_grp_id;
  60                 filter = bnxt_alloc_filter(bp);
  61                 if (!filter) {
  62                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
  63                         rc = -ENOMEM;
  64                         goto err_out;
  65                 }
  66                 filter->mac_index = 0;
  67                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
  68                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
  69                 goto out;
  70         }
  71
  72         /* Multi-queue mode */
  73         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
  74                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  75
  76                 switch (dev_conf->rxmode.mq_mode) {
  77                 case ETH_MQ_RX_VMDQ_RSS:
  78                 case ETH_MQ_RX_VMDQ_ONLY:
  79                 case ETH_MQ_RX_VMDQ_DCB_RSS:
  80                         /* FALLTHROUGH */
  81                         /* ETH_8/64_POOLs */
  82                         pools = conf->nb_queue_pools;
  83                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  84                         max_pools = RTE_MIN(bp->max_vnics,
  85                                             RTE_MIN(bp->max_l2_ctx,
  86                                             RTE_MIN(bp->max_rsscos_ctx,
  87                                                     ETH_64_POOLS)));
  88                         PMD_DRV_LOG(DEBUG,
  89                                     "pools = %u max_pools = %u\n",
  90                                     pools, max_pools);
  91                         if (pools > max_pools)
  92                                 pools = max_pools;
  93                         break;
  94                 case ETH_MQ_RX_RSS:
  95                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
  96                         break;
  97                 default:
  98                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
  99                                 dev_conf->rxmode.mq_mode);
 100                         rc = -EINVAL;
 101                         goto err_out;
 102                 }
 103         } else if (!dev_conf->rxmode.mq_mode) {
 104                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
 105         }
 106
 107         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
 108         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
 109         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 110         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
 111                     pools, nb_q_per_grp);
 112         start_grp_id = 0;
 113         end_grp_id = nb_q_per_grp;
 114
 115         for (i = 0; i < pools; i++) {
 116                 vnic = &bp->vnic_info[i];
 117                 if (!vnic) {
 118                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
 119                         rc = -ENOMEM;
 120                         goto err_out;
 121                 }
 122                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 123                 bp->nr_vnics++;
 124
 125                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 126                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 127                         rxq->vnic = vnic;
 128                         PMD_DRV_LOG(DEBUG,
 129                                     "rxq[%d] = %p vnic[%d] = %p\n",
 130                                     ring_idx, rxq, i, vnic);
 131                 }
 132                 if (i == 0) {
 133                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
 134                                 bp->eth_dev->data->promiscuous = 1;
 135                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 136                         }
 137                         vnic->func_default = true;
 138                 }
 139                 vnic->start_grp_id = start_grp_id;
 140                 vnic->end_grp_id = end_grp_id;
 141
 142                 if (i) {
 143                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
 144                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
 145                                 vnic->rss_dflt_cr = true;
 146                         goto skip_filter_allocation;
 147                 }
 148                 filter = bnxt_alloc_filter(bp);
 149                 if (!filter) {
 150                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 151                         rc = -ENOMEM;
 152                         goto err_out;
 153                 }
 154                 filter->mac_index = 0;
 155                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 156                 /*
 157                  * TODO: Configure & associate CFA rule for
 158                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 159                  */
 160                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 161
 162 skip_filter_allocation:
 163                 start_grp_id = end_grp_id;
 164                 end_grp_id += nb_q_per_grp;
 165         }
 166
 167 out:
 168         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 169                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
 170
 171                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
 172                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 173
 174                 for (i = 0; i < bp->nr_vnics; i++) {
 175                         vnic = &bp->vnic_info[i];
 176                         vnic->hash_type =
 177                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 178
 179                         /*
 180                          * Use the supplied key if the key length is
 181                          * acceptable and the rss_key is not NULL
 182                          */
 183                         if (rss->rss_key &&
 184                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 185                                 memcpy(vnic->rss_hash_key,
 186                                        rss->rss_key, rss->rss_key_len);
 187                 }
 188         }
 189
 190         return rc;
 191
 192 err_out:
 193         /* Free allocated vnic/filters */
 194
 195         return rc;
 196 }
 197
 198 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 199 {
 200         struct bnxt_sw_rx_bd *sw_ring;
 201         struct bnxt_tpa_info *tpa_info;
 202         uint16_t i;
 203
 204         if (!rxq)
 205                 return;
 206
 207         rte_spinlock_lock(&rxq->lock);
 208
 209         sw_ring = rxq->rx_ring->rx_buf_ring;
 210         if (sw_ring) {
 211                 for (i = 0;
 212                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 213                         if (sw_ring[i].mbuf) {
 214                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 215                                 sw_ring[i].mbuf = NULL;
 216                         }
 217                 }
 218         }
 219         /* Free up mbufs in Agg ring */
 220         sw_ring = rxq->rx_ring->ag_buf_ring;
 221         if (sw_ring) {
 222                 for (i = 0;
 223                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 224                         if (sw_ring[i].mbuf) {
 225                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 226                                 sw_ring[i].mbuf = NULL;
 227                         }
 228                 }
 229         }
 230
 231         /* Free up mbufs in TPA */
 232         tpa_info = rxq->rx_ring->tpa_info;
 233         if (tpa_info) {
 234                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 235
 236                 for (i = 0; i < max_aggs; i++) {
 237                         if (tpa_info[i].mbuf) {
 238                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 239                                 tpa_info[i].mbuf = NULL;
 240                         }
 241                 }
 242         }
 243
 244         rte_spinlock_unlock(&rxq->lock);
 245 }
 246
 247 void bnxt_free_rx_mbufs(struct bnxt *bp)
 248 {
 249         struct bnxt_rx_queue *rxq;
 250         int i;
 251
 252         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 253                 rxq = bp->rx_queues[i];
 254                 bnxt_rx_queue_release_mbufs(rxq);
 255         }
 256 }
 257
 258 void bnxt_rx_queue_release_op(void *rx_queue)
 259 {
 260         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
 261
 262         if (rxq) {
 263                 if (is_bnxt_in_error(rxq->bp))
 264                         return;
 265
 266                 bnxt_rx_queue_release_mbufs(rxq);
 267
 268                 /* Free RX ring hardware descriptors */
 269                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 270                 /* Free RX Agg ring hardware descriptors */
 271                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 272
 273                 /* Free RX completion ring hardware descriptors */
 274                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 275
 276                 bnxt_free_rxq_stats(rxq);
 277                 rte_memzone_free(rxq->mz);
 278                 rxq->mz = NULL;
 279
 280                 rte_free(rxq);
 281         }
 282 }
 283
 284 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 285                                uint16_t queue_idx,
 286                                uint16_t nb_desc,
 287                                unsigned int socket_id,
 288                                const struct rte_eth_rxconf *rx_conf,
 289                                struct rte_mempool *mp)
 290 {
 291         struct bnxt *bp = eth_dev->data->dev_private;
 292         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 293         struct bnxt_rx_queue *rxq;
 294         int rc = 0;
 295         uint8_t queue_state;
 296
 297         rc = is_bnxt_in_error(bp);
 298         if (rc)
 299                 return rc;
 300
 301         if (queue_idx >= BNXT_MAX_RINGS(bp)) {
 302                 PMD_DRV_LOG(ERR,
 303                         "Cannot create Rx ring %d. Only %d rings available\n",
 304                         queue_idx, bp->max_rx_rings);
 305                 return -EINVAL;
 306         }
 307
 308         if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
 309                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 310                 rc = -EINVAL;
 311                 goto out;
 312         }
 313
 314         if (eth_dev->data->rx_queues) {
 315                 rxq = eth_dev->data->rx_queues[queue_idx];
 316                 if (rxq)
 317                         bnxt_rx_queue_release_op(rxq);
 318         }
 319         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 320                                  RTE_CACHE_LINE_SIZE, socket_id);
 321         if (!rxq) {
 322                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 323                 rc = -ENOMEM;
 324                 goto out;
 325         }
 326         rxq->bp = bp;
 327         rxq->mb_pool = mp;
 328         rxq->nb_rx_desc = nb_desc;
 329         rxq->rx_free_thresh = rx_conf->rx_free_thresh;
 330
 331         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 332
 333         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 334         if (rc)
 335                 goto out;
 336
 337         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 338         rxq->queue_id = queue_idx;
 339         rxq->port_id = eth_dev->data->port_id;
 340         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
 341                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 342         else
 343                 rxq->crc_len = 0;
 344
 345         eth_dev->data->rx_queues[queue_idx] = rxq;
 346         /* Allocate RX ring hardware descriptors */
 347         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
 348                              "rxr")) {
 349                 PMD_DRV_LOG(ERR,
 350                         "ring_dma_zone_reserve for rx_ring failed!\n");
 351                 bnxt_rx_queue_release_op(rxq);
 352                 rc = -ENOMEM;
 353                 goto out;
 354         }
 355         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 356
 357         /* rxq 0 must not be stopped when used as async CPR */
 358         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 359                 rxq->rx_deferred_start = false;
 360         else
 361                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 362
 363         if (rxq->rx_deferred_start) {
 364                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
 365                 rxq->rx_started = false;
 366         } else {
 367                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
 368                 rxq->rx_started = true;
 369         }
 370         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
 371         rte_spinlock_init(&rxq->lock);
 372
 373         /* Configure mtu if it is different from what was configured before */
 374         if (!queue_idx)
 375                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 376
 377 out:
 378         return rc;
 379 }
 380
 381 int
 382 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 383 {
 384         struct bnxt *bp = eth_dev->data->dev_private;
 385         struct bnxt_rx_queue *rxq;
 386         struct bnxt_cp_ring_info *cpr;
 387         int rc = 0;
 388
 389         rc = is_bnxt_in_error(bp);
 390         if (rc)
 391                 return rc;
 392
 393         if (eth_dev->data->rx_queues) {
 394                 rxq = eth_dev->data->rx_queues[queue_id];
 395                 if (!rxq)
 396                         return -EINVAL;
 397
 398                 cpr = rxq->cp_ring;
 399                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 400         }
 401         return rc;
 402 }
 403
 404 int
 405 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 406 {
 407         struct bnxt *bp = eth_dev->data->dev_private;
 408         struct bnxt_rx_queue *rxq;
 409         struct bnxt_cp_ring_info *cpr;
 410         int rc = 0;
 411
 412         rc = is_bnxt_in_error(bp);
 413         if (rc)
 414                 return rc;
 415
 416         if (eth_dev->data->rx_queues) {
 417                 rxq = eth_dev->data->rx_queues[queue_id];
 418                 if (!rxq)
 419                         return -EINVAL;
 420
 421                 cpr = rxq->cp_ring;
 422                 B_CP_DB_DISARM(cpr);
 423         }
 424         return rc;
 425 }
 426
 427 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 428 {
 429         struct bnxt *bp = dev->data->dev_private;
 430         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 431         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 432         struct bnxt_vnic_info *vnic = NULL;
 433         int rc = 0;
 434
 435         rc = is_bnxt_in_error(bp);
 436         if (rc)
 437                 return rc;
 438
 439         if (rxq == NULL) {
 440                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 441                 return -EINVAL;
 442         }
 443
 444         /* Set the queue state to started here.
 445          * We check the status of the queue while posting buffer.
 446          * If queue is it started, we do not post buffers for Rx.
 447          */
 448         rxq->rx_started = true;
 449         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 450
 451         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 452         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 453         if (rc)
 454                 return rc;
 455
 456         if (BNXT_CHIP_THOR(bp)) {
 457                 /* Reconfigure default receive ring and MRU. */
 458                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 459         }
 460         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 461
 462         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 463                 vnic = rxq->vnic;
 464
 465                 if (BNXT_HAS_RING_GRPS(bp)) {
 466                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 467                                 return 0;
 468
 469                         vnic->fw_grp_ids[rx_queue_id] =
 470                                         bp->grp_info[rx_queue_id].fw_grp_id;
 471                         PMD_DRV_LOG(DEBUG,
 472                                     "vnic = %p fw_grp_id = %d\n",
 473                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 474                 }
 475
 476                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 477                 rc = bnxt_vnic_rss_configure(bp, vnic);
 478         }
 479
 480         if (rc != 0) {
 481                 dev->data->rx_queue_state[rx_queue_id] =
 482                                 RTE_ETH_QUEUE_STATE_STOPPED;
 483                 rxq->rx_started = false;
 484         }
 485
 486         PMD_DRV_LOG(INFO,
 487                     "queue %d, rx_deferred_start %d, state %d!\n",
 488                     rx_queue_id, rxq->rx_deferred_start,
 489                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 490
 491         return rc;
 492 }
 493
 494 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 495 {
 496         struct bnxt *bp = dev->data->dev_private;
 497         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 498         struct bnxt_vnic_info *vnic = NULL;
 499         struct bnxt_rx_queue *rxq = NULL;
 500         int active_queue_cnt = 0;
 501         int i, rc = 0;
 502
 503         rc = is_bnxt_in_error(bp);
 504         if (rc)
 505                 return rc;
 506
 507         /* For the stingray platform and other platforms needing tighter
 508          * control of resource utilization, Rx CQ 0 also works as
 509          * Default CQ for async notifications
 510          */
 511         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 512                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 513                 return -EINVAL;
 514         }
 515
 516         rxq = bp->rx_queues[rx_queue_id];
 517         if (!rxq) {
 518                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 519                 return -EINVAL;
 520         }
 521
 522         vnic = rxq->vnic;
 523         if (!vnic) {
 524                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
 525                             rx_queue_id);
 526                 return -EINVAL;
 527         }
 528
 529         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 530         rxq->rx_started = false;
 531         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 532
 533         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 534                 if (BNXT_HAS_RING_GRPS(bp))
 535                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 536
 537                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 538                 rc = bnxt_vnic_rss_configure(bp, vnic);
 539         }
 540
 541         if (BNXT_CHIP_THOR(bp)) {
 542                 /* Compute current number of active receive queues. */
 543                 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 544                         if (bp->rx_queues[i]->rx_started)
 545                                 active_queue_cnt++;
 546
 547                 /*
 548                  * For Thor, we need to ensure that the VNIC default receive
 549                  * ring corresponds to an active receive queue. When no queue
 550                  * is active, we need to temporarily set the MRU to zero so
 551                  * that packets are dropped early in the receive pipeline in
 552                  * order to prevent the VNIC default receive ring from being
 553                  * accessed.
 554                  */
 555                 if (active_queue_cnt == 0) {
 556                         uint16_t saved_mru = vnic->mru;
 557
 558                         vnic->mru = 0;
 559                         /* Reconfigure default receive ring and MRU. */
 560                         bnxt_hwrm_vnic_cfg(bp, vnic);
 561                         vnic->mru = saved_mru;
 562                 } else {
 563                         /* Reconfigure default receive ring. */
 564                         bnxt_hwrm_vnic_cfg(bp, vnic);
 565                 }
 566         }
 567
 568         if (rc == 0)
 569                 bnxt_rx_queue_release_mbufs(rxq);
 570
 571         return rc;
 572 }