ceph/src/spdk/dpdk/drivers/net/hinic/base/hinic_pmd_cfg.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #ifndef _HINIC_PMD_CFG_H_
   6 #define _HINIC_PMD_CFG_H_
   7
   8 #define CFG_MAX_CMD_TIMEOUT     8000 /* ms */
   9
  10 #define IS_NIC_TYPE(dev) \
  11         ((dev)->cfg_mgmt->svc_cap.chip_svc_type & CFG_SVC_NIC_BIT0)
  12
  13 struct host_shared_resource_cap {
  14         u32 host_pctxs; /* Parent Context max 1M, IOE and FCoE max 8K flows */
  15         u32 host_cctxs; /* Child Context: max 8K */
  16         u32 host_scqs;  /* shared CQ, chip interface module uses 1 SCQ
  17                          * TOE/IOE/FCoE each uses 1 SCQ
  18                          * RoCE/IWARP uses multiple SCQs
  19                          * So 6 SCQ least
  20                          */
  21         u32 host_srqs; /* SRQ number: 256K */
  22         u32 host_mpts; /* MR number:1M */
  23 };
  24
  25 struct nic_service_cap {
  26         /* PF resources */
  27         u16 max_sqs;
  28         u16 max_rqs;
  29
  30         /* VF resources, VF obtain them through the MailBox mechanism from
  31          * corresponding PF
  32          */
  33         u16 vf_max_sqs;
  34         u16 vf_max_rqs;
  35
  36         bool lro_en;    /* LRO feature enable bit */
  37         u8 lro_sz;      /* LRO context space: n*16B */
  38         u8 tso_sz;      /* TSO context space: n*16B */
  39 };
  40
  41 /* service type relates define */
  42 enum cfg_svc_type_en {
  43         CFG_SVC_NIC_BIT0    = (1 << 0),
  44 };
  45
  46 /* device capability */
  47 struct service_cap {
  48         enum cfg_svc_type_en chip_svc_type;     /* HW supported service type */
  49
  50         /* Host global resources */
  51         u16 host_total_function;
  52         u8 host_oq_id_mask_val;
  53         u8 host_id;
  54         u8 ep_id;
  55         u8 intr_chip_en;
  56         u8 max_cos_id;  /* PF/VF's max cos id */
  57         u8 er_id;       /* PF/VF's ER */
  58         u8 port_id;     /* PF/VF's physical port */
  59         u8 max_vf;      /* max VF number that PF supported */
  60         bool sf_en;     /* stateful business status */
  61         u16 max_sqs;
  62         u16 max_rqs;
  63
  64         u32 pf_num;
  65         u32 pf_id_start;
  66         u32 vf_num;
  67         u32 vf_id_start;
  68
  69         struct host_shared_resource_cap shared_res_cap; /* shared capability */
  70         struct nic_service_cap      nic_cap;            /* NIC capability */
  71 };
  72
  73 struct cfg_mgmt_info {
  74         struct hinic_hwdev *hwdev;
  75         struct service_cap  svc_cap;
  76 };
  77
  78 struct hinic_dev_cap {
  79         struct hinic_mgmt_msg_head mgmt_msg_head;
  80
  81         /* Public resource */
  82         u8 sf_svc_attr;
  83         u8 host_id;
  84         u8 sf_en_pf;
  85         u8 sf_en_vf;
  86
  87         u8 ep_id;
  88         u8 intr_type;
  89         u8 max_cos_id;
  90         u8 er_id;
  91         u8 port_id;
  92         u8 max_vf;
  93         u16 svc_cap_en;
  94         u16 host_total_func;
  95         u8 host_oq_id_mask_val;
  96         u8 max_vf_cos_id;
  97
  98         u32 max_conn_num;
  99         u16 max_stick2cache_num;
 100         u16 max_bfilter_start_addr;
 101         u16 bfilter_len;
 102         u16 hash_bucket_num;
 103         u8 cfg_file_ver;
 104         u8 net_port_mode;
 105         u8 valid_cos_bitmap;    /* every bit indicate cos is valid */
 106         u8 rsvd1;
 107         u32 pf_num;
 108         u32 pf_id_start;
 109         u32 vf_num;
 110         u32 vf_id_start;
 111
 112         /* shared resource */
 113         u32 host_pctx_num;
 114         u8 host_sf_en;
 115         u8 rsvd2[3];
 116         u32 host_ccxt_num;
 117         u32 host_scq_num;
 118         u32 host_srq_num;
 119         u32 host_mpt_num;
 120
 121         /* l2nic */
 122         u16 nic_max_sq;
 123         u16 nic_max_rq;
 124         u16 nic_vf_max_sq;
 125         u16 nic_vf_max_rq;
 126         u8 nic_lro_en;
 127         u8 nic_lro_sz;
 128         u8 nic_tso_sz;
 129         u8 rsvd3;
 130
 131         u32 rsvd4[50];
 132 };
 133
 134 /* Obtain service_cap.nic_cap.dev_nic_cap.max_sqs */
 135 u16 hinic_func_max_qnum(void *hwdev);
 136
 137 int init_cfg_mgmt(struct hinic_hwdev *hwdev);
 138
 139 void free_cfg_mgmt(struct hinic_hwdev *hwdev);
 140
 141 int hinic_init_capability(struct hinic_hwdev *hwdev);
 142
 143 bool hinic_support_nic(struct hinic_hwdev *hwdev, struct nic_service_cap *cap);
 144
 145 #endif /* _HINIC_PMD_CFG_H_ */