ceph/src/spdk/dpdk/drivers/net/i40e/base/i40e_dcb.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2001-2020 Intel Corporation
   3  */
   4
   5 #ifndef _I40E_DCB_H_
   6 #define _I40E_DCB_H_
   7
   8 #include "i40e_type.h"
   9
  10 #define I40E_DCBX_OFFLOAD_DISABLED      0
  11 #define I40E_DCBX_OFFLOAD_ENABLED       1
  12
  13 #define I40E_DCBX_STATUS_NOT_STARTED    0
  14 #define I40E_DCBX_STATUS_IN_PROGRESS    1
  15 #define I40E_DCBX_STATUS_DONE           2
  16 #define I40E_DCBX_STATUS_MULTIPLE_PEERS 3
  17 #define I40E_DCBX_STATUS_DISABLED       7
  18
  19 #define I40E_TLV_TYPE_END               0
  20 #define I40E_TLV_TYPE_ORG               127
  21
  22 #define I40E_IEEE_8021QAZ_OUI           0x0080C2
  23 #define I40E_IEEE_SUBTYPE_ETS_CFG       9
  24 #define I40E_IEEE_SUBTYPE_ETS_REC       10
  25 #define I40E_IEEE_SUBTYPE_PFC_CFG       11
  26 #define I40E_IEEE_SUBTYPE_APP_PRI       12
  27
  28 #define I40E_CEE_DCBX_OUI               0x001b21
  29 #define I40E_CEE_DCBX_TYPE              2
  30
  31 #define I40E_CEE_SUBTYPE_CTRL           1
  32 #define I40E_CEE_SUBTYPE_PG_CFG         2
  33 #define I40E_CEE_SUBTYPE_PFC_CFG        3
  34 #define I40E_CEE_SUBTYPE_APP_PRI        4
  35
  36 #define I40E_CEE_MAX_FEAT_TYPE          3
  37 #define I40E_LLDP_ADMINSTATUS_DISABLED          0
  38 #define I40E_LLDP_ADMINSTATUS_ENABLED_RX        1
  39 #define I40E_LLDP_ADMINSTATUS_ENABLED_TX        2
  40 #define I40E_LLDP_ADMINSTATUS_ENABLED_RXTX      3
  41
  42 #define I40E_LLDP_CURRENT_STATUS_XL710_OFFSET   0x2B
  43 #define I40E_LLDP_CURRENT_STATUS_X722_OFFSET    0x31
  44 #define I40E_LLDP_CURRENT_STATUS_OFFSET         1
  45 #define I40E_LLDP_CURRENT_STATUS_SIZE           1
  46
  47 /* Defines for LLDP TLV header */
  48 #define I40E_LLDP_MIB_HLEN              14
  49 #define I40E_LLDP_TLV_LEN_SHIFT         0
  50 #define I40E_LLDP_TLV_LEN_MASK          (0x01FF << I40E_LLDP_TLV_LEN_SHIFT)
  51 #define I40E_LLDP_TLV_TYPE_SHIFT        9
  52 #define I40E_LLDP_TLV_TYPE_MASK         (0x7F << I40E_LLDP_TLV_TYPE_SHIFT)
  53 #define I40E_LLDP_TLV_SUBTYPE_SHIFT     0
  54 #define I40E_LLDP_TLV_SUBTYPE_MASK      (0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
  55 #define I40E_LLDP_TLV_OUI_SHIFT         8
  56 #define I40E_LLDP_TLV_OUI_MASK          (0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
  57
  58 /* Defines for IEEE ETS TLV */
  59 #define I40E_IEEE_ETS_MAXTC_SHIFT       0
  60 #define I40E_IEEE_ETS_MAXTC_MASK        (0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
  61 #define I40E_IEEE_ETS_CBS_SHIFT         6
  62 #define I40E_IEEE_ETS_CBS_MASK          BIT(I40E_IEEE_ETS_CBS_SHIFT)
  63 #define I40E_IEEE_ETS_WILLING_SHIFT     7
  64 #define I40E_IEEE_ETS_WILLING_MASK      BIT(I40E_IEEE_ETS_WILLING_SHIFT)
  65 #define I40E_IEEE_ETS_PRIO_0_SHIFT      0
  66 #define I40E_IEEE_ETS_PRIO_0_MASK       (0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
  67 #define I40E_IEEE_ETS_PRIO_1_SHIFT      4
  68 #define I40E_IEEE_ETS_PRIO_1_MASK       (0x7 << I40E_IEEE_ETS_PRIO_1_SHIFT)
  69 #define I40E_CEE_PGID_PRIO_0_SHIFT      0
  70 #define I40E_CEE_PGID_PRIO_0_MASK       (0xF << I40E_CEE_PGID_PRIO_0_SHIFT)
  71 #define I40E_CEE_PGID_PRIO_1_SHIFT      4
  72 #define I40E_CEE_PGID_PRIO_1_MASK       (0xF << I40E_CEE_PGID_PRIO_1_SHIFT)
  73 #define I40E_CEE_PGID_STRICT            15
  74
  75 /* Defines for IEEE TSA types */
  76 #define I40E_IEEE_TSA_STRICT            0
  77 #define I40E_IEEE_TSA_CBS               1
  78 #define I40E_IEEE_TSA_ETS               2
  79 #define I40E_IEEE_TSA_VENDOR            255
  80
  81 /* Defines for IEEE PFC TLV */
  82 #define I40E_IEEE_PFC_CAP_SHIFT         0
  83 #define I40E_IEEE_PFC_CAP_MASK          (0xF << I40E_IEEE_PFC_CAP_SHIFT)
  84 #define I40E_IEEE_PFC_MBC_SHIFT         6
  85 #define I40E_IEEE_PFC_MBC_MASK          BIT(I40E_IEEE_PFC_MBC_SHIFT)
  86 #define I40E_IEEE_PFC_WILLING_SHIFT     7
  87 #define I40E_IEEE_PFC_WILLING_MASK      BIT(I40E_IEEE_PFC_WILLING_SHIFT)
  88
  89 /* Defines for IEEE APP TLV */
  90 #define I40E_IEEE_APP_SEL_SHIFT         0
  91 #define I40E_IEEE_APP_SEL_MASK          (0x7 << I40E_IEEE_APP_SEL_SHIFT)
  92 #define I40E_IEEE_APP_PRIO_SHIFT        5
  93 #define I40E_IEEE_APP_PRIO_MASK         (0x7 << I40E_IEEE_APP_PRIO_SHIFT)
  94
  95 /* TLV definitions for preparing MIB */
  96 #define I40E_TLV_ID_CHASSIS_ID          0
  97 #define I40E_TLV_ID_PORT_ID             1
  98 #define I40E_TLV_ID_TIME_TO_LIVE        2
  99 #define I40E_IEEE_TLV_ID_ETS_CFG        3
 100 #define I40E_IEEE_TLV_ID_ETS_REC        4
 101 #define I40E_IEEE_TLV_ID_PFC_CFG        5
 102 #define I40E_IEEE_TLV_ID_APP_PRI        6
 103 #define I40E_TLV_ID_END_OF_LLDPPDU      7
 104 #define I40E_TLV_ID_START               I40E_IEEE_TLV_ID_ETS_CFG
 105
 106 #define I40E_IEEE_ETS_TLV_LENGTH        25
 107 #define I40E_IEEE_PFC_TLV_LENGTH        6
 108 #define I40E_IEEE_APP_TLV_LENGTH        11
 109
 110 #pragma pack(1)
 111
 112 /* IEEE 802.1AB LLDP TLV structure */
 113 struct i40e_lldp_generic_tlv {
 114         __be16 typelength;
 115         u8 tlvinfo[1];
 116 };
 117
 118 /* IEEE 802.1AB LLDP Organization specific TLV */
 119 struct i40e_lldp_org_tlv {
 120         __be16 typelength;
 121         __be32 ouisubtype;
 122         u8 tlvinfo[1];
 123 };
 124
 125 struct i40e_cee_tlv_hdr {
 126         __be16 typelen;
 127         u8 operver;
 128         u8 maxver;
 129 };
 130
 131 struct i40e_cee_ctrl_tlv {
 132         struct i40e_cee_tlv_hdr hdr;
 133         __be32 seqno;
 134         __be32 ackno;
 135 };
 136
 137 struct i40e_cee_feat_tlv {
 138         struct i40e_cee_tlv_hdr hdr;
 139         u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
 140 #define I40E_CEE_FEAT_TLV_ENABLE_MASK   0x80
 141 #define I40E_CEE_FEAT_TLV_WILLING_MASK  0x40
 142 #define I40E_CEE_FEAT_TLV_ERR_MASK      0x20
 143         u8 subtype;
 144         u8 tlvinfo[1];
 145 };
 146
 147 struct i40e_cee_app_prio {
 148         __be16 protocol;
 149         u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
 150 #define I40E_CEE_APP_SELECTOR_MASK      0x03
 151         __be16 lower_oui;
 152         u8 prio_map;
 153 };
 154 #pragma pack()
 155
 156 /*
 157  * TODO: The below structures related LLDP/DCBX variables
 158  * and statistics are defined but need to find how to get
 159  * the required information from the Firmware to use them
 160  */
 161
 162 /* IEEE 802.1AB LLDP Agent Statistics */
 163 struct i40e_lldp_stats {
 164         u64 remtablelastchangetime;
 165         u64 remtableinserts;
 166         u64 remtabledeletes;
 167         u64 remtabledrops;
 168         u64 remtableageouts;
 169         u64 txframestotal;
 170         u64 rxframesdiscarded;
 171         u64 rxportframeerrors;
 172         u64 rxportframestotal;
 173         u64 rxporttlvsdiscardedtotal;
 174         u64 rxporttlvsunrecognizedtotal;
 175         u64 remtoomanyneighbors;
 176 };
 177
 178 /* IEEE 802.1Qaz DCBX variables */
 179 struct i40e_dcbx_variables {
 180         u32 defmaxtrafficclasses;
 181         u32 defprioritytcmapping;
 182         u32 deftcbandwidth;
 183         u32 deftsaassignment;
 184 };
 185
 186
 187 enum i40e_get_fw_lldp_status_resp {
 188         I40E_GET_FW_LLDP_STATUS_DISABLED = 0,
 189         I40E_GET_FW_LLDP_STATUS_ENABLED = 1
 190 };
 191
 192 enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw,
 193                                            u16 *status);
 194 enum i40e_status_code i40e_lldp_to_dcb_config(u8 *lldpmib,
 195                                               struct i40e_dcbx_config *dcbcfg);
 196 enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
 197                                              u8 bridgetype,
 198                                              struct i40e_dcbx_config *dcbcfg);
 199 enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw);
 200 enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw,
 201                                     bool enable_mib_change);
 202 enum i40e_status_code
 203 i40e_get_fw_lldp_status(struct i40e_hw *hw,
 204                         enum i40e_get_fw_lldp_status_resp *lldp_status);
 205 enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw);
 206 enum i40e_status_code i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen,
 207                                               struct i40e_dcbx_config *dcbcfg);
 208 #endif /* _I40E_DCB_H_ */