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[ceph.git] / ceph / src / spdk / dpdk / drivers / net / i40e / i40e_rxtx.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
3 */
4
5 #ifndef _I40E_RXTX_H_
6 #define _I40E_RXTX_H_
7
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
10
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
17
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
20
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
23
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
26
27 #define I40E_MIN_TSO_MSS 256
28 #define I40E_MAX_TSO_MSS 9674
29
30 #define I40E_TX_MAX_SEG UINT8_MAX
31 #define I40E_TX_MAX_MTU_SEG 8
32
33 #define I40E_TX_MIN_PKT_LEN 17
34
35 #undef container_of
36 #define container_of(ptr, type, member) ({ \
37 typeof(((type *)0)->member)(*__mptr) = (ptr); \
38 (type *)((char *)__mptr - offsetof(type, member)); })
39
40 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
41 I40E_TX_DESC_CMD_EOP)
42
43 enum i40e_header_split_mode {
44 i40e_header_split_none = 0,
45 i40e_header_split_enabled = 1,
46 i40e_header_split_always = 2,
47 i40e_header_split_reserved
48 };
49
50 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
51 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
52 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
53 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
54 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
55 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
56 I40E_HEADER_SPLIT_IP | \
57 I40E_HEADER_SPLIT_UDP_TCP | \
58 I40E_HEADER_SPLIT_SCTP)
59
60 /* HW desc structure, both 16-byte and 32-byte types are supported */
61 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
62 #define i40e_rx_desc i40e_16byte_rx_desc
63 #else
64 #define i40e_rx_desc i40e_32byte_rx_desc
65 #endif
66
67 struct i40e_rx_entry {
68 struct rte_mbuf *mbuf;
69 };
70
71 /*
72 * Structure associated with each RX queue.
73 */
74 struct i40e_rx_queue {
75 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
76 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
77 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
78 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
79 uint16_t nb_rx_desc; /**< number of RX descriptors */
80 uint16_t rx_free_thresh; /**< max free RX desc to hold */
81 uint16_t rx_tail; /**< current value of tail */
82 uint16_t nb_rx_hold; /**< number of held free RX desc */
83 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
84 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
85 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
86 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
87 uint16_t rx_nb_avail; /**< number of staged packets ready */
88 uint16_t rx_next_avail; /**< index of next staged packets */
89 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
90 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
91 #endif
92
93 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
94 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
95 uint64_t mbuf_initializer; /**< value to init mbufs */
96
97 uint16_t port_id; /**< device port ID */
98 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
99 uint16_t queue_id; /**< RX queue index */
100 uint16_t reg_idx; /**< RX queue register index */
101 uint8_t drop_en; /**< if not 0, set register bit */
102 volatile uint8_t *qrx_tail; /**< register address of tail */
103 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
104 uint16_t rx_buf_len; /* The packet buffer size */
105 uint16_t rx_hdr_len; /* The header buffer size */
106 uint16_t max_pkt_len; /* Maximum packet length */
107 uint8_t hs_mode; /* Header Split mode */
108 bool q_set; /**< indicate if rx queue has been configured */
109 bool rx_deferred_start; /**< don't start this queue in dev start */
110 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
111 uint8_t dcb_tc; /**< Traffic class of rx queue */
112 uint64_t offloads; /**< Rx offload flags of DEV_RX_OFFLOAD_* */
113 };
114
115 struct i40e_tx_entry {
116 struct rte_mbuf *mbuf;
117 uint16_t next_id;
118 uint16_t last_id;
119 };
120
121 /*
122 * Structure associated with each TX queue.
123 */
124 struct i40e_tx_queue {
125 uint16_t nb_tx_desc; /**< number of TX descriptors */
126 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
127 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
128 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
129 uint16_t tx_tail; /**< current value of tail register */
130 volatile uint8_t *qtx_tail; /**< register address of tail */
131 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
132 /**< index to last TX descriptor to have been cleaned */
133 uint16_t last_desc_cleaned;
134 /**< Total number of TX descriptors ready to be allocated. */
135 uint16_t nb_tx_free;
136 /**< Start freeing TX buffers if there are less free descriptors than
137 this value. */
138 uint16_t tx_free_thresh;
139 /** Number of TX descriptors to use before RS bit is set. */
140 uint16_t tx_rs_thresh;
141 uint8_t pthresh; /**< Prefetch threshold register. */
142 uint8_t hthresh; /**< Host threshold register. */
143 uint8_t wthresh; /**< Write-back threshold reg. */
144 uint16_t port_id; /**< Device port identifier. */
145 uint16_t queue_id; /**< TX queue index. */
146 uint16_t reg_idx;
147 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
148 uint16_t tx_next_dd;
149 uint16_t tx_next_rs;
150 bool q_set; /**< indicate if tx queue has been configured */
151 bool tx_deferred_start; /**< don't start this queue in dev start */
152 uint8_t dcb_tc; /**< Traffic class of tx queue */
153 uint64_t offloads; /**< Tx offload flags of DEV_RX_OFFLOAD_* */
154 };
155
156 /** Offload features */
157 union i40e_tx_offload {
158 uint64_t data;
159 struct {
160 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
161 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
162 uint64_t l4_len:8; /**< L4 Header Length. */
163 uint64_t tso_segsz:16; /**< TCP TSO segment size */
164 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
165 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
166 };
167 };
168
169 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
170 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
171 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
172 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
173 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
174 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
175 uint16_t queue_idx,
176 uint16_t nb_desc,
177 unsigned int socket_id,
178 const struct rte_eth_rxconf *rx_conf,
179 struct rte_mempool *mp);
180 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
181 uint16_t queue_idx,
182 uint16_t nb_desc,
183 unsigned int socket_id,
184 const struct rte_eth_txconf *tx_conf);
185 void i40e_dev_rx_queue_release(void *rxq);
186 void i40e_dev_tx_queue_release(void *txq);
187 uint16_t i40e_recv_pkts(void *rx_queue,
188 struct rte_mbuf **rx_pkts,
189 uint16_t nb_pkts);
190 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
191 struct rte_mbuf **rx_pkts,
192 uint16_t nb_pkts);
193 uint16_t i40e_xmit_pkts(void *tx_queue,
194 struct rte_mbuf **tx_pkts,
195 uint16_t nb_pkts);
196 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
197 uint16_t nb_pkts);
198 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
199 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
200 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
201 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
202 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
203 void i40e_dev_free_queues(struct rte_eth_dev *dev);
204 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
205 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
206 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
207 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
208 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
209
210 uint32_t i40e_dev_rx_queue_count(struct rte_eth_dev *dev,
211 uint16_t rx_queue_id);
212 int i40e_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
213 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
214 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
215
216 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
217 uint16_t nb_pkts);
218 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
219 struct rte_mbuf **rx_pkts,
220 uint16_t nb_pkts);
221 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
222 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
223 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
224 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
225 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
226 uint16_t nb_pkts);
227 void i40e_set_rx_function(struct rte_eth_dev *dev);
228 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
229 struct i40e_tx_queue *txq);
230 void i40e_set_tx_function(struct rte_eth_dev *dev);
231 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
232 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
233 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
234 uint16_t nb_pkts);
235 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
236 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
237 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
238 uint16_t nb_pkts);
239
240 /* For each value it means, datasheet of hardware can tell more details
241 *
242 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
243 */
244 static inline uint32_t
245 i40e_get_default_pkt_type(uint8_t ptype)
246 {
247 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
248 /* L2 types */
249 /* [0] reserved */
250 [1] = RTE_PTYPE_L2_ETHER,
251 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
252 /* [3] - [5] reserved */
253 [6] = RTE_PTYPE_L2_ETHER_LLDP,
254 /* [7] - [10] reserved */
255 [11] = RTE_PTYPE_L2_ETHER_ARP,
256 /* [12] - [21] reserved */
257
258 /* Non tunneled IPv4 */
259 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
260 RTE_PTYPE_L4_FRAG,
261 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
262 RTE_PTYPE_L4_NONFRAG,
263 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
264 RTE_PTYPE_L4_UDP,
265 /* [25] reserved */
266 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
267 RTE_PTYPE_L4_TCP,
268 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
269 RTE_PTYPE_L4_SCTP,
270 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
271 RTE_PTYPE_L4_ICMP,
272
273 /* IPv4 --> IPv4 */
274 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
275 RTE_PTYPE_TUNNEL_IP |
276 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
277 RTE_PTYPE_INNER_L4_FRAG,
278 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
279 RTE_PTYPE_TUNNEL_IP |
280 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
281 RTE_PTYPE_INNER_L4_NONFRAG,
282 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
283 RTE_PTYPE_TUNNEL_IP |
284 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
285 RTE_PTYPE_INNER_L4_UDP,
286 /* [32] reserved */
287 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
288 RTE_PTYPE_TUNNEL_IP |
289 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
290 RTE_PTYPE_INNER_L4_TCP,
291 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
292 RTE_PTYPE_TUNNEL_IP |
293 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
294 RTE_PTYPE_INNER_L4_SCTP,
295 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
296 RTE_PTYPE_TUNNEL_IP |
297 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
298 RTE_PTYPE_INNER_L4_ICMP,
299
300 /* IPv4 --> IPv6 */
301 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
302 RTE_PTYPE_TUNNEL_IP |
303 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
304 RTE_PTYPE_INNER_L4_FRAG,
305 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
306 RTE_PTYPE_TUNNEL_IP |
307 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
308 RTE_PTYPE_INNER_L4_NONFRAG,
309 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
310 RTE_PTYPE_TUNNEL_IP |
311 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
312 RTE_PTYPE_INNER_L4_UDP,
313 /* [39] reserved */
314 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
315 RTE_PTYPE_TUNNEL_IP |
316 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
317 RTE_PTYPE_INNER_L4_TCP,
318 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
319 RTE_PTYPE_TUNNEL_IP |
320 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
321 RTE_PTYPE_INNER_L4_SCTP,
322 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
323 RTE_PTYPE_TUNNEL_IP |
324 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
325 RTE_PTYPE_INNER_L4_ICMP,
326
327 /* IPv4 --> GRE/Teredo/VXLAN */
328 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
329 RTE_PTYPE_TUNNEL_GRENAT,
330
331 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
332 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
333 RTE_PTYPE_TUNNEL_GRENAT |
334 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
335 RTE_PTYPE_INNER_L4_FRAG,
336 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
337 RTE_PTYPE_TUNNEL_GRENAT |
338 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
339 RTE_PTYPE_INNER_L4_NONFRAG,
340 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
341 RTE_PTYPE_TUNNEL_GRENAT |
342 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
343 RTE_PTYPE_INNER_L4_UDP,
344 /* [47] reserved */
345 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
346 RTE_PTYPE_TUNNEL_GRENAT |
347 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
348 RTE_PTYPE_INNER_L4_TCP,
349 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
350 RTE_PTYPE_TUNNEL_GRENAT |
351 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
352 RTE_PTYPE_INNER_L4_SCTP,
353 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
354 RTE_PTYPE_TUNNEL_GRENAT |
355 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
356 RTE_PTYPE_INNER_L4_ICMP,
357
358 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
359 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
360 RTE_PTYPE_TUNNEL_GRENAT |
361 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
362 RTE_PTYPE_INNER_L4_FRAG,
363 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
364 RTE_PTYPE_TUNNEL_GRENAT |
365 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
366 RTE_PTYPE_INNER_L4_NONFRAG,
367 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
368 RTE_PTYPE_TUNNEL_GRENAT |
369 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
370 RTE_PTYPE_INNER_L4_UDP,
371 /* [54] reserved */
372 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
373 RTE_PTYPE_TUNNEL_GRENAT |
374 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
375 RTE_PTYPE_INNER_L4_TCP,
376 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
377 RTE_PTYPE_TUNNEL_GRENAT |
378 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
379 RTE_PTYPE_INNER_L4_SCTP,
380 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
381 RTE_PTYPE_TUNNEL_GRENAT |
382 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
383 RTE_PTYPE_INNER_L4_ICMP,
384
385 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
386 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
387 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
388
389 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
390 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
391 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
392 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
393 RTE_PTYPE_INNER_L4_FRAG,
394 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
395 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
396 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
397 RTE_PTYPE_INNER_L4_NONFRAG,
398 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
399 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
400 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
401 RTE_PTYPE_INNER_L4_UDP,
402 /* [62] reserved */
403 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
404 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
405 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
406 RTE_PTYPE_INNER_L4_TCP,
407 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
408 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
409 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
410 RTE_PTYPE_INNER_L4_SCTP,
411 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
412 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
413 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
414 RTE_PTYPE_INNER_L4_ICMP,
415
416 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
417 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
418 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
419 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
420 RTE_PTYPE_INNER_L4_FRAG,
421 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
422 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
423 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
424 RTE_PTYPE_INNER_L4_NONFRAG,
425 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
426 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
427 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
428 RTE_PTYPE_INNER_L4_UDP,
429 /* [69] reserved */
430 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
431 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
432 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
433 RTE_PTYPE_INNER_L4_TCP,
434 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
435 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
436 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
437 RTE_PTYPE_INNER_L4_SCTP,
438 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
439 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
440 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
441 RTE_PTYPE_INNER_L4_ICMP,
442
443 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
444 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
445 RTE_PTYPE_TUNNEL_GRENAT |
446 RTE_PTYPE_INNER_L2_ETHER_VLAN,
447
448 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
449 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
450 RTE_PTYPE_TUNNEL_GRENAT |
451 RTE_PTYPE_INNER_L2_ETHER_VLAN |
452 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
453 RTE_PTYPE_INNER_L4_FRAG,
454 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
455 RTE_PTYPE_TUNNEL_GRENAT |
456 RTE_PTYPE_INNER_L2_ETHER_VLAN |
457 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
458 RTE_PTYPE_INNER_L4_NONFRAG,
459 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
460 RTE_PTYPE_TUNNEL_GRENAT |
461 RTE_PTYPE_INNER_L2_ETHER_VLAN |
462 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
463 RTE_PTYPE_INNER_L4_UDP,
464 /* [77] reserved */
465 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
466 RTE_PTYPE_TUNNEL_GRENAT |
467 RTE_PTYPE_INNER_L2_ETHER_VLAN |
468 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
469 RTE_PTYPE_INNER_L4_TCP,
470 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
471 RTE_PTYPE_TUNNEL_GRENAT |
472 RTE_PTYPE_INNER_L2_ETHER_VLAN |
473 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
474 RTE_PTYPE_INNER_L4_SCTP,
475 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
476 RTE_PTYPE_TUNNEL_GRENAT |
477 RTE_PTYPE_INNER_L2_ETHER_VLAN |
478 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
479 RTE_PTYPE_INNER_L4_ICMP,
480
481 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
482 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
483 RTE_PTYPE_TUNNEL_GRENAT |
484 RTE_PTYPE_INNER_L2_ETHER_VLAN |
485 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
486 RTE_PTYPE_INNER_L4_FRAG,
487 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
488 RTE_PTYPE_TUNNEL_GRENAT |
489 RTE_PTYPE_INNER_L2_ETHER_VLAN |
490 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
491 RTE_PTYPE_INNER_L4_NONFRAG,
492 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
493 RTE_PTYPE_TUNNEL_GRENAT |
494 RTE_PTYPE_INNER_L2_ETHER_VLAN |
495 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
496 RTE_PTYPE_INNER_L4_UDP,
497 /* [84] reserved */
498 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
499 RTE_PTYPE_TUNNEL_GRENAT |
500 RTE_PTYPE_INNER_L2_ETHER_VLAN |
501 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
502 RTE_PTYPE_INNER_L4_TCP,
503 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
504 RTE_PTYPE_TUNNEL_GRENAT |
505 RTE_PTYPE_INNER_L2_ETHER_VLAN |
506 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
507 RTE_PTYPE_INNER_L4_SCTP,
508 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
509 RTE_PTYPE_TUNNEL_GRENAT |
510 RTE_PTYPE_INNER_L2_ETHER_VLAN |
511 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
512 RTE_PTYPE_INNER_L4_ICMP,
513
514 /* Non tunneled IPv6 */
515 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
516 RTE_PTYPE_L4_FRAG,
517 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
518 RTE_PTYPE_L4_NONFRAG,
519 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
520 RTE_PTYPE_L4_UDP,
521 /* [91] reserved */
522 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
523 RTE_PTYPE_L4_TCP,
524 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
525 RTE_PTYPE_L4_SCTP,
526 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
527 RTE_PTYPE_L4_ICMP,
528
529 /* IPv6 --> IPv4 */
530 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
531 RTE_PTYPE_TUNNEL_IP |
532 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
533 RTE_PTYPE_INNER_L4_FRAG,
534 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
535 RTE_PTYPE_TUNNEL_IP |
536 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
537 RTE_PTYPE_INNER_L4_NONFRAG,
538 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
539 RTE_PTYPE_TUNNEL_IP |
540 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
541 RTE_PTYPE_INNER_L4_UDP,
542 /* [98] reserved */
543 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
544 RTE_PTYPE_TUNNEL_IP |
545 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
546 RTE_PTYPE_INNER_L4_TCP,
547 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
548 RTE_PTYPE_TUNNEL_IP |
549 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
550 RTE_PTYPE_INNER_L4_SCTP,
551 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
552 RTE_PTYPE_TUNNEL_IP |
553 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
554 RTE_PTYPE_INNER_L4_ICMP,
555
556 /* IPv6 --> IPv6 */
557 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
558 RTE_PTYPE_TUNNEL_IP |
559 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
560 RTE_PTYPE_INNER_L4_FRAG,
561 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
562 RTE_PTYPE_TUNNEL_IP |
563 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
564 RTE_PTYPE_INNER_L4_NONFRAG,
565 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
566 RTE_PTYPE_TUNNEL_IP |
567 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
568 RTE_PTYPE_INNER_L4_UDP,
569 /* [105] reserved */
570 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
571 RTE_PTYPE_TUNNEL_IP |
572 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
573 RTE_PTYPE_INNER_L4_TCP,
574 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
575 RTE_PTYPE_TUNNEL_IP |
576 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
577 RTE_PTYPE_INNER_L4_SCTP,
578 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
579 RTE_PTYPE_TUNNEL_IP |
580 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
581 RTE_PTYPE_INNER_L4_ICMP,
582
583 /* IPv6 --> GRE/Teredo/VXLAN */
584 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
585 RTE_PTYPE_TUNNEL_GRENAT,
586
587 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
588 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
589 RTE_PTYPE_TUNNEL_GRENAT |
590 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
591 RTE_PTYPE_INNER_L4_FRAG,
592 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
593 RTE_PTYPE_TUNNEL_GRENAT |
594 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
595 RTE_PTYPE_INNER_L4_NONFRAG,
596 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
597 RTE_PTYPE_TUNNEL_GRENAT |
598 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
599 RTE_PTYPE_INNER_L4_UDP,
600 /* [113] reserved */
601 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
602 RTE_PTYPE_TUNNEL_GRENAT |
603 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
604 RTE_PTYPE_INNER_L4_TCP,
605 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
606 RTE_PTYPE_TUNNEL_GRENAT |
607 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
608 RTE_PTYPE_INNER_L4_SCTP,
609 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
610 RTE_PTYPE_TUNNEL_GRENAT |
611 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
612 RTE_PTYPE_INNER_L4_ICMP,
613
614 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
615 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
616 RTE_PTYPE_TUNNEL_GRENAT |
617 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
618 RTE_PTYPE_INNER_L4_FRAG,
619 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
620 RTE_PTYPE_TUNNEL_GRENAT |
621 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
622 RTE_PTYPE_INNER_L4_NONFRAG,
623 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
624 RTE_PTYPE_TUNNEL_GRENAT |
625 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
626 RTE_PTYPE_INNER_L4_UDP,
627 /* [120] reserved */
628 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
629 RTE_PTYPE_TUNNEL_GRENAT |
630 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
631 RTE_PTYPE_INNER_L4_TCP,
632 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
633 RTE_PTYPE_TUNNEL_GRENAT |
634 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
635 RTE_PTYPE_INNER_L4_SCTP,
636 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
637 RTE_PTYPE_TUNNEL_GRENAT |
638 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
639 RTE_PTYPE_INNER_L4_ICMP,
640
641 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
642 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
643 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
644
645 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
646 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
647 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
648 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
649 RTE_PTYPE_INNER_L4_FRAG,
650 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
651 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
652 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
653 RTE_PTYPE_INNER_L4_NONFRAG,
654 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
655 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
656 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
657 RTE_PTYPE_INNER_L4_UDP,
658 /* [128] reserved */
659 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
660 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
661 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
662 RTE_PTYPE_INNER_L4_TCP,
663 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
664 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
665 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
666 RTE_PTYPE_INNER_L4_SCTP,
667 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
668 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
669 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
670 RTE_PTYPE_INNER_L4_ICMP,
671
672 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
673 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
674 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
675 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
676 RTE_PTYPE_INNER_L4_FRAG,
677 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
678 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
679 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
680 RTE_PTYPE_INNER_L4_NONFRAG,
681 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
682 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
683 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
684 RTE_PTYPE_INNER_L4_UDP,
685 /* [135] reserved */
686 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
687 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
688 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
689 RTE_PTYPE_INNER_L4_TCP,
690 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
691 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
692 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
693 RTE_PTYPE_INNER_L4_SCTP,
694 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
695 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
696 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
697 RTE_PTYPE_INNER_L4_ICMP,
698
699 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
700 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
701 RTE_PTYPE_TUNNEL_GRENAT |
702 RTE_PTYPE_INNER_L2_ETHER_VLAN,
703
704 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
705 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
706 RTE_PTYPE_TUNNEL_GRENAT |
707 RTE_PTYPE_INNER_L2_ETHER_VLAN |
708 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
709 RTE_PTYPE_INNER_L4_FRAG,
710 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
711 RTE_PTYPE_TUNNEL_GRENAT |
712 RTE_PTYPE_INNER_L2_ETHER_VLAN |
713 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
714 RTE_PTYPE_INNER_L4_NONFRAG,
715 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
716 RTE_PTYPE_TUNNEL_GRENAT |
717 RTE_PTYPE_INNER_L2_ETHER_VLAN |
718 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
719 RTE_PTYPE_INNER_L4_UDP,
720 /* [143] reserved */
721 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
722 RTE_PTYPE_TUNNEL_GRENAT |
723 RTE_PTYPE_INNER_L2_ETHER_VLAN |
724 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
725 RTE_PTYPE_INNER_L4_TCP,
726 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
727 RTE_PTYPE_TUNNEL_GRENAT |
728 RTE_PTYPE_INNER_L2_ETHER_VLAN |
729 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
730 RTE_PTYPE_INNER_L4_SCTP,
731 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
732 RTE_PTYPE_TUNNEL_GRENAT |
733 RTE_PTYPE_INNER_L2_ETHER_VLAN |
734 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
735 RTE_PTYPE_INNER_L4_ICMP,
736
737 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
738 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
739 RTE_PTYPE_TUNNEL_GRENAT |
740 RTE_PTYPE_INNER_L2_ETHER_VLAN |
741 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
742 RTE_PTYPE_INNER_L4_FRAG,
743 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
744 RTE_PTYPE_TUNNEL_GRENAT |
745 RTE_PTYPE_INNER_L2_ETHER_VLAN |
746 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
747 RTE_PTYPE_INNER_L4_NONFRAG,
748 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
749 RTE_PTYPE_TUNNEL_GRENAT |
750 RTE_PTYPE_INNER_L2_ETHER_VLAN |
751 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
752 RTE_PTYPE_INNER_L4_UDP,
753 /* [150] reserved */
754 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
755 RTE_PTYPE_TUNNEL_GRENAT |
756 RTE_PTYPE_INNER_L2_ETHER_VLAN |
757 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
758 RTE_PTYPE_INNER_L4_TCP,
759 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
760 RTE_PTYPE_TUNNEL_GRENAT |
761 RTE_PTYPE_INNER_L2_ETHER_VLAN |
762 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
763 RTE_PTYPE_INNER_L4_SCTP,
764 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
765 RTE_PTYPE_TUNNEL_GRENAT |
766 RTE_PTYPE_INNER_L2_ETHER_VLAN |
767 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
768 RTE_PTYPE_INNER_L4_ICMP,
769
770 /* L2 NSH packet type */
771 [154] = RTE_PTYPE_L2_ETHER_NSH,
772 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
773 RTE_PTYPE_L4_FRAG,
774 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
775 RTE_PTYPE_L4_NONFRAG,
776 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
777 RTE_PTYPE_L4_UDP,
778 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
779 RTE_PTYPE_L4_TCP,
780 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
781 RTE_PTYPE_L4_SCTP,
782 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
783 RTE_PTYPE_L4_ICMP,
784 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
785 RTE_PTYPE_L4_FRAG,
786 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
787 RTE_PTYPE_L4_NONFRAG,
788 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
789 RTE_PTYPE_L4_UDP,
790 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
791 RTE_PTYPE_L4_TCP,
792 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
793 RTE_PTYPE_L4_SCTP,
794 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
795 RTE_PTYPE_L4_ICMP,
796
797 /* All others reserved */
798 };
799
800 return type_table[ptype];
801 }
802
803 #endif /* _I40E_RXTX_H_ */
Ceph