ceph/src/spdk/dpdk/drivers/net/ifc/base/ifcvf.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #ifndef _IFCVF_H_
   6 #define _IFCVF_H_
   7
   8 #include "ifcvf_osdep.h"
   9
  10 #define IFCVF_VENDOR_ID         0x1AF4
  11 #define IFCVF_DEVICE_ID         0x1041
  12 #define IFCVF_SUBSYS_VENDOR_ID  0x8086
  13 #define IFCVF_SUBSYS_DEVICE_ID  0x001A
  14
  15 #define IFCVF_MAX_QUEUES                1
  16 #define VIRTIO_F_IOMMU_PLATFORM         33
  17
  18 /* Common configuration */
  19 #define IFCVF_PCI_CAP_COMMON_CFG        1
  20 /* Notifications */
  21 #define IFCVF_PCI_CAP_NOTIFY_CFG        2
  22 /* ISR Status */
  23 #define IFCVF_PCI_CAP_ISR_CFG           3
  24 /* Device specific configuration */
  25 #define IFCVF_PCI_CAP_DEVICE_CFG        4
  26 /* PCI configuration access */
  27 #define IFCVF_PCI_CAP_PCI_CFG           5
  28
  29 #define IFCVF_CONFIG_STATUS_RESET     0x00
  30 #define IFCVF_CONFIG_STATUS_ACK       0x01
  31 #define IFCVF_CONFIG_STATUS_DRIVER    0x02
  32 #define IFCVF_CONFIG_STATUS_DRIVER_OK 0x04
  33 #define IFCVF_CONFIG_STATUS_FEATURES_OK 0x08
  34 #define IFCVF_CONFIG_STATUS_FAILED    0x80
  35
  36 #define IFCVF_MSI_NO_VECTOR     0xffff
  37 #define IFCVF_PCI_MAX_RESOURCE  6
  38
  39 #define IFCVF_LM_CFG_SIZE               0x40
  40 #define IFCVF_LM_RING_STATE_OFFSET      0x20
  41
  42 #define IFCVF_LM_LOGGING_CTRL           0x0
  43
  44 #define IFCVF_LM_BASE_ADDR_LOW          0x10
  45 #define IFCVF_LM_BASE_ADDR_HIGH         0x14
  46 #define IFCVF_LM_END_ADDR_LOW           0x18
  47 #define IFCVF_LM_END_ADDR_HIGH          0x1c
  48
  49 #define IFCVF_LM_DISABLE                0x0
  50 #define IFCVF_LM_ENABLE_VF              0x1
  51 #define IFCVF_LM_ENABLE_PF              0x3
  52 #define IFCVF_LOG_BASE                  0x100000000000
  53 #define IFCVF_MEDIATED_VRING            0x200000000000
  54
  55 #define IFCVF_32_BIT_MASK               0xffffffff
  56
  57
  58 struct ifcvf_pci_cap {
  59         u8 cap_vndr;            /* Generic PCI field: PCI_CAP_ID_VNDR */
  60         u8 cap_next;            /* Generic PCI field: next ptr. */
  61         u8 cap_len;             /* Generic PCI field: capability length */
  62         u8 cfg_type;            /* Identifies the structure. */
  63         u8 bar;                 /* Where to find it. */
  64         u8 padding[3];          /* Pad to full dword. */
  65         u32 offset;             /* Offset within bar. */
  66         u32 length;             /* Length of the structure, in bytes. */
  67 };
  68
  69 struct ifcvf_pci_notify_cap {
  70         struct ifcvf_pci_cap cap;
  71         u32 notify_off_multiplier;  /* Multiplier for queue_notify_off. */
  72 };
  73
  74 struct ifcvf_pci_common_cfg {
  75         /* About the whole device. */
  76         u32 device_feature_select;
  77         u32 device_feature;
  78         u32 guest_feature_select;
  79         u32 guest_feature;
  80         u16 msix_config;
  81         u16 num_queues;
  82         u8 device_status;
  83         u8 config_generation;
  84
  85         /* About a specific virtqueue. */
  86         u16 queue_select;
  87         u16 queue_size;
  88         u16 queue_msix_vector;
  89         u16 queue_enable;
  90         u16 queue_notify_off;
  91         u32 queue_desc_lo;
  92         u32 queue_desc_hi;
  93         u32 queue_avail_lo;
  94         u32 queue_avail_hi;
  95         u32 queue_used_lo;
  96         u32 queue_used_hi;
  97 };
  98
  99 struct ifcvf_net_config {
 100         u8    mac[6];
 101         u16   status;
 102         u16   max_virtqueue_pairs;
 103 } __attribute__((packed));
 104
 105 struct ifcvf_pci_mem_resource {
 106         u64      phys_addr; /**< Physical address, 0 if not resource. */
 107         u64      len;       /**< Length of the resource. */
 108         u8       *addr;     /**< Virtual address, NULL when not mapped. */
 109 };
 110
 111 struct vring_info {
 112         u64 desc;
 113         u64 avail;
 114         u64 used;
 115         u16 size;
 116         u16 last_avail_idx;
 117         u16 last_used_idx;
 118 };
 119
 120 struct ifcvf_hw {
 121         u64    req_features;
 122         u8     notify_region;
 123         u32    notify_off_multiplier;
 124         struct ifcvf_pci_common_cfg *common_cfg;
 125         struct ifcvf_net_config *dev_cfg;
 126         u8     *isr;
 127         u16    *notify_base;
 128         u16    *notify_addr[IFCVF_MAX_QUEUES * 2];
 129         u8     *lm_cfg;
 130         struct vring_info vring[IFCVF_MAX_QUEUES * 2];
 131         u8 nr_vring;
 132         struct ifcvf_pci_mem_resource mem_resource[IFCVF_PCI_MAX_RESOURCE];
 133 };
 134
 135 int
 136 ifcvf_init_hw(struct ifcvf_hw *hw, PCI_DEV *dev);
 137
 138 u64
 139 ifcvf_get_features(struct ifcvf_hw *hw);
 140
 141 int
 142 ifcvf_start_hw(struct ifcvf_hw *hw);
 143
 144 void
 145 ifcvf_stop_hw(struct ifcvf_hw *hw);
 146
 147 void
 148 ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64 log_size);
 149
 150 void
 151 ifcvf_disable_logging(struct ifcvf_hw *hw);
 152
 153 void
 154 ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid);
 155
 156 u8
 157 ifcvf_get_notify_region(struct ifcvf_hw *hw);
 158
 159 u64
 160 ifcvf_get_queue_notify_off(struct ifcvf_hw *hw, int qid);
 161
 162 #endif /* _IFCVF_H_ */