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update sources to ceph Nautilus 14.2.1
[ceph.git] / ceph / src / spdk / dpdk / drivers / net / qede / base / ecore_gtt_reg_addr.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
3 * All rights reserved.
4 * www.cavium.com
5 */
6
7 #ifndef GTT_REG_ADDR_H
8 #define GTT_REG_ADDR_H
9
10 /* Win 2 */
11 /* Access:RW DataWidth:0x20 */
12 #define GTT_BAR0_MAP_REG_IGU_CMD 0x00f000UL
13
14 /* Win 3 */
15 /* Access:RW DataWidth:0x20 */
16 #define GTT_BAR0_MAP_REG_TSDM_RAM 0x010000UL
17
18 /* Win 4 */
19 /* Access:RW DataWidth:0x20 */
20 #define GTT_BAR0_MAP_REG_MSDM_RAM 0x011000UL
21
22 /* Win 5 */
23 /* Access:RW DataWidth:0x20 */
24 #define GTT_BAR0_MAP_REG_MSDM_RAM_1024 0x012000UL
25
26 /* Win 6 */
27 /* Access:RW DataWidth:0x20 */
28 #define GTT_BAR0_MAP_REG_USDM_RAM 0x013000UL
29
30 /* Win 7 */
31 /* Access:RW DataWidth:0x20 */
32 #define GTT_BAR0_MAP_REG_USDM_RAM_1024 0x014000UL
33
34 /* Win 8 */
35 /* Access:RW DataWidth:0x20 */
36 #define GTT_BAR0_MAP_REG_USDM_RAM_2048 0x015000UL
37
38 /* Win 9 */
39 /* Access:RW DataWidth:0x20 */
40 #define GTT_BAR0_MAP_REG_XSDM_RAM 0x016000UL
41
42 /* Win 10 */
43 /* Access:RW DataWidth:0x20 */
44 #define GTT_BAR0_MAP_REG_YSDM_RAM 0x017000UL
45
46 /* Win 11 */
47 /* Access:RW DataWidth:0x20 */
48 #define GTT_BAR0_MAP_REG_PSDM_RAM 0x018000UL
49
50 #endif