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[ceph.git] / ceph / src / spdk / dpdk / drivers / net / sfc / base / efx_mcdi.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2 *
3 * Copyright (c) 2008-2018 Solarflare Communications Inc.
4 * All rights reserved.
5 */
6
7 #include "efx.h"
8 #include "efx_impl.h"
9
10 #if EFSYS_OPT_MCDI
11
12 /*
13 * There are three versions of the MCDI interface:
14 * - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
15 * - MCDIv1: Siena firmware and Huntington BootROM.
16 * - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
17 * Transport uses MCDIv2 headers.
18 *
19 * MCDIv2 Header NOT_EPOCH flag
20 * ----------------------------
21 * A new epoch begins at initial startup or after an MC reboot, and defines when
22 * the MC should reject stale MCDI requests.
23 *
24 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
25 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
26 *
27 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
28 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
29 */
30
31
32
33 #if EFSYS_OPT_SIENA
34
35 static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
36 siena_mcdi_init, /* emco_init */
37 siena_mcdi_send_request, /* emco_send_request */
38 siena_mcdi_poll_reboot, /* emco_poll_reboot */
39 siena_mcdi_poll_response, /* emco_poll_response */
40 siena_mcdi_read_response, /* emco_read_response */
41 siena_mcdi_fini, /* emco_fini */
42 siena_mcdi_feature_supported, /* emco_feature_supported */
43 siena_mcdi_get_timeout, /* emco_get_timeout */
44 };
45
46 #endif /* EFSYS_OPT_SIENA */
47
48 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
49
50 static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
51 ef10_mcdi_init, /* emco_init */
52 ef10_mcdi_send_request, /* emco_send_request */
53 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
54 ef10_mcdi_poll_response, /* emco_poll_response */
55 ef10_mcdi_read_response, /* emco_read_response */
56 ef10_mcdi_fini, /* emco_fini */
57 ef10_mcdi_feature_supported, /* emco_feature_supported */
58 ef10_mcdi_get_timeout, /* emco_get_timeout */
59 };
60
61 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
62
63
64
65 __checkReturn efx_rc_t
66 efx_mcdi_init(
67 __in efx_nic_t *enp,
68 __in const efx_mcdi_transport_t *emtp)
69 {
70 const efx_mcdi_ops_t *emcop;
71 efx_rc_t rc;
72
73 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
74 EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);
75
76 switch (enp->en_family) {
77 #if EFSYS_OPT_SIENA
78 case EFX_FAMILY_SIENA:
79 emcop = &__efx_mcdi_siena_ops;
80 break;
81 #endif /* EFSYS_OPT_SIENA */
82
83 #if EFSYS_OPT_HUNTINGTON
84 case EFX_FAMILY_HUNTINGTON:
85 emcop = &__efx_mcdi_ef10_ops;
86 break;
87 #endif /* EFSYS_OPT_HUNTINGTON */
88
89 #if EFSYS_OPT_MEDFORD
90 case EFX_FAMILY_MEDFORD:
91 emcop = &__efx_mcdi_ef10_ops;
92 break;
93 #endif /* EFSYS_OPT_MEDFORD */
94
95 #if EFSYS_OPT_MEDFORD2
96 case EFX_FAMILY_MEDFORD2:
97 emcop = &__efx_mcdi_ef10_ops;
98 break;
99 #endif /* EFSYS_OPT_MEDFORD2 */
100
101 default:
102 EFSYS_ASSERT(0);
103 rc = ENOTSUP;
104 goto fail1;
105 }
106
107 if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
108 /* MCDI requires a DMA buffer in host memory */
109 if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
110 rc = EINVAL;
111 goto fail2;
112 }
113 }
114 enp->en_mcdi.em_emtp = emtp;
115
116 if (emcop != NULL && emcop->emco_init != NULL) {
117 if ((rc = emcop->emco_init(enp, emtp)) != 0)
118 goto fail3;
119 }
120
121 enp->en_mcdi.em_emcop = emcop;
122 enp->en_mod_flags |= EFX_MOD_MCDI;
123
124 return (0);
125
126 fail3:
127 EFSYS_PROBE(fail3);
128 fail2:
129 EFSYS_PROBE(fail2);
130 fail1:
131 EFSYS_PROBE1(fail1, efx_rc_t, rc);
132
133 enp->en_mcdi.em_emcop = NULL;
134 enp->en_mcdi.em_emtp = NULL;
135 enp->en_mod_flags &= ~EFX_MOD_MCDI;
136
137 return (rc);
138 }
139
140 void
141 efx_mcdi_fini(
142 __in efx_nic_t *enp)
143 {
144 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
145 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
146
147 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
148 EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);
149
150 if (emcop != NULL && emcop->emco_fini != NULL)
151 emcop->emco_fini(enp);
152
153 emip->emi_port = 0;
154 emip->emi_aborted = 0;
155
156 enp->en_mcdi.em_emcop = NULL;
157 enp->en_mod_flags &= ~EFX_MOD_MCDI;
158 }
159
160 void
161 efx_mcdi_new_epoch(
162 __in efx_nic_t *enp)
163 {
164 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
165 efsys_lock_state_t state;
166
167 /* Start a new epoch (allow fresh MCDI requests to succeed) */
168 EFSYS_LOCK(enp->en_eslp, state);
169 emip->emi_new_epoch = B_TRUE;
170 EFSYS_UNLOCK(enp->en_eslp, state);
171 }
172
173 static void
174 efx_mcdi_send_request(
175 __in efx_nic_t *enp,
176 __in void *hdrp,
177 __in size_t hdr_len,
178 __in void *sdup,
179 __in size_t sdu_len)
180 {
181 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
182
183 emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
184 }
185
186 static efx_rc_t
187 efx_mcdi_poll_reboot(
188 __in efx_nic_t *enp)
189 {
190 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
191 efx_rc_t rc;
192
193 rc = emcop->emco_poll_reboot(enp);
194 return (rc);
195 }
196
197 static boolean_t
198 efx_mcdi_poll_response(
199 __in efx_nic_t *enp)
200 {
201 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
202 boolean_t available;
203
204 available = emcop->emco_poll_response(enp);
205 return (available);
206 }
207
208 static void
209 efx_mcdi_read_response(
210 __in efx_nic_t *enp,
211 __out void *bufferp,
212 __in size_t offset,
213 __in size_t length)
214 {
215 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
216
217 emcop->emco_read_response(enp, bufferp, offset, length);
218 }
219
220 void
221 efx_mcdi_request_start(
222 __in efx_nic_t *enp,
223 __in efx_mcdi_req_t *emrp,
224 __in boolean_t ev_cpl)
225 {
226 #if EFSYS_OPT_MCDI_LOGGING
227 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
228 #endif
229 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
230 efx_dword_t hdr[2];
231 size_t hdr_len;
232 unsigned int max_version;
233 unsigned int seq;
234 unsigned int xflags;
235 boolean_t new_epoch;
236 efsys_lock_state_t state;
237
238 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
239 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
240 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
241
242 /*
243 * efx_mcdi_request_start() is naturally serialised against both
244 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
245 * by virtue of there only being one outstanding MCDI request.
246 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
247 * at any time, to timeout a pending mcdi request, That request may
248 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
249 * efx_mcdi_ev_death() may end up running in parallel with
250 * efx_mcdi_request_start(). This race is handled by ensuring that
251 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
252 * en_eslp lock.
253 */
254 EFSYS_LOCK(enp->en_eslp, state);
255 EFSYS_ASSERT(emip->emi_pending_req == NULL);
256 emip->emi_pending_req = emrp;
257 emip->emi_ev_cpl = ev_cpl;
258 emip->emi_poll_cnt = 0;
259 seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
260 new_epoch = emip->emi_new_epoch;
261 max_version = emip->emi_max_version;
262 EFSYS_UNLOCK(enp->en_eslp, state);
263
264 xflags = 0;
265 if (ev_cpl)
266 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
267
268 /*
269 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
270 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
271 * possible to support this.
272 */
273 if ((max_version >= 2) &&
274 ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
275 (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
276 (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
277 /* Construct MCDI v2 header */
278 hdr_len = sizeof (hdr);
279 EFX_POPULATE_DWORD_8(hdr[0],
280 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
281 MCDI_HEADER_RESYNC, 1,
282 MCDI_HEADER_DATALEN, 0,
283 MCDI_HEADER_SEQ, seq,
284 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
285 MCDI_HEADER_ERROR, 0,
286 MCDI_HEADER_RESPONSE, 0,
287 MCDI_HEADER_XFLAGS, xflags);
288
289 EFX_POPULATE_DWORD_2(hdr[1],
290 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
291 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
292 } else {
293 /* Construct MCDI v1 header */
294 hdr_len = sizeof (hdr[0]);
295 EFX_POPULATE_DWORD_8(hdr[0],
296 MCDI_HEADER_CODE, emrp->emr_cmd,
297 MCDI_HEADER_RESYNC, 1,
298 MCDI_HEADER_DATALEN, emrp->emr_in_length,
299 MCDI_HEADER_SEQ, seq,
300 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
301 MCDI_HEADER_ERROR, 0,
302 MCDI_HEADER_RESPONSE, 0,
303 MCDI_HEADER_XFLAGS, xflags);
304 }
305
306 #if EFSYS_OPT_MCDI_LOGGING
307 if (emtp->emt_logger != NULL) {
308 emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
309 &hdr[0], hdr_len,
310 emrp->emr_in_buf, emrp->emr_in_length);
311 }
312 #endif /* EFSYS_OPT_MCDI_LOGGING */
313
314 efx_mcdi_send_request(enp, &hdr[0], hdr_len,
315 emrp->emr_in_buf, emrp->emr_in_length);
316 }
317
318
319 static void
320 efx_mcdi_read_response_header(
321 __in efx_nic_t *enp,
322 __inout efx_mcdi_req_t *emrp)
323 {
324 #if EFSYS_OPT_MCDI_LOGGING
325 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
326 #endif /* EFSYS_OPT_MCDI_LOGGING */
327 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
328 efx_dword_t hdr[2];
329 unsigned int hdr_len;
330 unsigned int data_len;
331 unsigned int seq;
332 unsigned int cmd;
333 unsigned int error;
334 efx_rc_t rc;
335
336 EFSYS_ASSERT(emrp != NULL);
337
338 efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
339 hdr_len = sizeof (hdr[0]);
340
341 cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
342 seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
343 error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);
344
345 if (cmd != MC_CMD_V2_EXTN) {
346 data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
347 } else {
348 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
349 hdr_len += sizeof (hdr[1]);
350
351 cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
352 data_len =
353 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
354 }
355
356 if (error && (data_len == 0)) {
357 /* The MC has rebooted since the request was sent. */
358 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
359 efx_mcdi_poll_reboot(enp);
360 rc = EIO;
361 goto fail1;
362 }
363 if ((cmd != emrp->emr_cmd) ||
364 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
365 /* Response is for a different request */
366 rc = EIO;
367 goto fail2;
368 }
369 if (error) {
370 efx_dword_t err[2];
371 unsigned int err_len = MIN(data_len, sizeof (err));
372 int err_code = MC_CMD_ERR_EPROTO;
373 int err_arg = 0;
374
375 /* Read error code (and arg num for MCDI v2 commands) */
376 efx_mcdi_read_response(enp, &err, hdr_len, err_len);
377
378 if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
379 err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
380 #ifdef WITH_MCDI_V2
381 if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
382 err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
383 #endif
384 emrp->emr_err_code = err_code;
385 emrp->emr_err_arg = err_arg;
386
387 #if EFSYS_OPT_MCDI_PROXY_AUTH
388 if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
389 (err_len == sizeof (err))) {
390 /*
391 * The MCDI request would normally fail with EPERM, but
392 * firmware has forwarded it to an authorization agent
393 * attached to a privileged PF.
394 *
395 * Save the authorization request handle. The client
396 * must wait for a PROXY_RESPONSE event, or timeout.
397 */
398 emrp->emr_proxy_handle = err_arg;
399 }
400 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
401
402 #if EFSYS_OPT_MCDI_LOGGING
403 if (emtp->emt_logger != NULL) {
404 emtp->emt_logger(emtp->emt_context,
405 EFX_LOG_MCDI_RESPONSE,
406 &hdr[0], hdr_len,
407 &err[0], err_len);
408 }
409 #endif /* EFSYS_OPT_MCDI_LOGGING */
410
411 if (!emrp->emr_quiet) {
412 EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
413 int, err_code, int, err_arg);
414 }
415
416 rc = efx_mcdi_request_errcode(err_code);
417 goto fail3;
418 }
419
420 emrp->emr_rc = 0;
421 emrp->emr_out_length_used = data_len;
422 #if EFSYS_OPT_MCDI_PROXY_AUTH
423 emrp->emr_proxy_handle = 0;
424 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
425 return;
426
427 fail3:
428 fail2:
429 fail1:
430 emrp->emr_rc = rc;
431 emrp->emr_out_length_used = 0;
432 }
433
434 static void
435 efx_mcdi_finish_response(
436 __in efx_nic_t *enp,
437 __in efx_mcdi_req_t *emrp)
438 {
439 #if EFSYS_OPT_MCDI_LOGGING
440 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
441 #endif /* EFSYS_OPT_MCDI_LOGGING */
442 efx_dword_t hdr[2];
443 unsigned int hdr_len;
444 size_t bytes;
445
446 if (emrp->emr_out_buf == NULL)
447 return;
448
449 /* Read the command header to detect MCDI response format */
450 hdr_len = sizeof (hdr[0]);
451 efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
452 if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
453 /*
454 * Read the actual payload length. The length given in the event
455 * is only correct for responses with the V1 format.
456 */
457 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
458 hdr_len += sizeof (hdr[1]);
459
460 emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
461 MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
462 }
463
464 /* Copy payload out into caller supplied buffer */
465 bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
466 efx_mcdi_read_response(enp, emrp->emr_out_buf, hdr_len, bytes);
467
468 #if EFSYS_OPT_MCDI_LOGGING
469 if (emtp->emt_logger != NULL) {
470 emtp->emt_logger(emtp->emt_context,
471 EFX_LOG_MCDI_RESPONSE,
472 &hdr[0], hdr_len,
473 emrp->emr_out_buf, bytes);
474 }
475 #endif /* EFSYS_OPT_MCDI_LOGGING */
476 }
477
478
479 __checkReturn boolean_t
480 efx_mcdi_request_poll(
481 __in efx_nic_t *enp)
482 {
483 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
484 efx_mcdi_req_t *emrp;
485 efsys_lock_state_t state;
486 efx_rc_t rc;
487
488 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
489 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
490 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
491
492 /* Serialise against post-watchdog efx_mcdi_ev* */
493 EFSYS_LOCK(enp->en_eslp, state);
494
495 EFSYS_ASSERT(emip->emi_pending_req != NULL);
496 EFSYS_ASSERT(!emip->emi_ev_cpl);
497 emrp = emip->emi_pending_req;
498
499 /* Check for reboot atomically w.r.t efx_mcdi_request_start */
500 if (emip->emi_poll_cnt++ == 0) {
501 if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
502 emip->emi_pending_req = NULL;
503 EFSYS_UNLOCK(enp->en_eslp, state);
504
505 /* Reboot/Assertion */
506 if (rc == EIO || rc == EINTR)
507 efx_mcdi_raise_exception(enp, emrp, rc);
508
509 goto fail1;
510 }
511 }
512
513 /* Check if a response is available */
514 if (efx_mcdi_poll_response(enp) == B_FALSE) {
515 EFSYS_UNLOCK(enp->en_eslp, state);
516 return (B_FALSE);
517 }
518
519 /* Read the response header */
520 efx_mcdi_read_response_header(enp, emrp);
521
522 /* Request complete */
523 emip->emi_pending_req = NULL;
524
525 /* Ensure stale MCDI requests fail after an MC reboot. */
526 emip->emi_new_epoch = B_FALSE;
527
528 EFSYS_UNLOCK(enp->en_eslp, state);
529
530 if ((rc = emrp->emr_rc) != 0)
531 goto fail2;
532
533 efx_mcdi_finish_response(enp, emrp);
534 return (B_TRUE);
535
536 fail2:
537 if (!emrp->emr_quiet)
538 EFSYS_PROBE(fail2);
539 fail1:
540 if (!emrp->emr_quiet)
541 EFSYS_PROBE1(fail1, efx_rc_t, rc);
542
543 return (B_TRUE);
544 }
545
546 __checkReturn boolean_t
547 efx_mcdi_request_abort(
548 __in efx_nic_t *enp)
549 {
550 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
551 efx_mcdi_req_t *emrp;
552 boolean_t aborted;
553 efsys_lock_state_t state;
554
555 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
556 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
557 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
558
559 /*
560 * efx_mcdi_ev_* may have already completed this event, and be
561 * spinning/blocked on the upper layer lock. So it *is* legitimate
562 * to for emi_pending_req to be NULL. If there is a pending event
563 * completed request, then provide a "credit" to allow
564 * efx_mcdi_ev_cpl() to accept a single spurious completion.
565 */
566 EFSYS_LOCK(enp->en_eslp, state);
567 emrp = emip->emi_pending_req;
568 aborted = (emrp != NULL);
569 if (aborted) {
570 emip->emi_pending_req = NULL;
571
572 /* Error the request */
573 emrp->emr_out_length_used = 0;
574 emrp->emr_rc = ETIMEDOUT;
575
576 /* Provide a credit for seqno/emr_pending_req mismatches */
577 if (emip->emi_ev_cpl)
578 ++emip->emi_aborted;
579
580 /*
581 * The upper layer has called us, so we don't
582 * need to complete the request.
583 */
584 }
585 EFSYS_UNLOCK(enp->en_eslp, state);
586
587 return (aborted);
588 }
589
590 void
591 efx_mcdi_get_timeout(
592 __in efx_nic_t *enp,
593 __in efx_mcdi_req_t *emrp,
594 __out uint32_t *timeoutp)
595 {
596 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
597
598 emcop->emco_get_timeout(enp, emrp, timeoutp);
599 }
600
601 __checkReturn efx_rc_t
602 efx_mcdi_request_errcode(
603 __in unsigned int err)
604 {
605
606 switch (err) {
607 /* MCDI v1 */
608 case MC_CMD_ERR_EPERM:
609 return (EACCES);
610 case MC_CMD_ERR_ENOENT:
611 return (ENOENT);
612 case MC_CMD_ERR_EINTR:
613 return (EINTR);
614 case MC_CMD_ERR_EACCES:
615 return (EACCES);
616 case MC_CMD_ERR_EBUSY:
617 return (EBUSY);
618 case MC_CMD_ERR_EINVAL:
619 return (EINVAL);
620 case MC_CMD_ERR_EDEADLK:
621 return (EDEADLK);
622 case MC_CMD_ERR_ENOSYS:
623 return (ENOTSUP);
624 case MC_CMD_ERR_ETIME:
625 return (ETIMEDOUT);
626 case MC_CMD_ERR_ENOTSUP:
627 return (ENOTSUP);
628 case MC_CMD_ERR_EALREADY:
629 return (EALREADY);
630
631 /* MCDI v2 */
632 case MC_CMD_ERR_EEXIST:
633 return (EEXIST);
634 #ifdef MC_CMD_ERR_EAGAIN
635 case MC_CMD_ERR_EAGAIN:
636 return (EAGAIN);
637 #endif
638 #ifdef MC_CMD_ERR_ENOSPC
639 case MC_CMD_ERR_ENOSPC:
640 return (ENOSPC);
641 #endif
642 case MC_CMD_ERR_ERANGE:
643 return (ERANGE);
644
645 case MC_CMD_ERR_ALLOC_FAIL:
646 return (ENOMEM);
647 case MC_CMD_ERR_NO_VADAPTOR:
648 return (ENOENT);
649 case MC_CMD_ERR_NO_EVB_PORT:
650 return (ENOENT);
651 case MC_CMD_ERR_NO_VSWITCH:
652 return (ENODEV);
653 case MC_CMD_ERR_VLAN_LIMIT:
654 return (EINVAL);
655 case MC_CMD_ERR_BAD_PCI_FUNC:
656 return (ENODEV);
657 case MC_CMD_ERR_BAD_VLAN_MODE:
658 return (EINVAL);
659 case MC_CMD_ERR_BAD_VSWITCH_TYPE:
660 return (EINVAL);
661 case MC_CMD_ERR_BAD_VPORT_TYPE:
662 return (EINVAL);
663 case MC_CMD_ERR_MAC_EXIST:
664 return (EEXIST);
665
666 case MC_CMD_ERR_PROXY_PENDING:
667 return (EAGAIN);
668
669 default:
670 EFSYS_PROBE1(mc_pcol_error, int, err);
671 return (EIO);
672 }
673 }
674
675 void
676 efx_mcdi_raise_exception(
677 __in efx_nic_t *enp,
678 __in_opt efx_mcdi_req_t *emrp,
679 __in int rc)
680 {
681 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
682 efx_mcdi_exception_t exception;
683
684 /* Reboot or Assertion failure only */
685 EFSYS_ASSERT(rc == EIO || rc == EINTR);
686
687 /*
688 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
689 * then the EIO is not worthy of an exception.
690 */
691 if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
692 return;
693
694 exception = (rc == EIO)
695 ? EFX_MCDI_EXCEPTION_MC_REBOOT
696 : EFX_MCDI_EXCEPTION_MC_BADASSERT;
697
698 emtp->emt_exception(emtp->emt_context, exception);
699 }
700
701 void
702 efx_mcdi_execute(
703 __in efx_nic_t *enp,
704 __inout efx_mcdi_req_t *emrp)
705 {
706 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
707
708 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
709 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
710
711 emrp->emr_quiet = B_FALSE;
712 emtp->emt_execute(emtp->emt_context, emrp);
713 }
714
715 void
716 efx_mcdi_execute_quiet(
717 __in efx_nic_t *enp,
718 __inout efx_mcdi_req_t *emrp)
719 {
720 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
721
722 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
723 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
724
725 emrp->emr_quiet = B_TRUE;
726 emtp->emt_execute(emtp->emt_context, emrp);
727 }
728
729 void
730 efx_mcdi_ev_cpl(
731 __in efx_nic_t *enp,
732 __in unsigned int seq,
733 __in unsigned int outlen,
734 __in int errcode)
735 {
736 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
737 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
738 efx_mcdi_req_t *emrp;
739 efsys_lock_state_t state;
740
741 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
742 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
743
744 /*
745 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
746 * when we're completing an aborted request.
747 */
748 EFSYS_LOCK(enp->en_eslp, state);
749 if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
750 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
751 EFSYS_ASSERT(emip->emi_aborted > 0);
752 if (emip->emi_aborted > 0)
753 --emip->emi_aborted;
754 EFSYS_UNLOCK(enp->en_eslp, state);
755 return;
756 }
757
758 emrp = emip->emi_pending_req;
759 emip->emi_pending_req = NULL;
760 EFSYS_UNLOCK(enp->en_eslp, state);
761
762 if (emip->emi_max_version >= 2) {
763 /* MCDIv2 response details do not fit into an event. */
764 efx_mcdi_read_response_header(enp, emrp);
765 } else {
766 if (errcode != 0) {
767 if (!emrp->emr_quiet) {
768 EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
769 int, errcode);
770 }
771 emrp->emr_out_length_used = 0;
772 emrp->emr_rc = efx_mcdi_request_errcode(errcode);
773 } else {
774 emrp->emr_out_length_used = outlen;
775 emrp->emr_rc = 0;
776 }
777 }
778 if (emrp->emr_rc == 0)
779 efx_mcdi_finish_response(enp, emrp);
780
781 emtp->emt_ev_cpl(emtp->emt_context);
782 }
783
784 #if EFSYS_OPT_MCDI_PROXY_AUTH
785
786 __checkReturn efx_rc_t
787 efx_mcdi_get_proxy_handle(
788 __in efx_nic_t *enp,
789 __in efx_mcdi_req_t *emrp,
790 __out uint32_t *handlep)
791 {
792 efx_rc_t rc;
793
794 _NOTE(ARGUNUSED(enp))
795
796 /*
797 * Return proxy handle from MCDI request that returned with error
798 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
799 * PROXY_RESPONSE event.
800 */
801 if ((emrp == NULL) || (handlep == NULL)) {
802 rc = EINVAL;
803 goto fail1;
804 }
805 if ((emrp->emr_rc != 0) &&
806 (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
807 *handlep = emrp->emr_proxy_handle;
808 rc = 0;
809 } else {
810 *handlep = 0;
811 rc = ENOENT;
812 }
813 return (rc);
814
815 fail1:
816 EFSYS_PROBE1(fail1, efx_rc_t, rc);
817 return (rc);
818 }
819
820 void
821 efx_mcdi_ev_proxy_response(
822 __in efx_nic_t *enp,
823 __in unsigned int handle,
824 __in unsigned int status)
825 {
826 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
827 efx_rc_t rc;
828
829 /*
830 * Handle results of an authorization request for a privileged MCDI
831 * command. If authorization was granted then we must re-issue the
832 * original MCDI request. If authorization failed or timed out,
833 * then the original MCDI request should be completed with the
834 * result code from this event.
835 */
836 rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);
837
838 emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
839 }
840 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
841
842 void
843 efx_mcdi_ev_death(
844 __in efx_nic_t *enp,
845 __in int rc)
846 {
847 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
848 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
849 efx_mcdi_req_t *emrp = NULL;
850 boolean_t ev_cpl;
851 efsys_lock_state_t state;
852
853 /*
854 * The MCDI request (if there is one) has been terminated, either
855 * by a BADASSERT or REBOOT event.
856 *
857 * If there is an outstanding event-completed MCDI operation, then we
858 * will never receive the completion event (because both MCDI
859 * completions and BADASSERT events are sent to the same evq). So
860 * complete this MCDI op.
861 *
862 * This function might run in parallel with efx_mcdi_request_poll()
863 * for poll completed mcdi requests, and also with
864 * efx_mcdi_request_start() for post-watchdog completions.
865 */
866 EFSYS_LOCK(enp->en_eslp, state);
867 emrp = emip->emi_pending_req;
868 ev_cpl = emip->emi_ev_cpl;
869 if (emrp != NULL && emip->emi_ev_cpl) {
870 emip->emi_pending_req = NULL;
871
872 emrp->emr_out_length_used = 0;
873 emrp->emr_rc = rc;
874 ++emip->emi_aborted;
875 }
876
877 /*
878 * Since we're running in parallel with a request, consume the
879 * status word before dropping the lock.
880 */
881 if (rc == EIO || rc == EINTR) {
882 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
883 (void) efx_mcdi_poll_reboot(enp);
884 emip->emi_new_epoch = B_TRUE;
885 }
886
887 EFSYS_UNLOCK(enp->en_eslp, state);
888
889 efx_mcdi_raise_exception(enp, emrp, rc);
890
891 if (emrp != NULL && ev_cpl)
892 emtp->emt_ev_cpl(emtp->emt_context);
893 }
894
895 __checkReturn efx_rc_t
896 efx_mcdi_version(
897 __in efx_nic_t *enp,
898 __out_ecount_opt(4) uint16_t versionp[4],
899 __out_opt uint32_t *buildp,
900 __out_opt efx_mcdi_boot_t *statusp)
901 {
902 efx_mcdi_req_t req;
903 uint8_t payload[MAX(MAX(MC_CMD_GET_VERSION_IN_LEN,
904 MC_CMD_GET_VERSION_OUT_LEN),
905 MAX(MC_CMD_GET_BOOT_STATUS_IN_LEN,
906 MC_CMD_GET_BOOT_STATUS_OUT_LEN))];
907 efx_word_t *ver_words;
908 uint16_t version[4];
909 uint32_t build;
910 efx_mcdi_boot_t status;
911 efx_rc_t rc;
912
913 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
914
915 (void) memset(payload, 0, sizeof (payload));
916 req.emr_cmd = MC_CMD_GET_VERSION;
917 req.emr_in_buf = payload;
918 req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
919 req.emr_out_buf = payload;
920 req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;
921
922 efx_mcdi_execute(enp, &req);
923
924 if (req.emr_rc != 0) {
925 rc = req.emr_rc;
926 goto fail1;
927 }
928
929 /* bootrom support */
930 if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
931 version[0] = version[1] = version[2] = version[3] = 0;
932 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
933
934 goto version;
935 }
936
937 if (req.emr_out_length_used < MC_CMD_GET_VERSION_OUT_LEN) {
938 rc = EMSGSIZE;
939 goto fail2;
940 }
941
942 ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
943 version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
944 version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
945 version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
946 version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
947 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
948
949 version:
950 /* The bootrom doesn't understand BOOT_STATUS */
951 if (MC_FW_VERSION_IS_BOOTLOADER(build)) {
952 status = EFX_MCDI_BOOT_ROM;
953 goto out;
954 }
955
956 (void) memset(payload, 0, sizeof (payload));
957 req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
958 req.emr_in_buf = payload;
959 req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
960 req.emr_out_buf = payload;
961 req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;
962
963 efx_mcdi_execute_quiet(enp, &req);
964
965 if (req.emr_rc == EACCES) {
966 /* Unprivileged functions cannot access BOOT_STATUS */
967 status = EFX_MCDI_BOOT_PRIMARY;
968 version[0] = version[1] = version[2] = version[3] = 0;
969 build = 0;
970 goto out;
971 }
972
973 if (req.emr_rc != 0) {
974 rc = req.emr_rc;
975 goto fail3;
976 }
977
978 if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
979 rc = EMSGSIZE;
980 goto fail4;
981 }
982
983 if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
984 GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
985 status = EFX_MCDI_BOOT_PRIMARY;
986 else
987 status = EFX_MCDI_BOOT_SECONDARY;
988
989 out:
990 if (versionp != NULL)
991 memcpy(versionp, version, sizeof (version));
992 if (buildp != NULL)
993 *buildp = build;
994 if (statusp != NULL)
995 *statusp = status;
996
997 return (0);
998
999 fail4:
1000 EFSYS_PROBE(fail4);
1001 fail3:
1002 EFSYS_PROBE(fail3);
1003 fail2:
1004 EFSYS_PROBE(fail2);
1005 fail1:
1006 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1007
1008 return (rc);
1009 }
1010
1011 __checkReturn efx_rc_t
1012 efx_mcdi_get_capabilities(
1013 __in efx_nic_t *enp,
1014 __out_opt uint32_t *flagsp,
1015 __out_opt uint16_t *rx_dpcpu_fw_idp,
1016 __out_opt uint16_t *tx_dpcpu_fw_idp,
1017 __out_opt uint32_t *flags2p,
1018 __out_opt uint32_t *tso2ncp)
1019 {
1020 efx_mcdi_req_t req;
1021 uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
1022 MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)];
1023 boolean_t v2_capable;
1024 efx_rc_t rc;
1025
1026 (void) memset(payload, 0, sizeof (payload));
1027 req.emr_cmd = MC_CMD_GET_CAPABILITIES;
1028 req.emr_in_buf = payload;
1029 req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
1030 req.emr_out_buf = payload;
1031 req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;
1032
1033 efx_mcdi_execute_quiet(enp, &req);
1034
1035 if (req.emr_rc != 0) {
1036 rc = req.emr_rc;
1037 goto fail1;
1038 }
1039
1040 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
1041 rc = EMSGSIZE;
1042 goto fail2;
1043 }
1044
1045 if (flagsp != NULL)
1046 *flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);
1047
1048 if (rx_dpcpu_fw_idp != NULL)
1049 *rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1050 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);
1051
1052 if (tx_dpcpu_fw_idp != NULL)
1053 *tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1054 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);
1055
1056 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
1057 v2_capable = B_FALSE;
1058 else
1059 v2_capable = B_TRUE;
1060
1061 if (flags2p != NULL) {
1062 *flags2p = (v2_capable) ?
1063 MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
1064 0;
1065 }
1066
1067 if (tso2ncp != NULL) {
1068 *tso2ncp = (v2_capable) ?
1069 MCDI_OUT_WORD(req,
1070 GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
1071 0;
1072 }
1073
1074 return (0);
1075
1076 fail2:
1077 EFSYS_PROBE(fail2);
1078 fail1:
1079 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1080
1081 return (rc);
1082 }
1083
1084 static __checkReturn efx_rc_t
1085 efx_mcdi_do_reboot(
1086 __in efx_nic_t *enp,
1087 __in boolean_t after_assertion)
1088 {
1089 uint8_t payload[MAX(MC_CMD_REBOOT_IN_LEN, MC_CMD_REBOOT_OUT_LEN)];
1090 efx_mcdi_req_t req;
1091 efx_rc_t rc;
1092
1093 /*
1094 * We could require the caller to have caused en_mod_flags=0 to
1095 * call this function. This doesn't help the other port though,
1096 * who's about to get the MC ripped out from underneath them.
1097 * Since they have to cope with the subsequent fallout of MCDI
1098 * failures, we should as well.
1099 */
1100 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1101
1102 (void) memset(payload, 0, sizeof (payload));
1103 req.emr_cmd = MC_CMD_REBOOT;
1104 req.emr_in_buf = payload;
1105 req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
1106 req.emr_out_buf = payload;
1107 req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;
1108
1109 MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
1110 (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));
1111
1112 efx_mcdi_execute_quiet(enp, &req);
1113
1114 if (req.emr_rc == EACCES) {
1115 /* Unprivileged functions cannot reboot the MC. */
1116 goto out;
1117 }
1118
1119 /* A successful reboot request returns EIO. */
1120 if (req.emr_rc != 0 && req.emr_rc != EIO) {
1121 rc = req.emr_rc;
1122 goto fail1;
1123 }
1124
1125 out:
1126 return (0);
1127
1128 fail1:
1129 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1130
1131 return (rc);
1132 }
1133
1134 __checkReturn efx_rc_t
1135 efx_mcdi_reboot(
1136 __in efx_nic_t *enp)
1137 {
1138 return (efx_mcdi_do_reboot(enp, B_FALSE));
1139 }
1140
1141 __checkReturn efx_rc_t
1142 efx_mcdi_exit_assertion_handler(
1143 __in efx_nic_t *enp)
1144 {
1145 return (efx_mcdi_do_reboot(enp, B_TRUE));
1146 }
1147
1148 __checkReturn efx_rc_t
1149 efx_mcdi_read_assertion(
1150 __in efx_nic_t *enp)
1151 {
1152 efx_mcdi_req_t req;
1153 uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN,
1154 MC_CMD_GET_ASSERTS_OUT_LEN)];
1155 const char *reason;
1156 unsigned int flags;
1157 unsigned int index;
1158 unsigned int ofst;
1159 int retry;
1160 efx_rc_t rc;
1161
1162 /*
1163 * Before we attempt to chat to the MC, we should verify that the MC
1164 * isn't in it's assertion handler, either due to a previous reboot,
1165 * or because we're reinitializing due to an eec_exception().
1166 *
1167 * Use GET_ASSERTS to read any assertion state that may be present.
1168 * Retry this command twice. Once because a boot-time assertion failure
1169 * might cause the 1st MCDI request to fail. And once again because
1170 * we might race with efx_mcdi_exit_assertion_handler() running on
1171 * partner port(s) on the same NIC.
1172 */
1173 retry = 2;
1174 do {
1175 (void) memset(payload, 0, sizeof (payload));
1176 req.emr_cmd = MC_CMD_GET_ASSERTS;
1177 req.emr_in_buf = payload;
1178 req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
1179 req.emr_out_buf = payload;
1180 req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;
1181
1182 MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
1183 efx_mcdi_execute_quiet(enp, &req);
1184
1185 } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);
1186
1187 if (req.emr_rc != 0) {
1188 if (req.emr_rc == EACCES) {
1189 /* Unprivileged functions cannot clear assertions. */
1190 goto out;
1191 }
1192 rc = req.emr_rc;
1193 goto fail1;
1194 }
1195
1196 if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
1197 rc = EMSGSIZE;
1198 goto fail2;
1199 }
1200
1201 /* Print out any assertion state recorded */
1202 flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1203 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1204 return (0);
1205
1206 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1207 ? "system-level assertion"
1208 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1209 ? "thread-level assertion"
1210 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1211 ? "watchdog reset"
1212 : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
1213 ? "illegal address trap"
1214 : "unknown assertion";
1215 EFSYS_PROBE3(mcpu_assertion,
1216 const char *, reason, unsigned int,
1217 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1218 unsigned int,
1219 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));
1220
1221 /* Print out the registers (r1 ... r31) */
1222 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1223 for (index = 1;
1224 index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1225 index++) {
1226 EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
1227 EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
1228 EFX_DWORD_0));
1229 ofst += sizeof (efx_dword_t);
1230 }
1231 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);
1232
1233 out:
1234 return (0);
1235
1236 fail2:
1237 EFSYS_PROBE(fail2);
1238 fail1:
1239 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1240
1241 return (rc);
1242 }
1243
1244
1245 /*
1246 * Internal routines for for specific MCDI requests.
1247 */
1248
1249 __checkReturn efx_rc_t
1250 efx_mcdi_drv_attach(
1251 __in efx_nic_t *enp,
1252 __in boolean_t attach)
1253 {
1254 efx_mcdi_req_t req;
1255 uint8_t payload[MAX(MC_CMD_DRV_ATTACH_IN_LEN,
1256 MC_CMD_DRV_ATTACH_EXT_OUT_LEN)];
1257 efx_rc_t rc;
1258
1259 (void) memset(payload, 0, sizeof (payload));
1260 req.emr_cmd = MC_CMD_DRV_ATTACH;
1261 req.emr_in_buf = payload;
1262 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
1263 req.emr_out_buf = payload;
1264 req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
1265
1266 /*
1267 * Typically, client drivers use DONT_CARE for the datapath firmware
1268 * type to ensure that the driver can attach to an unprivileged
1269 * function. The datapath firmware type to use is controlled by the
1270 * 'sfboot' utility.
1271 * If a client driver wishes to attach with a specific datapath firmware
1272 * type, that can be passed in second argument of efx_nic_probe API. One
1273 * such example is the ESXi native driver that attempts attaching with
1274 * FULL_FEATURED datapath firmware type first and fall backs to
1275 * DONT_CARE datapath firmware type if MC_CMD_DRV_ATTACH fails.
1276 */
1277 MCDI_IN_POPULATE_DWORD_2(req, DRV_ATTACH_IN_NEW_STATE,
1278 DRV_ATTACH_IN_ATTACH, attach ? 1 : 0,
1279 DRV_ATTACH_IN_SUBVARIANT_AWARE, EFSYS_OPT_FW_SUBVARIANT_AWARE);
1280 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
1281 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, enp->efv);
1282
1283 efx_mcdi_execute(enp, &req);
1284
1285 if (req.emr_rc != 0) {
1286 rc = req.emr_rc;
1287 goto fail1;
1288 }
1289
1290 if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
1291 rc = EMSGSIZE;
1292 goto fail2;
1293 }
1294
1295 return (0);
1296
1297 fail2:
1298 EFSYS_PROBE(fail2);
1299 fail1:
1300 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1301
1302 return (rc);
1303 }
1304
1305 __checkReturn efx_rc_t
1306 efx_mcdi_get_board_cfg(
1307 __in efx_nic_t *enp,
1308 __out_opt uint32_t *board_typep,
1309 __out_opt efx_dword_t *capabilitiesp,
1310 __out_ecount_opt(6) uint8_t mac_addrp[6])
1311 {
1312 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
1313 efx_mcdi_req_t req;
1314 uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
1315 MC_CMD_GET_BOARD_CFG_OUT_LENMIN)];
1316 efx_rc_t rc;
1317
1318 (void) memset(payload, 0, sizeof (payload));
1319 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
1320 req.emr_in_buf = payload;
1321 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
1322 req.emr_out_buf = payload;
1323 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;
1324
1325 efx_mcdi_execute(enp, &req);
1326
1327 if (req.emr_rc != 0) {
1328 rc = req.emr_rc;
1329 goto fail1;
1330 }
1331
1332 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1333 rc = EMSGSIZE;
1334 goto fail2;
1335 }
1336
1337 if (mac_addrp != NULL) {
1338 uint8_t *addrp;
1339
1340 if (emip->emi_port == 1) {
1341 addrp = MCDI_OUT2(req, uint8_t,
1342 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
1343 } else if (emip->emi_port == 2) {
1344 addrp = MCDI_OUT2(req, uint8_t,
1345 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
1346 } else {
1347 rc = EINVAL;
1348 goto fail3;
1349 }
1350
1351 EFX_MAC_ADDR_COPY(mac_addrp, addrp);
1352 }
1353
1354 if (capabilitiesp != NULL) {
1355 if (emip->emi_port == 1) {
1356 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1357 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1358 } else if (emip->emi_port == 2) {
1359 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1360 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1361 } else {
1362 rc = EINVAL;
1363 goto fail4;
1364 }
1365 }
1366
1367 if (board_typep != NULL) {
1368 *board_typep = MCDI_OUT_DWORD(req,
1369 GET_BOARD_CFG_OUT_BOARD_TYPE);
1370 }
1371
1372 return (0);
1373
1374 fail4:
1375 EFSYS_PROBE(fail4);
1376 fail3:
1377 EFSYS_PROBE(fail3);
1378 fail2:
1379 EFSYS_PROBE(fail2);
1380 fail1:
1381 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1382
1383 return (rc);
1384 }
1385
1386 __checkReturn efx_rc_t
1387 efx_mcdi_get_resource_limits(
1388 __in efx_nic_t *enp,
1389 __out_opt uint32_t *nevqp,
1390 __out_opt uint32_t *nrxqp,
1391 __out_opt uint32_t *ntxqp)
1392 {
1393 efx_mcdi_req_t req;
1394 uint8_t payload[MAX(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
1395 MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)];
1396 efx_rc_t rc;
1397
1398 (void) memset(payload, 0, sizeof (payload));
1399 req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
1400 req.emr_in_buf = payload;
1401 req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
1402 req.emr_out_buf = payload;
1403 req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;
1404
1405 efx_mcdi_execute(enp, &req);
1406
1407 if (req.emr_rc != 0) {
1408 rc = req.emr_rc;
1409 goto fail1;
1410 }
1411
1412 if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
1413 rc = EMSGSIZE;
1414 goto fail2;
1415 }
1416
1417 if (nevqp != NULL)
1418 *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
1419 if (nrxqp != NULL)
1420 *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
1421 if (ntxqp != NULL)
1422 *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);
1423
1424 return (0);
1425
1426 fail2:
1427 EFSYS_PROBE(fail2);
1428 fail1:
1429 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1430
1431 return (rc);
1432 }
1433
1434 __checkReturn efx_rc_t
1435 efx_mcdi_get_phy_cfg(
1436 __in efx_nic_t *enp)
1437 {
1438 efx_port_t *epp = &(enp->en_port);
1439 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1440 efx_mcdi_req_t req;
1441 uint8_t payload[MAX(MC_CMD_GET_PHY_CFG_IN_LEN,
1442 MC_CMD_GET_PHY_CFG_OUT_LEN)];
1443 #if EFSYS_OPT_NAMES
1444 const char *namep;
1445 size_t namelen;
1446 #endif
1447 uint32_t phy_media_type;
1448 efx_rc_t rc;
1449
1450 (void) memset(payload, 0, sizeof (payload));
1451 req.emr_cmd = MC_CMD_GET_PHY_CFG;
1452 req.emr_in_buf = payload;
1453 req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
1454 req.emr_out_buf = payload;
1455 req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;
1456
1457 efx_mcdi_execute(enp, &req);
1458
1459 if (req.emr_rc != 0) {
1460 rc = req.emr_rc;
1461 goto fail1;
1462 }
1463
1464 if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
1465 rc = EMSGSIZE;
1466 goto fail2;
1467 }
1468
1469 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
1470 #if EFSYS_OPT_NAMES
1471 namep = MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME);
1472 namelen = MIN(sizeof (encp->enc_phy_name) - 1,
1473 strnlen(namep, MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
1474 (void) memset(encp->enc_phy_name, 0,
1475 sizeof (encp->enc_phy_name));
1476 memcpy(encp->enc_phy_name, namep, namelen);
1477 #endif /* EFSYS_OPT_NAMES */
1478 (void) memset(encp->enc_phy_revision, 0,
1479 sizeof (encp->enc_phy_revision));
1480 memcpy(encp->enc_phy_revision,
1481 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
1482 MIN(sizeof (encp->enc_phy_revision) - 1,
1483 MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
1484 #if EFSYS_OPT_PHY_LED_CONTROL
1485 encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
1486 (1 << EFX_PHY_LED_OFF) |
1487 (1 << EFX_PHY_LED_ON));
1488 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
1489
1490 /* Get the media type of the fixed port, if recognised. */
1491 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
1492 EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
1493 EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
1494 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
1495 EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
1496 EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
1497 EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
1498 phy_media_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
1499 epp->ep_fixed_port_type = (efx_phy_media_type_t)phy_media_type;
1500 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
1501 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;
1502
1503 epp->ep_phy_cap_mask =
1504 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
1505 #if EFSYS_OPT_PHY_FLAGS
1506 encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
1507 #endif /* EFSYS_OPT_PHY_FLAGS */
1508
1509 encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);
1510
1511 /* Populate internal state */
1512 encp->enc_mcdi_mdio_channel =
1513 (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);
1514
1515 #if EFSYS_OPT_PHY_STATS
1516 encp->enc_mcdi_phy_stat_mask =
1517 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
1518 #endif /* EFSYS_OPT_PHY_STATS */
1519
1520 #if EFSYS_OPT_BIST
1521 encp->enc_bist_mask = 0;
1522 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1523 GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
1524 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
1525 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1526 GET_PHY_CFG_OUT_BIST_CABLE_LONG))
1527 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
1528 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1529 GET_PHY_CFG_OUT_BIST))
1530 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
1531 #endif /* EFSYS_OPT_BIST */
1532
1533 return (0);
1534
1535 fail2:
1536 EFSYS_PROBE(fail2);
1537 fail1:
1538 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1539
1540 return (rc);
1541 }
1542
1543 __checkReturn efx_rc_t
1544 efx_mcdi_firmware_update_supported(
1545 __in efx_nic_t *enp,
1546 __out boolean_t *supportedp)
1547 {
1548 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1549 efx_rc_t rc;
1550
1551 if (emcop != NULL) {
1552 if ((rc = emcop->emco_feature_supported(enp,
1553 EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
1554 goto fail1;
1555 } else {
1556 /* Earlier devices always supported updates */
1557 *supportedp = B_TRUE;
1558 }
1559
1560 return (0);
1561
1562 fail1:
1563 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1564
1565 return (rc);
1566 }
1567
1568 __checkReturn efx_rc_t
1569 efx_mcdi_macaddr_change_supported(
1570 __in efx_nic_t *enp,
1571 __out boolean_t *supportedp)
1572 {
1573 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1574 efx_rc_t rc;
1575
1576 if (emcop != NULL) {
1577 if ((rc = emcop->emco_feature_supported(enp,
1578 EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
1579 goto fail1;
1580 } else {
1581 /* Earlier devices always supported MAC changes */
1582 *supportedp = B_TRUE;
1583 }
1584
1585 return (0);
1586
1587 fail1:
1588 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1589
1590 return (rc);
1591 }
1592
1593 __checkReturn efx_rc_t
1594 efx_mcdi_link_control_supported(
1595 __in efx_nic_t *enp,
1596 __out boolean_t *supportedp)
1597 {
1598 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1599 efx_rc_t rc;
1600
1601 if (emcop != NULL) {
1602 if ((rc = emcop->emco_feature_supported(enp,
1603 EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
1604 goto fail1;
1605 } else {
1606 /* Earlier devices always supported link control */
1607 *supportedp = B_TRUE;
1608 }
1609
1610 return (0);
1611
1612 fail1:
1613 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1614
1615 return (rc);
1616 }
1617
1618 __checkReturn efx_rc_t
1619 efx_mcdi_mac_spoofing_supported(
1620 __in efx_nic_t *enp,
1621 __out boolean_t *supportedp)
1622 {
1623 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1624 efx_rc_t rc;
1625
1626 if (emcop != NULL) {
1627 if ((rc = emcop->emco_feature_supported(enp,
1628 EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
1629 goto fail1;
1630 } else {
1631 /* Earlier devices always supported MAC spoofing */
1632 *supportedp = B_TRUE;
1633 }
1634
1635 return (0);
1636
1637 fail1:
1638 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1639
1640 return (rc);
1641 }
1642
1643 #if EFSYS_OPT_BIST
1644
1645 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
1646 /*
1647 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
1648 * where memory BIST tests can be run and not much else can interfere or happen.
1649 * A reboot is required to exit this mode.
1650 */
1651 __checkReturn efx_rc_t
1652 efx_mcdi_bist_enable_offline(
1653 __in efx_nic_t *enp)
1654 {
1655 efx_mcdi_req_t req;
1656 efx_rc_t rc;
1657
1658 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
1659 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);
1660
1661 req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
1662 req.emr_in_buf = NULL;
1663 req.emr_in_length = 0;
1664 req.emr_out_buf = NULL;
1665 req.emr_out_length = 0;
1666
1667 efx_mcdi_execute(enp, &req);
1668
1669 if (req.emr_rc != 0) {
1670 rc = req.emr_rc;
1671 goto fail1;
1672 }
1673
1674 return (0);
1675
1676 fail1:
1677 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1678
1679 return (rc);
1680 }
1681 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
1682
1683 __checkReturn efx_rc_t
1684 efx_mcdi_bist_start(
1685 __in efx_nic_t *enp,
1686 __in efx_bist_type_t type)
1687 {
1688 efx_mcdi_req_t req;
1689 uint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN,
1690 MC_CMD_START_BIST_OUT_LEN)];
1691 efx_rc_t rc;
1692
1693 (void) memset(payload, 0, sizeof (payload));
1694 req.emr_cmd = MC_CMD_START_BIST;
1695 req.emr_in_buf = payload;
1696 req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
1697 req.emr_out_buf = payload;
1698 req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;
1699
1700 switch (type) {
1701 case EFX_BIST_TYPE_PHY_NORMAL:
1702 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
1703 break;
1704 case EFX_BIST_TYPE_PHY_CABLE_SHORT:
1705 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1706 MC_CMD_PHY_BIST_CABLE_SHORT);
1707 break;
1708 case EFX_BIST_TYPE_PHY_CABLE_LONG:
1709 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1710 MC_CMD_PHY_BIST_CABLE_LONG);
1711 break;
1712 case EFX_BIST_TYPE_MC_MEM:
1713 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1714 MC_CMD_MC_MEM_BIST);
1715 break;
1716 case EFX_BIST_TYPE_SAT_MEM:
1717 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1718 MC_CMD_PORT_MEM_BIST);
1719 break;
1720 case EFX_BIST_TYPE_REG:
1721 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1722 MC_CMD_REG_BIST);
1723 break;
1724 default:
1725 EFSYS_ASSERT(0);
1726 }
1727
1728 efx_mcdi_execute(enp, &req);
1729
1730 if (req.emr_rc != 0) {
1731 rc = req.emr_rc;
1732 goto fail1;
1733 }
1734
1735 return (0);
1736
1737 fail1:
1738 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1739
1740 return (rc);
1741 }
1742
1743 #endif /* EFSYS_OPT_BIST */
1744
1745
1746 /* Enable logging of some events (e.g. link state changes) */
1747 __checkReturn efx_rc_t
1748 efx_mcdi_log_ctrl(
1749 __in efx_nic_t *enp)
1750 {
1751 efx_mcdi_req_t req;
1752 uint8_t payload[MAX(MC_CMD_LOG_CTRL_IN_LEN,
1753 MC_CMD_LOG_CTRL_OUT_LEN)];
1754 efx_rc_t rc;
1755
1756 (void) memset(payload, 0, sizeof (payload));
1757 req.emr_cmd = MC_CMD_LOG_CTRL;
1758 req.emr_in_buf = payload;
1759 req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
1760 req.emr_out_buf = payload;
1761 req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;
1762
1763 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
1764 MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
1765 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);
1766
1767 efx_mcdi_execute(enp, &req);
1768
1769 if (req.emr_rc != 0) {
1770 rc = req.emr_rc;
1771 goto fail1;
1772 }
1773
1774 return (0);
1775
1776 fail1:
1777 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1778
1779 return (rc);
1780 }
1781
1782
1783 #if EFSYS_OPT_MAC_STATS
1784
1785 typedef enum efx_stats_action_e {
1786 EFX_STATS_CLEAR,
1787 EFX_STATS_UPLOAD,
1788 EFX_STATS_ENABLE_NOEVENTS,
1789 EFX_STATS_ENABLE_EVENTS,
1790 EFX_STATS_DISABLE,
1791 } efx_stats_action_t;
1792
1793 static __checkReturn efx_rc_t
1794 efx_mcdi_mac_stats(
1795 __in efx_nic_t *enp,
1796 __in_opt efsys_mem_t *esmp,
1797 __in efx_stats_action_t action,
1798 __in uint16_t period_ms)
1799 {
1800 efx_mcdi_req_t req;
1801 uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN,
1802 MC_CMD_MAC_STATS_V2_OUT_DMA_LEN)];
1803 int clear = (action == EFX_STATS_CLEAR);
1804 int upload = (action == EFX_STATS_UPLOAD);
1805 int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
1806 int events = (action == EFX_STATS_ENABLE_EVENTS);
1807 int disable = (action == EFX_STATS_DISABLE);
1808 efx_rc_t rc;
1809
1810 (void) memset(payload, 0, sizeof (payload));
1811 req.emr_cmd = MC_CMD_MAC_STATS;
1812 req.emr_in_buf = payload;
1813 req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
1814 req.emr_out_buf = payload;
1815 req.emr_out_length = MC_CMD_MAC_STATS_V2_OUT_DMA_LEN;
1816
1817 MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
1818 MAC_STATS_IN_DMA, upload,
1819 MAC_STATS_IN_CLEAR, clear,
1820 MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
1821 MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
1822 MAC_STATS_IN_PERIODIC_NOEVENT, !events,
1823 MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
1824
1825 if (enable || events || upload) {
1826 const efx_nic_cfg_t *encp = &enp->en_nic_cfg;
1827 uint32_t bytes;
1828
1829 /* Periodic stats or stats upload require a DMA buffer */
1830 if (esmp == NULL) {
1831 rc = EINVAL;
1832 goto fail1;
1833 }
1834
1835 if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS) {
1836 /* MAC stats count too small for legacy MAC stats */
1837 rc = ENOSPC;
1838 goto fail2;
1839 }
1840
1841 bytes = encp->enc_mac_stats_nstats * sizeof (efx_qword_t);
1842
1843 if (EFSYS_MEM_SIZE(esmp) < bytes) {
1844 /* DMA buffer too small */
1845 rc = ENOSPC;
1846 goto fail3;
1847 }
1848
1849 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
1850 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
1851 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
1852 EFSYS_MEM_ADDR(esmp) >> 32);
1853 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
1854 }
1855
1856 /*
1857 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
1858 * as this may fail (and leave periodic DMA enabled) if the
1859 * vadapter has already been deleted.
1860 */
1861 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
1862 (disable ? EVB_PORT_ID_NULL : enp->en_vport_id));
1863
1864 efx_mcdi_execute(enp, &req);
1865
1866 if (req.emr_rc != 0) {
1867 /* EF10: Expect ENOENT if no DMA queues are initialised */
1868 if ((req.emr_rc != ENOENT) ||
1869 (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
1870 rc = req.emr_rc;
1871 goto fail4;
1872 }
1873 }
1874
1875 return (0);
1876
1877 fail4:
1878 EFSYS_PROBE(fail4);
1879 fail3:
1880 EFSYS_PROBE(fail3);
1881 fail2:
1882 EFSYS_PROBE(fail2);
1883 fail1:
1884 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1885
1886 return (rc);
1887 }
1888
1889 __checkReturn efx_rc_t
1890 efx_mcdi_mac_stats_clear(
1891 __in efx_nic_t *enp)
1892 {
1893 efx_rc_t rc;
1894
1895 if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR, 0)) != 0)
1896 goto fail1;
1897
1898 return (0);
1899
1900 fail1:
1901 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1902
1903 return (rc);
1904 }
1905
1906 __checkReturn efx_rc_t
1907 efx_mcdi_mac_stats_upload(
1908 __in efx_nic_t *enp,
1909 __in efsys_mem_t *esmp)
1910 {
1911 efx_rc_t rc;
1912
1913 /*
1914 * The MC DMAs aggregate statistics for our convenience, so we can
1915 * avoid having to pull the statistics buffer into the cache to
1916 * maintain cumulative statistics.
1917 */
1918 if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD, 0)) != 0)
1919 goto fail1;
1920
1921 return (0);
1922
1923 fail1:
1924 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1925
1926 return (rc);
1927 }
1928
1929 __checkReturn efx_rc_t
1930 efx_mcdi_mac_stats_periodic(
1931 __in efx_nic_t *enp,
1932 __in efsys_mem_t *esmp,
1933 __in uint16_t period_ms,
1934 __in boolean_t events)
1935 {
1936 efx_rc_t rc;
1937
1938 /*
1939 * The MC DMAs aggregate statistics for our convenience, so we can
1940 * avoid having to pull the statistics buffer into the cache to
1941 * maintain cumulative statistics.
1942 * Huntington uses a fixed 1sec period.
1943 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
1944 */
1945 if (period_ms == 0)
1946 rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE, 0);
1947 else if (events)
1948 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS,
1949 period_ms);
1950 else
1951 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS,
1952 period_ms);
1953
1954 if (rc != 0)
1955 goto fail1;
1956
1957 return (0);
1958
1959 fail1:
1960 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1961
1962 return (rc);
1963 }
1964
1965 #endif /* EFSYS_OPT_MAC_STATS */
1966
1967 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
1968
1969 /*
1970 * This function returns the pf and vf number of a function. If it is a pf the
1971 * vf number is 0xffff. The vf number is the index of the vf on that
1972 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
1973 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
1974 */
1975 __checkReturn efx_rc_t
1976 efx_mcdi_get_function_info(
1977 __in efx_nic_t *enp,
1978 __out uint32_t *pfp,
1979 __out_opt uint32_t *vfp)
1980 {
1981 efx_mcdi_req_t req;
1982 uint8_t payload[MAX(MC_CMD_GET_FUNCTION_INFO_IN_LEN,
1983 MC_CMD_GET_FUNCTION_INFO_OUT_LEN)];
1984 efx_rc_t rc;
1985
1986 (void) memset(payload, 0, sizeof (payload));
1987 req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
1988 req.emr_in_buf = payload;
1989 req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
1990 req.emr_out_buf = payload;
1991 req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;
1992
1993 efx_mcdi_execute(enp, &req);
1994
1995 if (req.emr_rc != 0) {
1996 rc = req.emr_rc;
1997 goto fail1;
1998 }
1999
2000 if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
2001 rc = EMSGSIZE;
2002 goto fail2;
2003 }
2004
2005 *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
2006 if (vfp != NULL)
2007 *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);
2008
2009 return (0);
2010
2011 fail2:
2012 EFSYS_PROBE(fail2);
2013 fail1:
2014 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2015
2016 return (rc);
2017 }
2018
2019 __checkReturn efx_rc_t
2020 efx_mcdi_privilege_mask(
2021 __in efx_nic_t *enp,
2022 __in uint32_t pf,
2023 __in uint32_t vf,
2024 __out uint32_t *maskp)
2025 {
2026 efx_mcdi_req_t req;
2027 uint8_t payload[MAX(MC_CMD_PRIVILEGE_MASK_IN_LEN,
2028 MC_CMD_PRIVILEGE_MASK_OUT_LEN)];
2029 efx_rc_t rc;
2030
2031 (void) memset(payload, 0, sizeof (payload));
2032 req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
2033 req.emr_in_buf = payload;
2034 req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
2035 req.emr_out_buf = payload;
2036 req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;
2037
2038 MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
2039 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2040 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2041
2042 efx_mcdi_execute(enp, &req);
2043
2044 if (req.emr_rc != 0) {
2045 rc = req.emr_rc;
2046 goto fail1;
2047 }
2048
2049 if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
2050 rc = EMSGSIZE;
2051 goto fail2;
2052 }
2053
2054 *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);
2055
2056 return (0);
2057
2058 fail2:
2059 EFSYS_PROBE(fail2);
2060 fail1:
2061 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2062
2063 return (rc);
2064 }
2065
2066 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
2067
2068 __checkReturn efx_rc_t
2069 efx_mcdi_set_workaround(
2070 __in efx_nic_t *enp,
2071 __in uint32_t type,
2072 __in boolean_t enabled,
2073 __out_opt uint32_t *flagsp)
2074 {
2075 efx_mcdi_req_t req;
2076 uint8_t payload[MAX(MC_CMD_WORKAROUND_IN_LEN,
2077 MC_CMD_WORKAROUND_EXT_OUT_LEN)];
2078 efx_rc_t rc;
2079
2080 (void) memset(payload, 0, sizeof (payload));
2081 req.emr_cmd = MC_CMD_WORKAROUND;
2082 req.emr_in_buf = payload;
2083 req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
2084 req.emr_out_buf = payload;
2085 req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;
2086
2087 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
2088 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);
2089
2090 efx_mcdi_execute_quiet(enp, &req);
2091
2092 if (req.emr_rc != 0) {
2093 rc = req.emr_rc;
2094 goto fail1;
2095 }
2096
2097 if (flagsp != NULL) {
2098 if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2099 *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
2100 else
2101 *flagsp = 0;
2102 }
2103
2104 return (0);
2105
2106 fail1:
2107 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2108
2109 return (rc);
2110 }
2111
2112
2113 __checkReturn efx_rc_t
2114 efx_mcdi_get_workarounds(
2115 __in efx_nic_t *enp,
2116 __out_opt uint32_t *implementedp,
2117 __out_opt uint32_t *enabledp)
2118 {
2119 efx_mcdi_req_t req;
2120 uint8_t payload[MC_CMD_GET_WORKAROUNDS_OUT_LEN];
2121 efx_rc_t rc;
2122
2123 (void) memset(payload, 0, sizeof (payload));
2124 req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
2125 req.emr_in_buf = NULL;
2126 req.emr_in_length = 0;
2127 req.emr_out_buf = payload;
2128 req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;
2129
2130 efx_mcdi_execute(enp, &req);
2131
2132 if (req.emr_rc != 0) {
2133 rc = req.emr_rc;
2134 goto fail1;
2135 }
2136
2137 if (implementedp != NULL) {
2138 *implementedp =
2139 MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2140 }
2141
2142 if (enabledp != NULL) {
2143 *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
2144 }
2145
2146 return (0);
2147
2148 fail1:
2149 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2150
2151 return (rc);
2152 }
2153
2154 /*
2155 * Size of media information page in accordance with SFF-8472 and SFF-8436.
2156 * It is used in MCDI interface as well.
2157 */
2158 #define EFX_PHY_MEDIA_INFO_PAGE_SIZE 0x80
2159
2160 static __checkReturn efx_rc_t
2161 efx_mcdi_get_phy_media_info(
2162 __in efx_nic_t *enp,
2163 __in uint32_t mcdi_page,
2164 __in uint8_t offset,
2165 __in uint8_t len,
2166 __out_bcount(len) uint8_t *data)
2167 {
2168 efx_mcdi_req_t req;
2169 uint8_t payload[MAX(MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
2170 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
2171 EFX_PHY_MEDIA_INFO_PAGE_SIZE))];
2172 efx_rc_t rc;
2173
2174 EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2175
2176 (void) memset(payload, 0, sizeof (payload));
2177 req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
2178 req.emr_in_buf = payload;
2179 req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
2180 req.emr_out_buf = payload;
2181 req.emr_out_length =
2182 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2183
2184 MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);
2185
2186 efx_mcdi_execute(enp, &req);
2187
2188 if (req.emr_rc != 0) {
2189 rc = req.emr_rc;
2190 goto fail1;
2191 }
2192
2193 if (req.emr_out_length_used !=
2194 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
2195 rc = EMSGSIZE;
2196 goto fail2;
2197 }
2198
2199 if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
2200 EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2201 rc = EIO;
2202 goto fail3;
2203 }
2204
2205 memcpy(data,
2206 MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
2207 len);
2208
2209 return (0);
2210
2211 fail3:
2212 EFSYS_PROBE(fail3);
2213 fail2:
2214 EFSYS_PROBE(fail2);
2215 fail1:
2216 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2217
2218 return (rc);
2219 }
2220
2221 /*
2222 * 2-wire device address of the base information in accordance with SFF-8472
2223 * Diagnostic Monitoring Interface for Optical Transceivers section
2224 * 4 Memory Organization.
2225 */
2226 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE 0xA0
2227
2228 /*
2229 * 2-wire device address of the digital diagnostics monitoring interface
2230 * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical
2231 * Transceivers section 4 Memory Organization.
2232 */
2233 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM 0xA2
2234
2235 /*
2236 * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436
2237 * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and
2238 * Operation.
2239 */
2240 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP 0xA0
2241
2242 __checkReturn efx_rc_t
2243 efx_mcdi_phy_module_get_info(
2244 __in efx_nic_t *enp,
2245 __in uint8_t dev_addr,
2246 __in uint8_t offset,
2247 __in uint8_t len,
2248 __out_bcount(len) uint8_t *data)
2249 {
2250 efx_port_t *epp = &(enp->en_port);
2251 efx_rc_t rc;
2252 uint32_t mcdi_lower_page;
2253 uint32_t mcdi_upper_page;
2254
2255 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
2256
2257 /*
2258 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
2259 * Offset plus length interface allows to access page 0 only.
2260 * I.e. non-zero upper pages are not accessible.
2261 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
2262 * QSFP+ Memory Map for details on how information is structured
2263 * and accessible.
2264 */
2265 switch (epp->ep_fixed_port_type) {
2266 case EFX_PHY_MEDIA_SFP_PLUS:
2267 /*
2268 * In accordance with SFF-8472 Diagnostic Monitoring
2269 * Interface for Optical Transceivers section 4 Memory
2270 * Organization two 2-wire addresses are defined.
2271 */
2272 switch (dev_addr) {
2273 /* Base information */
2274 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
2275 /*
2276 * MCDI page 0 should be used to access lower
2277 * page 0 (0x00 - 0x7f) at the device address 0xA0.
2278 */
2279 mcdi_lower_page = 0;
2280 /*
2281 * MCDI page 1 should be used to access upper
2282 * page 0 (0x80 - 0xff) at the device address 0xA0.
2283 */
2284 mcdi_upper_page = 1;
2285 break;
2286 /* Diagnostics */
2287 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
2288 /*
2289 * MCDI page 2 should be used to access lower
2290 * page 0 (0x00 - 0x7f) at the device address 0xA2.
2291 */
2292 mcdi_lower_page = 2;
2293 /*
2294 * MCDI page 3 should be used to access upper
2295 * page 0 (0x80 - 0xff) at the device address 0xA2.
2296 */
2297 mcdi_upper_page = 3;
2298 break;
2299 default:
2300 rc = ENOTSUP;
2301 goto fail1;
2302 }
2303 break;
2304 case EFX_PHY_MEDIA_QSFP_PLUS:
2305 switch (dev_addr) {
2306 case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
2307 /*
2308 * MCDI page -1 should be used to access lower page 0
2309 * (0x00 - 0x7f).
2310 */
2311 mcdi_lower_page = (uint32_t)-1;
2312 /*
2313 * MCDI page 0 should be used to access upper page 0
2314 * (0x80h - 0xff).
2315 */
2316 mcdi_upper_page = 0;
2317 break;
2318 default:
2319 rc = ENOTSUP;
2320 goto fail1;
2321 }
2322 break;
2323 default:
2324 rc = ENOTSUP;
2325 goto fail1;
2326 }
2327
2328 if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2329 uint8_t read_len =
2330 MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
2331
2332 rc = efx_mcdi_get_phy_media_info(enp,
2333 mcdi_lower_page, offset, read_len, data);
2334 if (rc != 0)
2335 goto fail2;
2336
2337 data += read_len;
2338 len -= read_len;
2339
2340 offset = 0;
2341 } else {
2342 offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
2343 }
2344
2345 if (len > 0) {
2346 EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2347 EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2348
2349 rc = efx_mcdi_get_phy_media_info(enp,
2350 mcdi_upper_page, offset, len, data);
2351 if (rc != 0)
2352 goto fail3;
2353 }
2354
2355 return (0);
2356
2357 fail3:
2358 EFSYS_PROBE(fail3);
2359 fail2:
2360 EFSYS_PROBE(fail2);
2361 fail1:
2362 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2363
2364 return (rc);
2365 }
2366
2367 #endif /* EFSYS_OPT_MCDI */
Ceph