ceph/src/spdk/dpdk/drivers/raw/ntb/ntb.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2019 Intel Corporation.
   3  */
   4
   5 #ifndef _NTB_H_
   6 #define _NTB_H_
   7
   8 #include <stdbool.h>
   9
  10 extern int ntb_logtype;
  11
  12 #define NTB_LOG(level, fmt, args...) \
  13         rte_log(RTE_LOG_ ## level, ntb_logtype, "%s(): " fmt "\n", \
  14                 __func__, ##args)
  15
  16 /* Vendor ID */
  17 #define NTB_INTEL_VENDOR_ID         0x8086
  18
  19 /* Device IDs */
  20 #define NTB_INTEL_DEV_ID_B2B_SKX    0x201C
  21
  22 /* Reserved to app to use. */
  23 #define NTB_SPAD_USER               "spad_user_"
  24 #define NTB_SPAD_USER_LEN           (sizeof(NTB_SPAD_USER) - 1)
  25 #define NTB_SPAD_USER_MAX_NUM       4
  26 #define NTB_ATTR_NAME_LEN           30
  27
  28 #define NTB_DFLT_TX_FREE_THRESH     256
  29
  30 enum ntb_xstats_idx {
  31         NTB_TX_PKTS_ID = 0,
  32         NTB_TX_BYTES_ID,
  33         NTB_TX_ERRS_ID,
  34         NTB_RX_PKTS_ID,
  35         NTB_RX_BYTES_ID,
  36         NTB_RX_MISS_ID,
  37 };
  38
  39 enum ntb_topo {
  40         NTB_TOPO_NONE = 0,
  41         NTB_TOPO_B2B_USD,
  42         NTB_TOPO_B2B_DSD,
  43 };
  44
  45 enum ntb_link {
  46         NTB_LINK_DOWN = 0,
  47         NTB_LINK_UP,
  48 };
  49
  50 enum ntb_speed {
  51         NTB_SPEED_NONE = 0,
  52         NTB_SPEED_GEN1 = 1,
  53         NTB_SPEED_GEN2 = 2,
  54         NTB_SPEED_GEN3 = 3,
  55         NTB_SPEED_GEN4 = 4,
  56 };
  57
  58 enum ntb_width {
  59         NTB_WIDTH_NONE = 0,
  60         NTB_WIDTH_1 = 1,
  61         NTB_WIDTH_2 = 2,
  62         NTB_WIDTH_4 = 4,
  63         NTB_WIDTH_8 = 8,
  64         NTB_WIDTH_12 = 12,
  65         NTB_WIDTH_16 = 16,
  66         NTB_WIDTH_32 = 32,
  67 };
  68
  69 /* Define spad registers usage. 0 is reserved. */
  70 enum ntb_spad_idx {
  71         SPAD_NUM_MWS = 1,
  72         SPAD_NUM_QPS,
  73         SPAD_Q_SZ,
  74         SPAD_USED_MWS,
  75         SPAD_MW0_SZ_H,
  76         SPAD_MW0_SZ_L,
  77         SPAD_MW1_SZ_H,
  78         SPAD_MW1_SZ_L,
  79         SPAD_MW0_BA_H,
  80         SPAD_MW0_BA_L,
  81         SPAD_MW1_BA_H,
  82         SPAD_MW1_BA_L,
  83 };
  84
  85 /**
  86  * NTB device operations
  87  * @ntb_dev_init: Init ntb dev.
  88  * @get_peer_mw_addr: To get the addr of peer mw[mw_idx].
  89  * @mw_set_trans: Set translation of internal memory that remote can access.
  90  * @ioremap: Translate the remote host address to bar address.
  91  * @get_link_status: get link status, link speed and link width.
  92  * @set_link: Set local side up/down.
  93  * @spad_read: Read local/peer spad register val.
  94  * @spad_write: Write val to local/peer spad register.
  95  * @db_read: Read doorbells status.
  96  * @db_clear: Clear local doorbells.
  97  * @db_set_mask: Set bits in db mask, preventing db interrpts generated
  98  * for those db bits.
  99  * @peer_db_set: Set doorbell bit to generate peer interrupt for that bit.
 100  * @vector_bind: Bind vector source [intr] to msix vector [msix].
 101  */
 102 struct ntb_dev_ops {
 103         int (*ntb_dev_init)(const struct rte_rawdev *dev);
 104         void *(*get_peer_mw_addr)(const struct rte_rawdev *dev, int mw_idx);
 105         int (*mw_set_trans)(const struct rte_rawdev *dev, int mw_idx,
 106                             uint64_t addr, uint64_t size);
 107         void *(*ioremap)(const struct rte_rawdev *dev, uint64_t addr);
 108         int (*get_link_status)(const struct rte_rawdev *dev);
 109         int (*set_link)(const struct rte_rawdev *dev, bool up);
 110         uint32_t (*spad_read)(const struct rte_rawdev *dev, int spad,
 111                               bool peer);
 112         int (*spad_write)(const struct rte_rawdev *dev, int spad,
 113                           bool peer, uint32_t spad_v);
 114         uint64_t (*db_read)(const struct rte_rawdev *dev);
 115         int (*db_clear)(const struct rte_rawdev *dev, uint64_t db_bits);
 116         int (*db_set_mask)(const struct rte_rawdev *dev, uint64_t db_mask);
 117         int (*peer_db_set)(const struct rte_rawdev *dev, uint8_t db_bit);
 118         int (*vector_bind)(const struct rte_rawdev *dev, uint8_t intr,
 119                            uint8_t msix);
 120 };
 121
 122 struct ntb_desc {
 123         uint64_t addr; /* buffer addr */
 124         uint16_t len;  /* buffer length */
 125         uint16_t rsv1;
 126         uint32_t rsv2;
 127 };
 128
 129 #define NTB_FLAG_EOP    1 /* end of packet */
 130 struct ntb_used {
 131         uint16_t len;     /* buffer length */
 132         uint16_t flags;   /* flags */
 133 };
 134
 135 struct ntb_rx_entry {
 136         struct rte_mbuf *mbuf;
 137 };
 138
 139 struct ntb_rx_queue {
 140         struct ntb_desc *rx_desc_ring;
 141         volatile struct ntb_used *rx_used_ring;
 142         uint16_t *avail_cnt;
 143         volatile uint16_t *used_cnt;
 144         uint16_t last_avail;
 145         uint16_t last_used;
 146         uint16_t nb_rx_desc;
 147
 148         uint16_t rx_free_thresh;
 149
 150         struct rte_mempool *mpool; /* mempool for mbuf allocation */
 151         struct ntb_rx_entry *sw_ring;
 152
 153         uint16_t queue_id;         /* DPDK queue index. */
 154         uint16_t port_id;          /* Device port identifier. */
 155
 156         struct ntb_hw *hw;
 157 };
 158
 159 struct ntb_tx_entry {
 160         struct rte_mbuf *mbuf;
 161         uint16_t next_id;
 162         uint16_t last_id;
 163 };
 164
 165 struct ntb_tx_queue {
 166         volatile struct ntb_desc *tx_desc_ring;
 167         struct ntb_used *tx_used_ring;
 168         volatile uint16_t *avail_cnt;
 169         uint16_t *used_cnt;
 170         uint16_t last_avail;          /* Next need to be free. */
 171         uint16_t last_used;           /* Next need to be sent. */
 172         uint16_t nb_tx_desc;
 173
 174         /* Total number of TX descriptors ready to be allocated. */
 175         uint16_t nb_tx_free;
 176         uint16_t tx_free_thresh;
 177
 178         struct ntb_tx_entry *sw_ring;
 179
 180         uint16_t queue_id;            /* DPDK queue index. */
 181         uint16_t port_id;             /* Device port identifier. */
 182
 183         struct ntb_hw *hw;
 184 };
 185
 186 struct ntb_header {
 187         uint16_t avail_cnt __rte_cache_aligned;
 188         uint16_t used_cnt __rte_cache_aligned;
 189         struct ntb_desc desc_ring[] __rte_cache_aligned;
 190 };
 191
 192 /* ntb private data. */
 193 struct ntb_hw {
 194         uint8_t mw_cnt;
 195         uint8_t db_cnt;
 196         uint8_t spad_cnt;
 197
 198         uint64_t db_valid_mask;
 199         uint64_t db_mask;
 200
 201         enum ntb_topo topo;
 202
 203         enum ntb_link link_status;
 204         enum ntb_speed link_speed;
 205         enum ntb_width link_width;
 206
 207         const struct ntb_dev_ops *ntb_ops;
 208
 209         struct rte_pci_device *pci_dev;
 210         char *hw_addr;
 211
 212         uint8_t peer_dev_up;
 213         uint64_t *mw_size;
 214         /* remote mem base addr */
 215         uint64_t *peer_mw_base;
 216
 217         uint16_t queue_pairs;
 218         uint16_t queue_size;
 219         uint32_t hdr_size_per_queue;
 220
 221         struct ntb_rx_queue **rx_queues;
 222         struct ntb_tx_queue **tx_queues;
 223
 224         /* memzone to populate RX ring. */
 225         const struct rte_memzone **mz;
 226         uint8_t used_mw_num;
 227
 228         uint8_t peer_used_mws;
 229
 230         uint64_t *ntb_xstats;
 231         uint64_t *ntb_xstats_off;
 232
 233         /* Reserve several spad for app to use. */
 234         int spad_user_list[NTB_SPAD_USER_MAX_NUM];
 235 };
 236
 237 #endif /* _NTB_H_ */