ceph/src/spdk/dpdk/kernel/linux/kni/ethtool/ixgbe/ixgbe_dcb.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*******************************************************************************
   3
   4   Intel 10 Gigabit PCI Express Linux driver
   5   Copyright(c) 1999 - 2012 Intel Corporation.
   6
   7   Contact Information:
   8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
   9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  10
  11 *******************************************************************************/
  12
  13 #ifndef _IXGBE_DCB_H_
  14 #define _IXGBE_DCB_H_
  15
  16
  17 #include "ixgbe_type.h"
  18
  19 /* DCB defines */
  20 /* DCB credit calculation defines */
  21 #define IXGBE_DCB_CREDIT_QUANTUM        64
  22 #define IXGBE_DCB_MAX_CREDIT_REFILL     200   /* 200 * 64B = 12800B */
  23 #define IXGBE_DCB_MAX_TSO_SIZE          (32 * 1024) /* Max TSO pkt size in DCB*/
  24 #define IXGBE_DCB_MAX_CREDIT            (2 * IXGBE_DCB_MAX_CREDIT_REFILL)
  25
  26 /* 513 for 32KB TSO packet */
  27 #define IXGBE_DCB_MIN_TSO_CREDIT        \
  28         ((IXGBE_DCB_MAX_TSO_SIZE / IXGBE_DCB_CREDIT_QUANTUM) + 1)
  29
  30 /* DCB configuration defines */
  31 #define IXGBE_DCB_MAX_USER_PRIORITY     8
  32 #define IXGBE_DCB_MAX_BW_GROUP          8
  33 #define IXGBE_DCB_BW_PERCENT            100
  34
  35 #define IXGBE_DCB_TX_CONFIG             0
  36 #define IXGBE_DCB_RX_CONFIG             1
  37
  38 /* DCB capability defines */
  39 #define IXGBE_DCB_PG_SUPPORT    0x00000001
  40 #define IXGBE_DCB_PFC_SUPPORT   0x00000002
  41 #define IXGBE_DCB_BCN_SUPPORT   0x00000004
  42 #define IXGBE_DCB_UP2TC_SUPPORT 0x00000008
  43 #define IXGBE_DCB_GSP_SUPPORT   0x00000010
  44
  45 struct ixgbe_dcb_support {
  46         u32 capabilities; /* DCB capabilities */
  47
  48         /* Each bit represents a number of TCs configurable in the hw.
  49          * If 8 traffic classes can be configured, the value is 0x80. */
  50         u8 traffic_classes;
  51         u8 pfc_traffic_classes;
  52 };
  53
  54 enum ixgbe_dcb_tsa {
  55         ixgbe_dcb_tsa_ets = 0,
  56         ixgbe_dcb_tsa_group_strict_cee,
  57         ixgbe_dcb_tsa_strict
  58 };
  59
  60 /* Traffic class bandwidth allocation per direction */
  61 struct ixgbe_dcb_tc_path {
  62         u8 bwg_id; /* Bandwidth Group (BWG) ID */
  63         u8 bwg_percent; /* % of BWG's bandwidth */
  64         u8 link_percent; /* % of link bandwidth */
  65         u8 up_to_tc_bitmap; /* User Priority to Traffic Class mapping */
  66         u16 data_credits_refill; /* Credit refill amount in 64B granularity */
  67         u16 data_credits_max; /* Max credits for a configured packet buffer
  68                                * in 64B granularity.*/
  69         enum ixgbe_dcb_tsa tsa; /* Link or Group Strict Priority */
  70 };
  71
  72 enum ixgbe_dcb_pfc {
  73         ixgbe_dcb_pfc_disabled = 0,
  74         ixgbe_dcb_pfc_enabled,
  75         ixgbe_dcb_pfc_enabled_txonly,
  76         ixgbe_dcb_pfc_enabled_rxonly
  77 };
  78
  79 /* Traffic class configuration */
  80 struct ixgbe_dcb_tc_config {
  81         struct ixgbe_dcb_tc_path path[2]; /* One each for Tx/Rx */
  82         enum ixgbe_dcb_pfc pfc; /* Class based flow control setting */
  83
  84         u16 desc_credits_max; /* For Tx Descriptor arbitration */
  85         u8 tc; /* Traffic class (TC) */
  86 };
  87
  88 enum ixgbe_dcb_pba {
  89         /* PBA[0-7] each use 64KB FIFO */
  90         ixgbe_dcb_pba_equal = PBA_STRATEGY_EQUAL,
  91         /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */
  92         ixgbe_dcb_pba_80_48 = PBA_STRATEGY_WEIGHTED
  93 };
  94
  95 struct ixgbe_dcb_num_tcs {
  96         u8 pg_tcs;
  97         u8 pfc_tcs;
  98 };
  99
 100 struct ixgbe_dcb_config {
 101         struct ixgbe_dcb_tc_config tc_config[IXGBE_DCB_MAX_TRAFFIC_CLASS];
 102         struct ixgbe_dcb_support support;
 103         struct ixgbe_dcb_num_tcs num_tcs;
 104         u8 bw_percentage[2][IXGBE_DCB_MAX_BW_GROUP]; /* One each for Tx/Rx */
 105         bool pfc_mode_enable;
 106         bool round_robin_enable;
 107
 108         enum ixgbe_dcb_pba rx_pba_cfg;
 109
 110         u32 dcb_cfg_version; /* Not used...OS-specific? */
 111         u32 link_speed; /* For bandwidth allocation validation purpose */
 112         bool vt_mode;
 113 };
 114
 115 /* DCB driver APIs */
 116
 117 /* DCB rule checking */
 118 s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *);
 119
 120 /* DCB credits calculation */
 121 s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int);
 122 s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *,
 123                                        struct ixgbe_dcb_config *, u32, u8);
 124
 125 /* DCB PFC */
 126 s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *);
 127 s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *);
 128
 129 /* DCB stats */
 130 s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *);
 131 s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
 132 s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
 133
 134 /* DCB config arbiters */
 135 s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *,
 136                                          struct ixgbe_dcb_config *);
 137 s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *,
 138                                          struct ixgbe_dcb_config *);
 139 s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *,
 140                                     struct ixgbe_dcb_config *);
 141
 142 /* DCB unpack routines */
 143 void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *, u8 *, u8 *);
 144 void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *, int, u16 *);
 145 void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *, u16 *);
 146 void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *, int, u8 *);
 147 void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *, int, u8 *);
 148 void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *, int, u8 *);
 149
 150 /* DCB initialization */
 151 s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, u16 *, u16 *, u8 *, u8 *, u8 *);
 152 s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *);
 153 #endif /* _IXGBE_DCB_H_ */