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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
3 */
4
5 #ifndef _RTE_VECT_X86_H_
6 #define _RTE_VECT_X86_H_
7
8 /**
9 * @file
10 *
11 * RTE SSE/AVX related header.
12 */
13
14 #include <stdint.h>
15 #include <rte_config.h>
16 #include "generic/rte_vect.h"
17
18 #if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))
19
20 #include <smmintrin.h> /* SSE4 */
21
22 #if defined(__AVX__)
23 #include <immintrin.h>
24 #endif
25
26 #else
27
28 #include <x86intrin.h>
29
30 #endif
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 typedef __m128i xmm_t;
37
38 #define XMM_SIZE (sizeof(xmm_t))
39 #define XMM_MASK (XMM_SIZE - 1)
40
41 typedef union rte_xmm {
42 xmm_t x;
43 uint8_t u8[XMM_SIZE / sizeof(uint8_t)];
44 uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
45 uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
46 uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
47 double pd[XMM_SIZE / sizeof(double)];
48 } rte_xmm_t;
49
50 #ifdef __AVX__
51
52 typedef __m256i ymm_t;
53
54 #define YMM_SIZE (sizeof(ymm_t))
55 #define YMM_MASK (YMM_SIZE - 1)
56
57 typedef union rte_ymm {
58 ymm_t y;
59 xmm_t x[YMM_SIZE / sizeof(xmm_t)];
60 uint8_t u8[YMM_SIZE / sizeof(uint8_t)];
61 uint16_t u16[YMM_SIZE / sizeof(uint16_t)];
62 uint32_t u32[YMM_SIZE / sizeof(uint32_t)];
63 uint64_t u64[YMM_SIZE / sizeof(uint64_t)];
64 double pd[YMM_SIZE / sizeof(double)];
65 } rte_ymm_t;
66
67 #endif /* __AVX__ */
68
69 #ifdef RTE_ARCH_I686
70 #define _mm_cvtsi128_si64(a) \
71 __extension__ ({ \
72 rte_xmm_t m; \
73 m.x = (a); \
74 (m.u64[0]); \
75 })
76 #endif
77
78 /*
79 * Prior to version 12.1 icc doesn't support _mm_set_epi64x.
80 */
81 #if (defined(__ICC) && __ICC < 1210)
82 #define _mm_set_epi64x(a, b) \
83 __extension__ ({ \
84 rte_xmm_t m; \
85 m.u64[0] = b; \
86 m.u64[1] = a; \
87 (m.x); \
88 })
89 #endif /* (defined(__ICC) && __ICC < 1210) */
90
91 #ifdef __cplusplus
92 }
93 #endif
94
95 #endif /* _RTE_VECT_X86_H_ */