2 ;; Copyright (c) 2012-2018, Intel Corporation
4 ;; Redistribution and use in source and binary forms, with or without
5 ;; modification, are permitted provided that the following conditions are met:
7 ;; * Redistributions of source code must retain the above copyright notice,
8 ;; this list of conditions and the following disclaimer.
9 ;; * Redistributions in binary form must reproduce the above copyright
10 ;; notice, this list of conditions and the following disclaimer in the
11 ;; documentation and/or other materials provided with the distribution.
12 ;; * Neither the name of Intel Corporation nor the names of its contributors
13 ;; may be used to endorse or promote products derived from this software
14 ;; without specific prior written permission.
16 ;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 ;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 ;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 ;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 ;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 ;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 ;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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25 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 %include "include/os.asm"
29 %include "job_aes_hmac.asm"
30 %include "mb_mgr_datastruct.asm"
31 %include "include/reg_sizes.asm"
32 %include "include/memcpy.asm"
33 %include "include/const.inc"
40 byteswap: ;ddq 0x08090a0b0c0d0e0f0001020304050607
41 dq 0x0001020304050607, 0x08090a0b0c0d0e0f
46 %define FUNC submit_job_hmac_sha_512_avx
47 %define SHA_X_DIGEST_SIZE 512
68 ; idx needs to be in rbx, rbp, r12-r15
73 %define start_offset r11
75 %define unused_lanes rbx
81 %define size_offset reg3
87 %define extra_blocks r8
96 ; This routine clobbers rbx, rbp, rsi, rdi
102 ; JOB* FUNC(MB_MGR_HMAC_sha_512_OOO *state, JOB_AES_HMAC *job)
103 ; arg 1 : rcx : state
105 MKGLOBAL(FUNC,function,internal)
112 mov [rsp + _gpr_save + 8*0], rbx
113 mov [rsp + _gpr_save + 8*1], rbp
115 mov [rsp + _gpr_save + 8*2], rsi
116 mov [rsp + _gpr_save + 8*3], rdi
118 mov [rsp + _rsp_save], rax ; original SP
120 mov unused_lanes, [state + _unused_lanes_sha512]
121 movzx lane, BYTE(unused_lanes)
123 imul lane_data, lane, _SHA512_LANE_DATA_size
124 lea lane_data, [state + _ldata_sha512 + lane_data]
125 mov [state + _unused_lanes_sha512], unused_lanes
126 mov len, [job + _msg_len_to_hash_in_bytes]
128 shr tmp, 7 ; divide by 128, len in terms of blocks
130 mov [lane_data + _job_in_lane_sha512], job
131 mov dword [lane_data + _outer_done_sha512], 0
133 vmovdqa xmm0, [state + _lens_sha512]
134 XVPINSRW xmm0, xmm1, p, lane, tmp, scale_x16
135 vmovdqa [state + _lens_sha512], xmm0
139 lea extra_blocks, [last_len + 17 + 127]
141 mov [lane_data + _extra_blocks_sha512], DWORD(extra_blocks)
144 add p, [job + _hash_start_src_offset_in_bytes]
145 mov [state + _args_data_ptr_sha512 + PTR_SZ*lane], p
154 vmovdqu xmm0, [p - 128 + I*4*16 + 0*16]
155 vmovdqu xmm1, [p - 128 + I*4*16 + 1*16]
156 vmovdqu xmm2, [p - 128 + I*4*16 + 2*16]
157 vmovdqu xmm3, [p - 128 + I*4*16 + 3*16]
158 vmovdqa [lane_data + _extra_block_sha512 + I*4*16 + 0*16], xmm0
159 vmovdqa [lane_data + _extra_block_sha512 + I*4*16 + 1*16], xmm1
160 vmovdqa [lane_data + _extra_block_sha512 + I*4*16 + 2*16], xmm2
161 vmovdqa [lane_data + _extra_block_sha512 + I*4*16 + 3*16], xmm3
167 mov size_offset, extra_blocks
169 sub size_offset, last_len
170 add size_offset, 128-8
171 mov [lane_data + _size_offset_sha512], DWORD(size_offset)
172 mov start_offset, 128
173 sub start_offset, last_len
174 mov [lane_data + _start_offset_sha512], DWORD(start_offset)
176 lea tmp, [8*128 + 8*len]
178 mov [lane_data + _extra_block_sha512 + size_offset], tmp
180 mov tmp, [job + _auth_key_xor_ipad]
184 vmovdqu xmm0, [tmp + I * 2 * 8]
185 vmovq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*lane + (2*I)*SHA512_DIGEST_ROW_SIZE], xmm0
186 vpextrq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*lane + (2*I + 1)*SHA512_DIGEST_ROW_SIZE], xmm0, 1
194 vmovdqa xmm0, [state + _lens_sha512]
195 XVPINSRW xmm0, xmm1, tmp, lane, extra_blocks, scale_x16
196 vmovdqa [state + _lens_sha512], xmm0
198 lea tmp, [lane_data + _extra_block_sha512 + start_offset]
199 mov [state + _args_data_ptr_sha512 + PTR_SZ*lane], tmp ;; 8 to hold a UINT8
200 mov dword [lane_data + _extra_blocks_sha512], 0
203 cmp unused_lanes, 0xff
210 vmovdqa xmm0, [state + _lens_sha512]
211 vphminposuw xmm1, xmm0
212 vpextrw DWORD(len2), xmm1, 0 ; min value
213 vpextrw DWORD(idx), xmm1, 1 ; min index (0...1)
217 vpshuflw xmm1, xmm1, 0xA0
218 vpsubw xmm0, xmm0, xmm1
219 vmovdqa [state + _lens_sha512], xmm0
221 ; "state" and "args" are the same address, arg1
224 ; state and idx are intact
227 ; process completed job "idx"
228 imul lane_data, idx, _SHA512_LANE_DATA_size
229 lea lane_data, [state + _ldata_sha512 + lane_data]
230 mov DWORD(extra_blocks), [lane_data + _extra_blocks_sha512]
232 jne proc_extra_blocks
233 cmp dword [lane_data + _outer_done_sha512], 0
237 mov dword [lane_data + _outer_done_sha512], 1
238 mov DWORD(size_offset), [lane_data + _size_offset_sha512]
239 mov qword [lane_data + _extra_block_sha512 + size_offset], 0
241 vmovdqa xmm0, [state + _lens_sha512]
242 XVPINSRW xmm0, xmm1, tmp, idx, 1, scale_x16
243 vmovdqa [state + _lens_sha512], xmm0
245 lea tmp, [lane_data + _outer_block_sha512]
246 mov job, [lane_data + _job_in_lane_sha512]
247 mov [state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp
250 %rep (SHA_X_DIGEST_SIZE / (8 * 16))
251 vmovq xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*I*SHA512_DIGEST_ROW_SIZE]
252 vpinsrq xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + (2*I + 1)*SHA512_DIGEST_ROW_SIZE], 1
253 vpshufb xmm0, [rel byteswap]
254 vmovdqa [lane_data + _outer_block_sha512 + I * 16], xmm0
258 mov tmp, [job + _auth_key_xor_opad]
261 vmovdqu xmm0, [tmp + I * 16]
262 vmovq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*I*SHA512_DIGEST_ROW_SIZE], xmm0
263 vpextrq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + (2*I + 1)*SHA512_DIGEST_ROW_SIZE], xmm0, 1
271 mov DWORD(start_offset), [lane_data + _start_offset_sha512]
273 vmovdqa xmm0, [state + _lens_sha512]
274 XVPINSRW xmm0, xmm1, tmp, idx, extra_blocks, scale_x16
275 vmovdqa [state + _lens_sha512], xmm0
277 lea tmp, [lane_data + _extra_block_sha512 + start_offset]
278 mov [state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp ;; idx is index of shortest length message
279 mov dword [lane_data + _extra_blocks_sha512], 0
284 ;; less than one message block of data
285 ;; destination extra block but backwards by len from where 0x80 pre-populated
286 lea p2, [lane_data + _extra_block + 128]
288 memcpy_avx_128_1 p2, p, len, tmp4, tmp2, xmm0, xmm1, xmm2, xmm3
289 mov unused_lanes, [state + _unused_lanes_sha512]
298 mov job_rax, [lane_data + _job_in_lane_sha512]
299 mov unused_lanes, [state + _unused_lanes_sha512]
300 mov qword [lane_data + _job_in_lane_sha512], 0
301 or dword [job_rax + _status], STS_COMPLETED_HMAC
304 mov [state + _unused_lanes_sha512], unused_lanes
306 mov p, [job_rax + _auth_tag_output]
308 %if (SHA_X_DIGEST_SIZE != 384)
309 cmp qword [job_rax + _auth_tag_output_len_in_bytes], 32
312 cmp qword [job_rax + _auth_tag_output_len_in_bytes], 24
315 ;; copy 32 bytes for SHA512 / 24 bytes and SHA384
316 mov QWORD(tmp), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 0*SHA512_DIGEST_ROW_SIZE]
317 mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 1*SHA512_DIGEST_ROW_SIZE]
318 mov QWORD(tmp3), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*SHA512_DIGEST_ROW_SIZE]
319 %if (SHA_X_DIGEST_SIZE != 384)
320 mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 3*SHA512_DIGEST_ROW_SIZE]
325 %if (SHA_X_DIGEST_SIZE != 384)
328 mov [p + 0*8], QWORD(tmp)
329 mov [p + 1*8], QWORD(tmp2)
330 mov [p + 2*8], QWORD(tmp3)
331 %if (SHA_X_DIGEST_SIZE != 384)
332 mov [p + 3*8], QWORD(tmp4)
337 ;; copy 64 bytes for SHA512 / 48 bytes and SHA384
338 mov QWORD(tmp), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 0*SHA512_DIGEST_ROW_SIZE]
339 mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 1*SHA512_DIGEST_ROW_SIZE]
340 mov QWORD(tmp3), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*SHA512_DIGEST_ROW_SIZE]
341 mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 3*SHA512_DIGEST_ROW_SIZE]
346 mov [p + 0*8], QWORD(tmp)
347 mov [p + 1*8], QWORD(tmp2)
348 mov [p + 2*8], QWORD(tmp3)
349 mov [p + 3*8], QWORD(tmp4)
351 mov QWORD(tmp), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 4*SHA512_DIGEST_ROW_SIZE]
352 mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 5*SHA512_DIGEST_ROW_SIZE]
353 %if (SHA_X_DIGEST_SIZE != 384)
354 mov QWORD(tmp3), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 6*SHA512_DIGEST_ROW_SIZE]
355 mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 7*SHA512_DIGEST_ROW_SIZE]
359 %if (SHA_X_DIGEST_SIZE != 384)
363 mov [p + 4*8], QWORD(tmp)
364 mov [p + 5*8], QWORD(tmp2)
365 %if (SHA_X_DIGEST_SIZE != 384)
366 mov [p + 6*8], QWORD(tmp3)
367 mov [p + 7*8], QWORD(tmp4)
373 ;; Clear digest (48B/64B), outer_block (48B/64B) and extra_block (128B) of returned job
376 mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + J*SHA512_DIGEST_ROW_SIZE], 0
379 %if (SHA_X_DIGEST_SIZE != 384)
380 mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 6*SHA256_DIGEST_ROW_SIZE], 0
381 mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 7*SHA256_DIGEST_ROW_SIZE], 0
385 imul lane_data, idx, _SHA512_LANE_DATA_size
386 lea lane_data, [state + _ldata_sha512 + lane_data]
387 ;; Clear first 128 bytes of extra_block
390 vmovdqa [lane_data + _extra_block + offset], xmm0
391 %assign offset (offset + 16)
394 ;; Clear first 48 bytes (SHA-384) or 64 bytes (SHA-512) of outer_block
395 vmovdqa [lane_data + _outer_block], xmm0
396 vmovdqa [lane_data + _outer_block + 16], xmm0
397 vmovdqa [lane_data + _outer_block + 32], xmm0
398 %if (SHA_X_DIGEST_SIZE != 384)
399 vmovdqa [lane_data + _outer_block + 48], xmm0
404 mov rbx, [rsp + _gpr_save + 8*0]
405 mov rbp, [rsp + _gpr_save + 8*1]
407 mov rsi, [rsp + _gpr_save + 8*2]
408 mov rdi, [rsp + _gpr_save + 8*3]
410 mov rsp, [rsp + _rsp_save] ; original SP
415 section .note.GNU-stack noalloc noexec nowrite progbits