2 ;; Copyright (c) 2012-2018, Intel Corporation
4 ;; Redistribution and use in source and binary forms, with or without
5 ;; modification, are permitted provided that the following conditions are met:
7 ;; * Redistributions of source code must retain the above copyright notice,
8 ;; this list of conditions and the following disclaimer.
9 ;; * Redistributions in binary form must reproduce the above copyright
10 ;; notice, this list of conditions and the following disclaimer in the
11 ;; documentation and/or other materials provided with the distribution.
12 ;; * Neither the name of Intel Corporation nor the names of its contributors
13 ;; may be used to endorse or promote products derived from this software
14 ;; without specific prior written permission.
16 ;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 ;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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21 ;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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25 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 %include "job_aes_hmac.asm"
30 %include "mb_mgr_datastruct.asm"
31 %include "reg_sizes.asm"
33 extern sha256_oct_avx2
38 byteswap: ;ddq 0x0c0d0e0f08090a0b0405060700010203
39 dq 0x0405060700010203, 0x0c0d0e0f08090a0b
41 ;ddq 0x0000000000000000000000000000FFFF
42 dq 0x000000000000FFFF, 0x0000000000000000
43 ;ddq 0x000000000000000000000000FFFF0000
44 dq 0x00000000FFFF0000, 0x0000000000000000
45 ;ddq 0x00000000000000000000FFFF00000000
46 dq 0x0000FFFF00000000, 0x0000000000000000
47 ;ddq 0x0000000000000000FFFF000000000000
48 dq 0xFFFF000000000000, 0x0000000000000000
49 ;ddq 0x000000000000FFFF0000000000000000
50 dq 0x0000000000000000, 0x000000000000FFFF
51 ;ddq 0x00000000FFFF00000000000000000000
52 dq 0x0000000000000000, 0x00000000FFFF0000
53 ;ddq 0x0000FFFF000000000000000000000000
54 dq 0x0000000000000000, 0x0000FFFF00000000
55 ;ddq 0xFFFF0000000000000000000000000000
56 dq 0x0000000000000000, 0xFFFF000000000000
68 %define FUNC flush_job_hmac_sha_256_avx2
87 ; idx needs to be in rbp, r15
90 %define unused_lanes r10
98 %define size_offset rax
99 %define start_offset rax
103 %define extra_blocks arg2
110 ; we clobber rsi, rbp; called routine also clobbers rbx, rdi, r12, r13, r14
116 %define APPEND(a,b) a %+ b
118 ; JOB* FUNC(MB_MGR_HMAC_SHA_256_OOO *state)
120 MKGLOBAL(FUNC,function,internal)
126 mov [rsp + _gpr_save + 8*0], rbx
127 mov [rsp + _gpr_save + 8*1], rbp
128 mov [rsp + _gpr_save + 8*2], r12
129 mov [rsp + _gpr_save + 8*3], r13
130 mov [rsp + _gpr_save + 8*4], r14
132 mov [rsp + _gpr_save + 8*5], rsi
133 mov [rsp + _gpr_save + 8*6], rdi
135 mov [rsp + _rsp_save], rax ; original SP
137 ; if bit (32+3) is set, then all lanes are empty
138 mov unused_lanes, [state + _unused_lanes_sha256]
139 bt unused_lanes, 32+3
142 ; find a lane with a non-null job
147 cmp qword [state + _ldata_sha256 + (I * _HMAC_SHA1_LANE_DATA_size) + _job_in_lane], 0
148 cmovne idx, [rel APPEND(lane_,I)]
153 ; copy idx to empty lanes
154 vmovdqa xmm0, [state + _lens_sha256]
155 mov tmp, [state + _args_data_ptr_sha256 + 8*idx]
159 cmp qword [state + _ldata_sha256 + I * _HMAC_SHA1_LANE_DATA_size + _job_in_lane], 0
161 mov [state + _args_data_ptr_sha256 + 8*I], tmp
162 vpor xmm0, xmm0, [rel len_masks + 16*I]
167 vmovdqa [state + _lens_sha256 ], xmm0
169 vphminposuw xmm1, xmm0
170 vpextrw DWORD(len2), xmm1, 0 ; min value
171 vpextrw DWORD(idx), xmm1, 1 ; min index (0...7)
175 vpbroadcastw xmm1, xmm1 ; duplicate words across all lanes
176 vpsubw xmm0, xmm0, xmm1
177 vmovdqa [state + _lens_sha256], xmm0
179 ; "state" and "args" are the same address, arg1
182 ; state and idx are intact
185 ; process completed job "idx"
186 imul lane_data, idx, _HMAC_SHA1_LANE_DATA_size
187 lea lane_data, [state + _ldata_sha256 + lane_data]
188 mov DWORD(extra_blocks), [lane_data + _extra_blocks]
190 jne proc_extra_blocks
191 cmp dword [lane_data + _outer_done], 0
195 mov dword [lane_data + _outer_done], 1
196 mov DWORD(size_offset), [lane_data + _size_offset]
197 mov qword [lane_data + _extra_block + size_offset], 0
198 mov word [state + _lens_sha256 + 2*idx], 1
199 lea tmp, [lane_data + _outer_block]
200 mov job, [lane_data + _job_in_lane]
201 mov [state + _args_data_ptr_sha256 + 8*idx], tmp
203 vmovd xmm0, [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
204 vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], 1
205 vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], 2
206 vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], 3
207 vpshufb xmm0, xmm0, [rel byteswap]
208 vmovd xmm1, [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE]
209 vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], 1
210 vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], 2
212 vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], 3
214 vpshufb xmm1, xmm1, [rel byteswap]
216 vmovdqa [lane_data + _outer_block], xmm0
217 vmovdqa [lane_data + _outer_block + 4*4], xmm1
219 mov dword [lane_data + _outer_block + 7*4], 0x80
222 mov tmp, [job + _auth_key_xor_opad]
224 vmovdqu xmm1, [tmp + 4*4]
225 vmovd [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE], xmm0
226 vpextrd [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], xmm0, 1
227 vpextrd [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], xmm0, 2
228 vpextrd [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], xmm0, 3
229 vmovd [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE], xmm1
230 vpextrd [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], xmm1, 1
231 vpextrd [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], xmm1, 2
232 vpextrd [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], xmm1, 3
237 mov DWORD(start_offset), [lane_data + _start_offset]
238 mov [state + _lens_sha256 + 2*idx], WORD(extra_blocks)
239 lea tmp, [lane_data + _extra_block + start_offset]
240 mov [state + _args_data_ptr_sha256 + 8*idx], tmp
241 mov dword [lane_data + _extra_blocks], 0
250 mov job_rax, [lane_data + _job_in_lane]
251 mov qword [lane_data + _job_in_lane], 0
252 or dword [job_rax + _status], STS_COMPLETED_HMAC
253 mov unused_lanes, [state + _unused_lanes_sha256]
256 mov [state + _unused_lanes_sha256], unused_lanes
258 mov p, [job_rax + _auth_tag_output]
260 ; copy SHA224=14bytes and SHA256=16bytes
261 mov DWORD(tmp), [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
262 mov DWORD(tmp2), [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE]
263 mov DWORD(tmp4), [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE]
264 mov DWORD(tmp5), [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE]
270 mov [p + 0*4], DWORD(tmp)
271 mov [p + 1*4], DWORD(tmp2)
272 mov [p + 2*4], DWORD(tmp4)
275 mov [p + 3*4], WORD(tmp5)
277 mov [p + 3*4], DWORD(tmp5)
283 mov rbx, [rsp + _gpr_save + 8*0]
284 mov rbp, [rsp + _gpr_save + 8*1]
285 mov r12, [rsp + _gpr_save + 8*2]
286 mov r13, [rsp + _gpr_save + 8*3]
287 mov r14, [rsp + _gpr_save + 8*4]
289 mov rsi, [rsp + _gpr_save + 8*5]
290 mov rdi, [rsp + _gpr_save + 8*6]
292 mov rsp, [rsp + _rsp_save] ; original SP
297 section .note.GNU-stack noalloc noexec nowrite progbits