2 ;; Copyright (c) 2012-2018, Intel Corporation
4 ;; Redistribution and use in source and binary forms, with or without
5 ;; modification, are permitted provided that the following conditions are met:
7 ;; * Redistributions of source code must retain the above copyright notice,
8 ;; this list of conditions and the following disclaimer.
9 ;; * Redistributions in binary form must reproduce the above copyright
10 ;; notice, this list of conditions and the following disclaimer in the
11 ;; documentation and/or other materials provided with the distribution.
12 ;; * Neither the name of Intel Corporation nor the names of its contributors
13 ;; may be used to endorse or promote products derived from this software
14 ;; without specific prior written permission.
16 ;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 ;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 ;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 ;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 ;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 ;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 ;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 ;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 ;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 ; This code schedules 1 blocks at a time, with 4 lanes per block
29 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
32 %define MOVDQ movdqu ;; assume buffers not aligned
35 %define FUNC sha512_one_block_sse
38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Define Macros
40 ; COPY_XMM_AND_BSWAP xmm, [mem], byte_flip_mask
41 ; Load xmm with mem and byte swap each dword
42 %macro COPY_XMM_AND_BSWAP 3
47 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
64 %define BYTE_FLIP_MASK xmm12
67 %define CTX rsi ; 2nd arg
68 %define INP rdi ; 1st arg
70 %define SRND rdi ; clobbers INP
75 %define CTX rdx ; 2nd arg
76 %define INP rcx ; 1st arg
78 %define SRND rcx ; clobbers INP
105 %define H0 0x6a09e667f3bcc908
106 %define H1 0xbb67ae8584caa73b
107 %define H2 0x3c6ef372fe94f82b
108 %define H3 0xa54ff53a5f1d36f1
109 %define H4 0x510e527fade682d1
110 %define H5 0x9b05688c2b3e6c1f
111 %define H6 0x1f83d9abfb41bd6b
112 %define H7 0x5be0cd19137e2179
116 ; Rotate values of symbols X0...X7
130 ; Rotate values of symbols a...h
143 %macro TWO_ROUNDS_AND_SCHED 0
145 ;; compute s0 four at a time and s1 two at a time
146 ;; compute W[-16] + W[-7] 4 at a time
150 ror y0, (41-18) ; y0 = e >> (41-18)
151 palignr XTMP0, X4, 8 ; XTMP0 = W[-7]
152 xor y0, e ; y0 = e ^ (e >> (41-18))
154 ror y1, (39-34) ; y1 = a >> (39-34)
155 xor y1, a ; y1 = a ^ (a >> (39-34)
157 ror y0, (18-14) ; y0 = (e >> (18-14)) ^ (e >> (41-14))
159 paddq XTMP0, X0 ; XTMP0 = W[-7] + W[-16]
160 ror y1, (34-28) ; y1 = (a >> (34-28)) ^ (a >> (39-28))
161 xor y0, e ; y0 = e ^ (e >> (18-14)) ^ (e >> (41-14))
162 and y2, e ; y2 = (f^g)&e
164 palignr XTMP1, X0, 8 ; XTMP1 = W[-15]
165 xor y1, a ; y1 = a ^ (a >> (34-28)) ^ (a >> (39-28))
166 xor y2, g ; y2 = CH = ((f^g)&e)^g
167 movdqa XTMP2, XTMP1 ; XTMP2 = W[-15]
168 ror y0, 14 ; y0 = S1 = (e>>14) & (e>>18) ^ (e>>41)
169 add y2, y0 ; y2 = S1 + CH
170 add y2, [rsp + _XFER + 0*8] ; y2 = k + w + S1 + CH
171 ror y1, 28 ; y1 = S0 = (a>>28) ^ (a>>34) ^ (a>>39)
172 movdqa XTMP3, XTMP1 ; XTMP3 = W[-15]
174 add h, y2 ; h = h + S1 + CH + k + w
179 add d, h ; d = d + t1
181 por XTMP1, XTMP2 ; XTMP1 = W[-15] ror 1
182 and y0, b ; y0 = (a|c)&b
183 add h, y1 ; h = t1 + S0
184 movdqa XTMP2, XTMP3 ; XTMP2 = W[-15]
186 or y0, y2 ; y0 = MAJ = (a|c)&b)|(a&c)
187 add h, y0 ; h = t1 + S0 + MAJ
188 movdqa X0, XTMP3 ; X0 = W[-15]
194 psrlq X0, 7 ; X0 = W[-15] >> 7
197 pxor XTMP1, XTMP2 ; XTMP1 = W[-15] ror 1 ^ W[-15] ror 8
198 ror y0, (41-18) ; y0 = e >> (41-18)
199 xor y0, e ; y0 = e ^ (e >> (41-18))
201 pxor XTMP1, X0 ; XTMP1 = s0
202 ror y1, (39-34) ; y1 = a >> (39-34)
203 xor y1, a ; y1 = a ^ (a >> (39-34)
205 movdqa XTMP2, X7 ; XTMP2 = W[-2]
206 ror y0, (18-14) ; y0 = (e >> (18-14)) ^ (e >> (41-14))
208 paddq XTMP0, XTMP1 ; XTMP0 = W[-16] + W[-7] + s0
209 ror y1, (34-28) ; y1 = (a >> (34-28)) ^ (a >> (39-28))
210 xor y0, e ; y0 = e ^ (e >> (18-14)) ^ (e >> (41-14))
211 movdqa XTMP3, XTMP2 ; XTMP3 = W[-2]
212 movdqa X0, XTMP2 ; X0 = W[-2]
213 and y2, e ; y2 = (f^g)&e
214 ror y0, 14 ; y0 = S1 = (e>>14) & (e>>18) ^ (e>>41)
215 xor y1, a ; y1 = a ^ (a >> (34-28)) ^ (a >> (39-28))
217 xor y2, g ; y2 = CH = ((f^g)&e)^g
218 add y2, y0 ; y2 = S1 + CH
219 add y2, [rsp + _XFER + 1*8] ; y2 = k + w + S1 + CH
221 ror y1, 28 ; y1 = S0 = (a>>28) ^ (a>>34) ^ (a>>39)
223 add h, y2 ; h = h + S1 + CH + k + w
224 por XTMP3, X0 ; XTMP3 = W[-2] ror 19
227 movdqa X0, XTMP2 ; X0 = W[-2]
228 movdqa XTMP1, XTMP2 ; XTMP1 = W[-2]
229 add d, h ; d = d + t1
232 and y0, b ; y0 = (a|c)&b
233 add h, y1 ; h = t1 + S0
235 or y0, y2 ; y0 = MAJ = (a|c)&b)|(a&c)
236 add h, y0 ; h = t1 + S0 + MAJ
237 por X0, XTMP1 ; X0 = W[-2] ror 61
238 psrlq XTMP2, 6 ; XTMP2 = W[-2] >> 6
240 pxor X0, XTMP2 ; X0 = s1
241 paddq X0, XTMP0 ; X0 = {W[1], W[0]}
247 ;; input is [rsp + _XFER + %1 * 8]
250 ror y0, (41-18) ; y0 = e >> (41-18)
252 xor y0, e ; y0 = e ^ (e >> (41-18))
253 ror y1, (39-34) ; y1 = a >> (39-34)
255 xor y1, a ; y1 = a ^ (a >> (39-34)
256 ror y0, (18-14) ; y0 = (e >> (18-14)) ^ (e >> (41-14))
258 xor y0, e ; y0 = e ^ (e >> (18-14)) ^ (e >> (25-6))
259 ror y1, (34-28) ; y1 = (a >> (34-28)) ^ (a >> (39-28))
260 and y2, e ; y2 = (f^g)&e
261 xor y1, a ; y1 = a ^ (a >> (34-28)) ^ (a >> (39-28))
262 ror y0, 14 ; y0 = S1 = (e>>14) & (e>>18) ^ (e>>41)
263 xor y2, g ; y2 = CH = ((f^g)&e)^g
264 add y2, y0 ; y2 = S1 + CH
265 ror y1, 28 ; y1 = S0 = (a>>28) ^ (a>>34) ^ (a>>39)
266 add y2, [rsp + _XFER + %1*8] ; y2 = k + w + S1 + CH
268 add h, y2 ; h = h + S1 + CH + k + w
271 add d, h ; d = d + t1
273 and y0, b ; y0 = (a|c)&b
274 add h, y1 ; h = t1 + S0
275 or y0, y2 ; y0 = MAJ = (a|c)&b)|(a&c)
276 add h, y0 ; h = t1 + S0 + MAJ
284 dq 0x428a2f98d728ae22,0x7137449123ef65cd
285 dq 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
286 dq 0x3956c25bf348b538,0x59f111f1b605d019
287 dq 0x923f82a4af194f9b,0xab1c5ed5da6d8118
288 dq 0xd807aa98a3030242,0x12835b0145706fbe
289 dq 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
290 dq 0x72be5d74f27b896f,0x80deb1fe3b1696b1
291 dq 0x9bdc06a725c71235,0xc19bf174cf692694
292 dq 0xe49b69c19ef14ad2,0xefbe4786384f25e3
293 dq 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
294 dq 0x2de92c6f592b0275,0x4a7484aa6ea6e483
295 dq 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
296 dq 0x983e5152ee66dfab,0xa831c66d2db43210
297 dq 0xb00327c898fb213f,0xbf597fc7beef0ee4
298 dq 0xc6e00bf33da88fc2,0xd5a79147930aa725
299 dq 0x06ca6351e003826f,0x142929670a0e6e70
300 dq 0x27b70a8546d22ffc,0x2e1b21385c26c926
301 dq 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
302 dq 0x650a73548baf63de,0x766a0abb3c77b2a8
303 dq 0x81c2c92e47edaee6,0x92722c851482353b
304 dq 0xa2bfe8a14cf10364,0xa81a664bbc423001
305 dq 0xc24b8b70d0f89791,0xc76c51a30654be30
306 dq 0xd192e819d6ef5218,0xd69906245565a910
307 dq 0xf40e35855771202a,0x106aa07032bbd1b8
308 dq 0x19a4c116b8d2d0c8,0x1e376c085141ab53
309 dq 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
310 dq 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
311 dq 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
312 dq 0x748f82ee5defb2fc,0x78a5636f43172f60
313 dq 0x84c87814a1f0ab72,0x8cc702081a6439ec
314 dq 0x90befffa23631e28,0xa4506cebde82bde9
315 dq 0xbef9a3f7b2c67915,0xc67178f2e372532b
316 dq 0xca273eceea26619c,0xd186b8c721c0c207
317 dq 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
318 dq 0x06f067aa72176fba,0x0a637dc5a2c898a6
319 dq 0x113f9804bef90dae,0x1b710b35131c471b
320 dq 0x28db77f523047d84,0x32caab7b40c72493
321 dq 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
322 dq 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
323 dq 0x5fcb6fab3ad6faec,0x6c44198c4a475817
335 PSHUFFLE_BYTE_FLIP_MASK: ;ddq 0x08090a0b0c0d0e0f0001020304050607
336 dq 0x0001020304050607, 0x08090a0b0c0d0e0f
338 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
339 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
340 ;; void FUNC(void *input_data, UINT64 digest[8])
341 ;; arg 1 : pointer to input data
342 ;; arg 2 : pointer to digest
344 MKGLOBAL(FUNC,function,)
359 movdqa [rsp + _XMM_SAVE + 0*16],xmm6
360 movdqa [rsp + _XMM_SAVE + 1*16],xmm7
361 movdqa [rsp + _XMM_SAVE + 2*16],xmm8
362 movdqa [rsp + _XMM_SAVE + 3*16],xmm9
363 movdqa [rsp + _XMM_SAVE + 4*16],xmm10
364 movdqa [rsp + _XMM_SAVE + 5*16],xmm11
365 movdqa [rsp + _XMM_SAVE + 6*16],xmm12
366 movdqa [rsp + _XMM_SAVE + 7*16],xmm13
369 ;; load initial digest
379 movdqa BYTE_FLIP_MASK, [rel PSHUFFLE_BYTE_FLIP_MASK]
383 ;; byte swap first 16 qwords
384 COPY_XMM_AND_BSWAP X0, [INP + 0*16], BYTE_FLIP_MASK
385 COPY_XMM_AND_BSWAP X1, [INP + 1*16], BYTE_FLIP_MASK
386 COPY_XMM_AND_BSWAP X2, [INP + 2*16], BYTE_FLIP_MASK
387 COPY_XMM_AND_BSWAP X3, [INP + 3*16], BYTE_FLIP_MASK
388 COPY_XMM_AND_BSWAP X4, [INP + 4*16], BYTE_FLIP_MASK
389 COPY_XMM_AND_BSWAP X5, [INP + 5*16], BYTE_FLIP_MASK
390 COPY_XMM_AND_BSWAP X6, [INP + 6*16], BYTE_FLIP_MASK
391 COPY_XMM_AND_BSWAP X7, [INP + 7*16], BYTE_FLIP_MASK
393 ;; schedule 64 input qwords, by doing 4 iterations of 16 rounds
401 paddq XFER, [TBL + i*16]
402 movdqa [rsp + _XFER], XFER
408 paddq XFER, [TBL + 7*16]
409 movdqa [rsp + _XFER], XFER
425 paddq X0, [TBL + 0*16]
426 movdqa [rsp + _XFER], X0
430 paddq X1, [TBL + 1*16]
431 movdqa [rsp + _XFER], X1
435 paddq X2, [TBL + 2*16]
436 movdqa [rsp + _XFER], X2
440 paddq X3, [TBL + 3*16]
441 movdqa [rsp + _XFER], X3
468 movdqa xmm6,[rsp + _XMM_SAVE + 0*16]
469 movdqa xmm7,[rsp + _XMM_SAVE + 1*16]
470 movdqa xmm8,[rsp + _XMM_SAVE + 2*16]
471 movdqa xmm9,[rsp + _XMM_SAVE + 3*16]
472 movdqa xmm10,[rsp + _XMM_SAVE + 4*16]
473 movdqa xmm11,[rsp + _XMM_SAVE + 5*16]
474 movdqa xmm12,[rsp + _XMM_SAVE + 6*16]
475 movdqa xmm13,[rsp + _XMM_SAVE + 7*16]
494 section .note.GNU-stack noalloc noexec nowrite progbits