ceph/src/spdk/intel-ipsec-mb/sse/sha_256_mult_sse.asm

   1 ;;
   2 ;; Copyright (c) 2012-2018, Intel Corporation
   3 ;;
   4 ;; Redistribution and use in source and binary forms, with or without
   5 ;; modification, are permitted provided that the following conditions are met:
   6 ;;
   7 ;;     * Redistributions of source code must retain the above copyright notice,
   8 ;;       this list of conditions and the following disclaimer.
   9 ;;     * Redistributions in binary form must reproduce the above copyright
  10 ;;       notice, this list of conditions and the following disclaimer in the
  11 ;;       documentation and/or other materials provided with the distribution.
  12 ;;     * Neither the name of Intel Corporation nor the names of its contributors
  13 ;;       may be used to endorse or promote products derived from this software
  14 ;;       without specific prior written permission.
  15 ;;
  16 ;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17 ;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18 ;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19 ;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
  20 ;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21 ;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22 ;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  23 ;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  24 ;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 ;;
  27
  28 ;; code to compute quad SHA256 using SSE
  29 ;; outer calling routine takes care of save and restore of XMM registers
  30 ;; Logic designed/laid out by JDG
  31
  32 ;; Stack must be aligned to 16 bytes before call
  33 ;; Windows clobbers:  rax rbx     rdx             r8 r9 r10 r11 r12
  34 ;; Windows preserves:         rcx     rsi rdi rbp                   r12 r14 r15
  35 ;;
  36 ;; Linux clobbers:    rax rbx         rsi         r8 r9 r10 r11 r12
  37 ;; Linux preserves:           rcx rdx     rdi rbp                   r13 r14 r15
  38 ;;
  39 ;; clobbers xmm0-15
  40
  41 %include "os.asm"
  42 %include "mb_mgr_datastruct.asm"
  43
  44 ;%define DO_DBGPRINT
  45 %include "dbgprint.asm"
  46
  47 section .data
  48 default rel
  49 align 64
  50 MKGLOBAL(K256_4,data,internal)
  51 K256_4:
  52         dq      0x428a2f98428a2f98, 0x428a2f98428a2f98
  53         dq      0x7137449171374491, 0x7137449171374491
  54         dq      0xb5c0fbcfb5c0fbcf, 0xb5c0fbcfb5c0fbcf
  55         dq      0xe9b5dba5e9b5dba5, 0xe9b5dba5e9b5dba5
  56         dq      0x3956c25b3956c25b, 0x3956c25b3956c25b
  57         dq      0x59f111f159f111f1, 0x59f111f159f111f1
  58         dq      0x923f82a4923f82a4, 0x923f82a4923f82a4
  59         dq      0xab1c5ed5ab1c5ed5, 0xab1c5ed5ab1c5ed5
  60         dq      0xd807aa98d807aa98, 0xd807aa98d807aa98
  61         dq      0x12835b0112835b01, 0x12835b0112835b01
  62         dq      0x243185be243185be, 0x243185be243185be
  63         dq      0x550c7dc3550c7dc3, 0x550c7dc3550c7dc3
  64         dq      0x72be5d7472be5d74, 0x72be5d7472be5d74
  65         dq      0x80deb1fe80deb1fe, 0x80deb1fe80deb1fe
  66         dq      0x9bdc06a79bdc06a7, 0x9bdc06a79bdc06a7
  67         dq      0xc19bf174c19bf174, 0xc19bf174c19bf174
  68         dq      0xe49b69c1e49b69c1, 0xe49b69c1e49b69c1
  69         dq      0xefbe4786efbe4786, 0xefbe4786efbe4786
  70         dq      0x0fc19dc60fc19dc6, 0x0fc19dc60fc19dc6
  71         dq      0x240ca1cc240ca1cc, 0x240ca1cc240ca1cc
  72         dq      0x2de92c6f2de92c6f, 0x2de92c6f2de92c6f
  73         dq      0x4a7484aa4a7484aa, 0x4a7484aa4a7484aa
  74         dq      0x5cb0a9dc5cb0a9dc, 0x5cb0a9dc5cb0a9dc
  75         dq      0x76f988da76f988da, 0x76f988da76f988da
  76         dq      0x983e5152983e5152, 0x983e5152983e5152
  77         dq      0xa831c66da831c66d, 0xa831c66da831c66d
  78         dq      0xb00327c8b00327c8, 0xb00327c8b00327c8
  79         dq      0xbf597fc7bf597fc7, 0xbf597fc7bf597fc7
  80         dq      0xc6e00bf3c6e00bf3, 0xc6e00bf3c6e00bf3
  81         dq      0xd5a79147d5a79147, 0xd5a79147d5a79147
  82         dq      0x06ca635106ca6351, 0x06ca635106ca6351
  83         dq      0x1429296714292967, 0x1429296714292967
  84         dq      0x27b70a8527b70a85, 0x27b70a8527b70a85
  85         dq      0x2e1b21382e1b2138, 0x2e1b21382e1b2138
  86         dq      0x4d2c6dfc4d2c6dfc, 0x4d2c6dfc4d2c6dfc
  87         dq      0x53380d1353380d13, 0x53380d1353380d13
  88         dq      0x650a7354650a7354, 0x650a7354650a7354
  89         dq      0x766a0abb766a0abb, 0x766a0abb766a0abb
  90         dq      0x81c2c92e81c2c92e, 0x81c2c92e81c2c92e
  91         dq      0x92722c8592722c85, 0x92722c8592722c85
  92         dq      0xa2bfe8a1a2bfe8a1, 0xa2bfe8a1a2bfe8a1
  93         dq      0xa81a664ba81a664b, 0xa81a664ba81a664b
  94         dq      0xc24b8b70c24b8b70, 0xc24b8b70c24b8b70
  95         dq      0xc76c51a3c76c51a3, 0xc76c51a3c76c51a3
  96         dq      0xd192e819d192e819, 0xd192e819d192e819
  97         dq      0xd6990624d6990624, 0xd6990624d6990624
  98         dq      0xf40e3585f40e3585, 0xf40e3585f40e3585
  99         dq      0x106aa070106aa070, 0x106aa070106aa070
 100         dq      0x19a4c11619a4c116, 0x19a4c11619a4c116
 101         dq      0x1e376c081e376c08, 0x1e376c081e376c08
 102         dq      0x2748774c2748774c, 0x2748774c2748774c
 103         dq      0x34b0bcb534b0bcb5, 0x34b0bcb534b0bcb5
 104         dq      0x391c0cb3391c0cb3, 0x391c0cb3391c0cb3
 105         dq      0x4ed8aa4a4ed8aa4a, 0x4ed8aa4a4ed8aa4a
 106         dq      0x5b9cca4f5b9cca4f, 0x5b9cca4f5b9cca4f
 107         dq      0x682e6ff3682e6ff3, 0x682e6ff3682e6ff3
 108         dq      0x748f82ee748f82ee, 0x748f82ee748f82ee
 109         dq      0x78a5636f78a5636f, 0x78a5636f78a5636f
 110         dq      0x84c8781484c87814, 0x84c8781484c87814
 111         dq      0x8cc702088cc70208, 0x8cc702088cc70208
 112         dq      0x90befffa90befffa, 0x90befffa90befffa
 113         dq      0xa4506ceba4506ceb, 0xa4506ceba4506ceb
 114         dq      0xbef9a3f7bef9a3f7, 0xbef9a3f7bef9a3f7
 115         dq      0xc67178f2c67178f2, 0xc67178f2c67178f2
 116 PSHUFFLE_BYTE_FLIP_MASK: ;ddq 0x0c0d0e0f08090a0b0405060700010203
 117         dq 0x0405060700010203, 0x0c0d0e0f08090a0b
 118
 119 section .text
 120
 121 %ifdef LINUX ; Linux definitions
 122  %define arg1   rdi
 123  %define arg2   rsi
 124 %else ; Windows definitions
 125  %define arg1   rcx
 126  %define arg2   rdx
 127 %endif
 128
 129 ; Common definitions
 130 %define STATE    arg1
 131 %define INP_SIZE arg2
 132
 133 %define IDX     rax
 134 %define ROUND   rbx
 135 %define TBL     r12
 136
 137 %define inp0 r8
 138 %define inp1 r9
 139 %define inp2 r10
 140 %define inp3 r11
 141
 142 %define a xmm0
 143 %define b xmm1
 144 %define c xmm2
 145 %define d xmm3
 146 %define e xmm4
 147 %define f xmm5
 148 %define g xmm6
 149 %define h xmm7
 150
 151 %define a0 xmm8
 152 %define a1 xmm9
 153 %define a2 xmm10
 154
 155 %define TT0 xmm14
 156 %define TT1 xmm13
 157 %define TT2 xmm12
 158 %define TT3 xmm11
 159 %define TT4 xmm10
 160 %define TT5 xmm9
 161
 162 %define T1  xmm14
 163 %define TMP xmm15
 164
 165 %define SZ4     4*SHA256_DIGEST_WORD_SIZE       ; Size of one vector register
 166 %define ROUNDS 64*SZ4
 167
 168 ; Define stack usage
 169 struc STACK
 170 _DATA:          resb    SZ4 * 16
 171 _DIGEST:        resb    SZ4 * NUM_SHA256_DIGEST_WORDS
 172                 resb    8       ; for alignment, must be odd multiple of 8
 173 endstruc
 174
 175 %define MOVPS   movups
 176
 177 ; transpose r0, r1, r2, r3, t0, t1
 178 ; "transpose" data in {r0..r3} using temps {t0..t3}
 179 ; Input looks like: {r0 r1 r2 r3}
 180 ; r0 = {a3 a2 a1 a0}
 181 ; r1 = {b3 b2 b1 b0}
 182 ; r2 = {c3 c2 c1 c0}
 183 ; r3 = {d3 d2 d1 d0}
 184 ;
 185 ; output looks like: {t0 r1 r0 r3}
 186 ; t0 = {d0 c0 b0 a0}
 187 ; r1 = {d1 c1 b1 a1}
 188 ; r0 = {d2 c2 b2 a2}
 189 ; r3 = {d3 c3 b3 a3}
 190 ;
 191 %macro TRANSPOSE 6
 192 %define %%r0 %1
 193 %define %%r1 %2
 194 %define %%r2 %3
 195 %define %%r3 %4
 196 %define %%t0 %5
 197 %define %%t1 %6
 198         movaps  %%t0, %%r0              ; t0 = {a3 a2 a1 a0}
 199         shufps  %%t0, %%r1, 0x44        ; t0 = {b1 b0 a1 a0}
 200         shufps  %%r0, %%r1, 0xEE        ; r0 = {b3 b2 a3 a2}
 201
 202         movaps  %%t1, %%r2              ; t1 = {c3 c2 c1 c0}
 203         shufps  %%t1, %%r3, 0x44        ; t1 = {d1 d0 c1 c0}
 204         shufps  %%r2, %%r3, 0xEE        ; r2 = {d3 d2 c3 c2}
 205
 206         movaps  %%r1, %%t0              ; r1 = {b1 b0 a1 a0}
 207         shufps  %%r1, %%t1, 0xDD        ; r1 = {d1 c1 b1 a1}
 208
 209         movaps  %%r3, %%r0              ; r3 = {b3 b2 a3 a2}
 210         shufps  %%r3, %%r2, 0xDD        ; r3 = {d3 c3 b3 a3}
 211
 212         shufps  %%r0, %%r2, 0x88        ; r0 = {d2 c2 b2 a2}
 213         shufps  %%t0, %%t1, 0x88        ; t0 = {d0 c0 b0 a0}
 214 %endmacro
 215
 216
 217
 218 %macro ROTATE_ARGS 0
 219 %xdefine TMP_ h
 220 %xdefine h g
 221 %xdefine g f
 222 %xdefine f e
 223 %xdefine e d
 224 %xdefine d c
 225 %xdefine c b
 226 %xdefine b a
 227 %xdefine a TMP_
 228 %endm
 229
 230 ; PRORD reg, imm, tmp
 231 %macro PRORD 3
 232 %define %%reg %1
 233 %define %%imm %2
 234 %define %%tmp %3
 235         movdqa  %%tmp, %%reg
 236         psrld   %%reg, %%imm
 237         pslld   %%tmp, (32-(%%imm))
 238         por     %%reg, %%tmp
 239 %endmacro
 240
 241 %macro PRORD 2
 242         PRORD   %1, %2, TMP
 243 %endmacro
 244
 245 ;; arguments passed implicitly in preprocessor symbols i, a...h
 246 %macro ROUND_00_15 2
 247 %define %%T1 %1
 248 %define %%i  %2
 249         movdqa  a0, e           ; sig1: a0 = e
 250         movdqa  a1, e           ; sig1: s1 = e
 251         PRORD   a0, (11-6)      ; sig1: a0 = (e >> 5)
 252
 253         movdqa  a2, f           ; ch: a2 = f
 254         pxor    a2, g           ; ch: a2 = f^g
 255         pand    a2, e           ; ch: a2 = (f^g)&e
 256         pxor    a2, g           ; a2 = ch
 257
 258         PRORD   a1, 25          ; sig1: a1 = (e >> 25)
 259         movdqa  [SZ4*(%%i&0xf) + rsp],%%T1
 260         paddd   %%T1,[TBL + ROUND]      ; T1 = W + K
 261         pxor    a0, e           ; sig1: a0 = e ^ (e >> 5)
 262         PRORD   a0, 6           ; sig1: a0 = (e >> 6) ^ (e >> 11)
 263         paddd   h, a2           ; h = h + ch
 264         movdqa  a2, a           ; sig0: a2 = a
 265         PRORD   a2, (13-2)      ; sig0: a2 = (a >> 11)
 266         paddd   h, %%T1         ; h = h + ch + W + K
 267         pxor    a0, a1          ; a0 = sigma1
 268         movdqa  a1, a           ; sig0: a1 = a
 269         movdqa  %%T1, a         ; maj: T1 = a
 270         PRORD   a1, 22          ; sig0: a1 = (a >> 22)
 271         pxor    %%T1, c         ; maj: T1 = a^c
 272         add     ROUND, SZ4      ; ROUND++
 273         pand    %%T1, b         ; maj: T1 = (a^c)&b
 274         paddd   h, a0
 275
 276         paddd   d, h
 277
 278         pxor    a2, a           ; sig0: a2 = a ^ (a >> 11)
 279         PRORD   a2, 2           ; sig0: a2 = (a >> 2) ^ (a >> 13)
 280         pxor    a2, a1          ; a2 = sig0
 281         movdqa  a1, a           ; maj: a1 = a
 282         pand    a1, c           ; maj: a1 = a&c
 283         por     a1, %%T1        ; a1 = maj
 284         paddd   h, a1           ; h = h + ch + W + K + maj
 285         paddd   h, a2           ; h = h + ch + W + K + maj + sigma0
 286
 287         ROTATE_ARGS
 288 %endm
 289
 290
 291 ;; arguments passed implicitly in preprocessor symbols i, a...h
 292 %macro ROUND_16_XX 2
 293 %define %%T1 %1
 294 %define %%i  %2
 295         movdqa  %%T1, [SZ4*((%%i-15)&0xf) + rsp]
 296         movdqa  a1, [SZ4*((%%i-2)&0xf) + rsp]
 297         movdqa  a0, %%T1
 298         PRORD   %%T1, 18-7
 299         movdqa  a2, a1
 300         PRORD   a1, 19-17
 301         pxor    %%T1, a0
 302         PRORD   %%T1, 7
 303         pxor    a1, a2
 304         PRORD   a1, 17
 305         psrld   a0, 3
 306         pxor    %%T1, a0
 307         psrld   a2, 10
 308         pxor    a1, a2
 309         paddd   %%T1, [SZ4*((%%i-16)&0xf) + rsp]
 310         paddd   a1, [SZ4*((%%i-7)&0xf) + rsp]
 311         paddd   %%T1, a1
 312
 313         ROUND_00_15 %%T1, %%i
 314 %endm
 315
 316
 317
 318 ;; SHA256_ARGS:
 319 ;;   UINT128 digest[8];  // transposed digests
 320 ;;   UINT8  *data_ptr[4];
 321 ;;
 322
 323 ;; void sha_256_mult_sse(SHA256_ARGS *args, UINT64 num_blocks);
 324 ;; arg 1 : STATE    : pointer args
 325 ;; arg 2 : INP_SIZE : size of data in blocks (assumed >= 1)
 326 ;;
 327 MKGLOBAL(sha_256_mult_sse,function,internal)
 328 align 32
 329 sha_256_mult_sse:
 330         ; general registers preserved in outer calling routine
 331         ; outer calling routine saves all the XMM registers
 332         sub     rsp, STACK_size
 333
 334         ;; Load the pre-transposed incoming digest.
 335         movdqa  a,[STATE + 0 * SHA256_DIGEST_ROW_SIZE ]
 336         movdqa  b,[STATE + 1 * SHA256_DIGEST_ROW_SIZE ]
 337         movdqa  c,[STATE + 2 * SHA256_DIGEST_ROW_SIZE ]
 338         movdqa  d,[STATE + 3 * SHA256_DIGEST_ROW_SIZE ]
 339         movdqa  e,[STATE + 4 * SHA256_DIGEST_ROW_SIZE ]
 340         movdqa  f,[STATE + 5 * SHA256_DIGEST_ROW_SIZE ]
 341         movdqa  g,[STATE + 6 * SHA256_DIGEST_ROW_SIZE ]
 342         movdqa  h,[STATE + 7 * SHA256_DIGEST_ROW_SIZE ]
 343
 344         DBGPRINTL_XMM "incoming transposed sha256 digest", a, b, c, d, e, f, g, h
 345         lea     TBL,[rel K256_4]
 346
 347         ;; load the address of each of the 4 message lanes
 348         ;; getting ready to transpose input onto stack
 349         mov     inp0,[STATE + _data_ptr_sha256 + 0*PTR_SZ]
 350         mov     inp1,[STATE + _data_ptr_sha256 + 1*PTR_SZ]
 351         mov     inp2,[STATE + _data_ptr_sha256 + 2*PTR_SZ]
 352         mov     inp3,[STATE + _data_ptr_sha256 + 3*PTR_SZ]
 353         DBGPRINTL64 "incoming input data ptrs ", inp0, inp1, inp2, inp3
 354         xor     IDX, IDX
 355 lloop:
 356         xor     ROUND, ROUND
 357
 358         ;; save old digest
 359         movdqa  [rsp + _DIGEST + 0*SZ4], a
 360         movdqa  [rsp + _DIGEST + 1*SZ4], b
 361         movdqa  [rsp + _DIGEST + 2*SZ4], c
 362         movdqa  [rsp + _DIGEST + 3*SZ4], d
 363         movdqa  [rsp + _DIGEST + 4*SZ4], e
 364         movdqa  [rsp + _DIGEST + 5*SZ4], f
 365         movdqa  [rsp + _DIGEST + 6*SZ4], g
 366         movdqa  [rsp + _DIGEST + 7*SZ4], h
 367
 368 %assign i 0
 369 %rep 4
 370         movdqa  TMP, [rel PSHUFFLE_BYTE_FLIP_MASK]
 371         MOVPS   TT2,[inp0+IDX+i*16]
 372         MOVPS   TT1,[inp1+IDX+i*16]
 373         MOVPS   TT4,[inp2+IDX+i*16]
 374         MOVPS   TT3,[inp3+IDX+i*16]
 375         TRANSPOSE       TT2, TT1, TT4, TT3, TT0, TT5
 376         pshufb  TT0, TMP
 377         pshufb  TT1, TMP
 378         pshufb  TT2, TMP
 379         pshufb  TT3, TMP
 380         ROUND_00_15     TT0,(i*4+0)
 381         ROUND_00_15     TT1,(i*4+1)
 382         ROUND_00_15     TT2,(i*4+2)
 383         ROUND_00_15     TT3,(i*4+3)
 384 %assign i (i+1)
 385 %endrep
 386         add     IDX, 4*4*4
 387
 388
 389 %assign i (i*4)
 390
 391         jmp     Lrounds_16_xx
 392 align 16
 393 Lrounds_16_xx:
 394 %rep 16
 395         ROUND_16_XX     T1, i
 396 %assign i (i+1)
 397 %endrep
 398
 399         cmp     ROUND,ROUNDS
 400         jb      Lrounds_16_xx
 401
 402         ;; add old digest
 403         paddd   a, [rsp + _DIGEST + 0*SZ4]
 404         paddd   b, [rsp + _DIGEST + 1*SZ4]
 405         paddd   c, [rsp + _DIGEST + 2*SZ4]
 406         paddd   d, [rsp + _DIGEST + 3*SZ4]
 407         paddd   e, [rsp + _DIGEST + 4*SZ4]
 408         paddd   f, [rsp + _DIGEST + 5*SZ4]
 409         paddd   g, [rsp + _DIGEST + 6*SZ4]
 410         paddd   h, [rsp + _DIGEST + 7*SZ4]
 411
 412         sub     INP_SIZE, 1  ;; unit is blocks
 413         jne     lloop
 414
 415         ; write back to memory (state object) the transposed digest
 416         movdqa  [STATE+0*SHA256_DIGEST_ROW_SIZE ],a
 417         movdqa  [STATE+1*SHA256_DIGEST_ROW_SIZE ],b
 418         movdqa  [STATE+2*SHA256_DIGEST_ROW_SIZE ],c
 419         movdqa  [STATE+3*SHA256_DIGEST_ROW_SIZE ],d
 420         movdqa  [STATE+4*SHA256_DIGEST_ROW_SIZE ],e
 421         movdqa  [STATE+5*SHA256_DIGEST_ROW_SIZE ],f
 422         movdqa  [STATE+6*SHA256_DIGEST_ROW_SIZE ],g
 423         movdqa  [STATE+7*SHA256_DIGEST_ROW_SIZE ],h
 424         DBGPRINTL_XMM "updated transposed sha256 digest", a, b, c, d, e, f, g, h
 425
 426         ; update input pointers
 427         add     inp0, IDX
 428         mov     [STATE + _data_ptr_sha256 + 0*8], inp0
 429         add     inp1, IDX
 430         mov     [STATE + _data_ptr_sha256 + 1*8], inp1
 431         add     inp2, IDX
 432         mov     [STATE + _data_ptr_sha256 + 2*8], inp2
 433         add     inp3, IDX
 434         mov     [STATE + _data_ptr_sha256 + 3*8], inp3
 435
 436         DBGPRINTL64 "updated input data ptrs ", inp0, inp1, inp2, inp3
 437
 438         ;;;;;;;;;;;;;;;;
 439         ;; Postamble
 440
 441         add     rsp, STACK_size
 442         ; outer calling routine restores XMM and other GP registers
 443         ret
 444
 445 %ifdef LINUX
 446 section .note.GNU-stack noalloc noexec nowrite progbits
 447 %endif