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1 /**********************************************************************
2 Copyright(c) 2019 Arm Corporation All rights reserved.
3
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions
6 are met:
7 * Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9 * Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in
11 the documentation and/or other materials provided with the
12 distribution.
13 * Neither the name of Arm Corporation nor the names of its
14 contributors may be used to endorse or promote products derived
15 from this software without specific prior written permission.
16
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 **********************************************************************/
29
30 #ifndef __BITBUF2_AARCH64_H__
31 #define __BITBUF2_AARCH64_H__
32 #include "options_aarch64.h"
33
34 #ifdef __ASSEMBLY__
35 .macro update_bits stream:req,code:req,code_len:req,m_bits:req,m_bit_count:req \
36 m_out_buf:req
37
38 lsl x_\code,x_\code,x_\m_bit_count
39 orr x_\m_bits,x_\code,x_\m_bits
40 add x_\m_bit_count,x_\code_len,x_\m_bit_count
41
42 str x_\m_bits,[x_\m_out_buf]
43
44 and w_\code,w_\m_bit_count,-8
45 lsr w_\code_len,w_\m_bit_count,3
46 add x_\m_out_buf,x_\m_out_buf,w_\code_len,uxtw
47 sub w_\m_bit_count,w_\m_bit_count,w_\code
48 lsr x_\m_bits,x_\m_bits,x_\code
49
50 str x_\m_bits,[stream,_internal_state_bitbuf_m_bits]
51 str w_\m_bit_count,[stream,_internal_state_bitbuf_m_bit_count]
52 str x_\m_out_buf,[stream,_internal_state_bitbuf_m_out_buf]
53
54
55 .endm
56 #endif
57 #endif