1 /* NOTE: this header is included in op-i386.c where global register
2 variable are used. Care must be used when including glibc headers.
42 #define TRAP_FLAG 0x0100
43 #define INTERRUPT_FLAG 0x0200
44 #define DIRECTION_FLAG 0x0400
45 #define IOPL_FLAG_MASK 0x3000
46 #define NESTED_FLAG 0x4000
47 #define BYTE_FL 0x8000 /* Intel reserved! */
48 #define RF_FLAG 0x10000
49 #define VM_FLAG 0x20000
57 #define EXCP05_BOUND 6
58 #define EXCP06_ILLOP 7
61 #define EXCP09_XERR 10
63 #define EXCP0B_NOSEG 12
64 #define EXCP0C_STACK 13
66 #define EXCP0E_PAGE 15
67 #define EXCP10_COPR 17
68 #define EXCP11_ALGN 18
69 #define EXCP12_MCHK 19
71 #define EXCP_SIGNAL 256 /* async signal */
74 CC_OP_DYNAMIC
, /* must use dynamic code to get cc_op */
75 CC_OP_EFLAGS
, /* all cc are explicitely computed, CC_SRC = flags */
76 CC_OP_MUL
, /* modify all flags, C, O = (CC_SRC != 0) */
78 CC_OP_ADDB
, /* modify all flags, CC_DST = res, CC_SRC = src1 */
82 CC_OP_ADCB
, /* modify all flags, CC_DST = res, CC_SRC = src1 */
86 CC_OP_SUBB
, /* modify all flags, CC_DST = res, CC_SRC = src1 */
90 CC_OP_SBBB
, /* modify all flags, CC_DST = res, CC_SRC = src1 */
94 CC_OP_LOGICB
, /* modify all flags, CC_DST = res */
98 CC_OP_INCB
, /* modify all flags except, CC_DST = res, CC_SRC = C */
102 CC_OP_DECB
, /* modify all flags except, CC_DST = res, CC_SRC = C */
106 CC_OP_SHLB
, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
110 CC_OP_SARB
, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
118 #define USE_X86LDOUBLE
121 #ifdef USE_X86LDOUBLE
122 typedef long double CPU86_LDouble
;
124 typedef double CPU86_LDouble
;
127 typedef struct SegmentCache
{
133 typedef struct SegmentDescriptorTable
{
136 /* this is the returned base when reading the register, just to
137 avoid that the emulated program modifies it */
138 unsigned long emu_base
;
139 } SegmentDescriptorTable
;
141 typedef struct CPUX86State
{
142 /* standard registers */
147 /* emulator internal eflags handling */
151 int32_t df
; /* D flag : 1 if D = 0, -1 if D = 1 */
154 unsigned int fpstt
; /* top of stack index */
157 uint8_t fptags
[8]; /* 0 = valid, 1 = empty */
158 CPU86_LDouble fpregs
[8];
160 /* emulator internal variables */
164 uint32_t segs
[6]; /* selector values */
165 SegmentCache seg_cache
[6]; /* info taken from LDT/GDT */
166 SegmentDescriptorTable gdt
;
167 SegmentDescriptorTable ldt
;
168 SegmentDescriptorTable idt
;
170 /* various CPU modes */
173 /* exception handling */
178 /* all CPU memory access use these macros */
179 static inline int ldub(void *ptr
)
181 return *(uint8_t *)ptr
;
184 static inline int ldsb(void *ptr
)
186 return *(int8_t *)ptr
;
189 static inline void stb(void *ptr
, int v
)
194 #ifdef WORDS_BIGENDIAN
196 /* conservative code for little endian unaligned accesses */
197 static inline int lduw(void *ptr
)
201 __asm__
__volatile__ ("lhbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
205 return p
[0] | (p
[1] << 8);
209 static inline int ldsw(void *ptr
)
213 __asm__
__volatile__ ("lhbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
217 return (int16_t)(p
[0] | (p
[1] << 8));
221 static inline int ldl(void *ptr
)
225 __asm__
__volatile__ ("lwbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
229 return p
[0] | (p
[1] << 8) | (p
[2] << 16) | (p
[3] << 24);
233 static inline uint64_t ldq(void *ptr
)
239 return v1
| ((uint64_t)v2
<< 32);
242 static inline void stw(void *ptr
, int v
)
245 __asm__
__volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr
) : "r" (v
), "r" (ptr
));
253 static inline void stl(void *ptr
, int v
)
256 __asm__
__volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr
) : "r" (v
), "r" (ptr
));
266 static inline void stq(void *ptr
, uint64_t v
)
275 static inline float ldfl(void *ptr
)
285 static inline double ldfq(void *ptr
)
295 static inline void stfl(void *ptr
, float v
)
305 static inline void stfq(void *ptr
, double v
)
317 static inline int lduw(void *ptr
)
319 return *(uint16_t *)ptr
;
322 static inline int ldsw(void *ptr
)
324 return *(int16_t *)ptr
;
327 static inline int ldl(void *ptr
)
329 return *(uint32_t *)ptr
;
332 static inline uint64_t ldq(void *ptr
)
334 return *(uint64_t *)ptr
;
337 static inline void stw(void *ptr
, int v
)
339 *(uint16_t *)ptr
= v
;
342 static inline void stl(void *ptr
, int v
)
344 *(uint32_t *)ptr
= v
;
347 static inline void stq(void *ptr
, uint64_t v
)
349 *(uint64_t *)ptr
= v
;
354 static inline float ldfl(void *ptr
)
356 return *(float *)ptr
;
359 static inline double ldfq(void *ptr
)
361 return *(double *)ptr
;
364 static inline void stfl(void *ptr
, float v
)
369 static inline void stfq(void *ptr
, double v
)
376 void cpu_x86_outb(int addr
, int val
);
377 void cpu_x86_outw(int addr
, int val
);
378 void cpu_x86_outl(int addr
, int val
);
379 int cpu_x86_inb(int addr
);
380 int cpu_x86_inw(int addr
);
381 int cpu_x86_inl(int addr
);
384 CPUX86State
*cpu_x86_init(void);
385 int cpu_x86_exec(CPUX86State
*s
);
386 void cpu_x86_close(CPUX86State
*s
);
388 /* needed to load some predefinied segment registers */
389 void cpu_x86_load_seg(CPUX86State
*s
, int seg_reg
, int selector
);
391 /* internal functions */
393 #define GEN_FLAG_CODE32_SHIFT 0
394 #define GEN_FLAG_ADDSEG_SHIFT 1
395 #define GEN_FLAG_SS32_SHIFT 2
396 #define GEN_FLAG_ST_SHIFT 3
398 int cpu_x86_gen_code(uint8_t *gen_code_buf
, int max_code_size
,
399 int *gen_code_size_ptr
,
400 uint8_t *pc_start
, uint8_t *cs_base
, int flags
);
401 void cpu_x86_tblocks_init(void);
403 #endif /* CPU_I386_H */