1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2 From: Alexander Bulekov <alxndr@bu.edu>
3 Date: Sat, 4 Feb 2023 23:07:34 -0500
4 Subject: [PATCH] memory: prevent dma-reentracy issues
6 Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA.
7 This flag is set/checked prior to calling a device's MemoryRegion
8 handlers, and set when device code initiates DMA. The purpose of this
9 flag is to prevent two types of DMA-based reentrancy issues:
11 1.) mmio -> dma -> mmio case
12 2.) bh -> dma write -> mmio case
14 These issues have led to problems such as stack-exhaustion and
17 Summary of the problem from Peter Maydell:
18 https://lore.kernel.org/qemu-devel/CAFEAcA_23vc7hE3iaM-JVA6W38LK4hJoWae5KcknhPRD5fPBZA@mail.gmail.com
20 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/62
21 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/540
22 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/541
23 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/556
24 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/557
25 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/827
26 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1282
28 Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
29 Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
30 Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
31 Acked-by: Peter Xu <peterx@redhat.com>
32 (picked-up from https://lists.nongnu.org/archive/html/qemu-devel/2023-02/msg01142.html)
33 Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
35 include/hw/qdev-core.h | 7 +++++++
36 softmmu/memory.c | 17 +++++++++++++++++
37 softmmu/trace-events | 1 +
38 3 files changed, 25 insertions(+)
40 diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
41 index bd50ad5ee1..7623703943 100644
42 --- a/include/hw/qdev-core.h
43 +++ b/include/hw/qdev-core.h
44 @@ -162,6 +162,10 @@ struct NamedClockList {
45 QLIST_ENTRY(NamedClockList) node;
50 +} MemReentrancyGuard;
54 * @realized: Indicates whether the device has been fully constructed.
55 @@ -194,6 +198,9 @@ struct DeviceState {
56 int alias_required_for_version;
57 ResettableState reset;
58 GSList *unplug_blockers;
60 + /* Is the device currently in mmio/pio/dma? Used to prevent re-entrancy */
61 + MemReentrancyGuard mem_reentrancy_guard;
64 struct DeviceListener {
65 diff --git a/softmmu/memory.c b/softmmu/memory.c
66 index b1a6cae6f5..e4d2268d32 100644
67 --- a/softmmu/memory.c
68 +++ b/softmmu/memory.c
69 @@ -533,6 +533,7 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
73 + DeviceState *dev = NULL;
74 MemTxResult r = MEMTX_OK;
76 if (!access_size_min) {
77 @@ -542,6 +543,19 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
81 + /* Do not allow more than one simultanous access to a device's IO Regions */
83 + !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
84 + dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
86 + if (dev->mem_reentrancy_guard.engaged_in_io) {
87 + trace_memory_region_reentrant_io(get_cpu_index(), mr, addr, size);
90 + dev->mem_reentrancy_guard.engaged_in_io = true;
94 /* FIXME: support unaligned access? */
95 access_size = MAX(MIN(size, access_size_max), access_size_min);
96 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
97 @@ -556,6 +570,9 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
102 + dev->mem_reentrancy_guard.engaged_in_io = false;
107 diff --git a/softmmu/trace-events b/softmmu/trace-events
108 index 22606dc27b..62d04ea9a7 100644
109 --- a/softmmu/trace-events
110 +++ b/softmmu/trace-events
111 @@ -13,6 +13,7 @@ memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, u
112 memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'"
113 memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
114 memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
115 +memory_region_reentrant_io(int cpu_index, void *mr, uint64_t offset, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" size %u"
116 memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
117 memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
118 memory_region_sync_dirty(const char *mr, const char *listener, int global) "mr '%s' listener '%s' synced (global=%d)"