dis-asm.h

   1 /* Interface between the opcode library and its callers.
   2    Written by Cygnus Support, 1993.
   3
   4    The opcode library (libopcodes.a) provides instruction decoders for
   5    a large variety of instruction sets, callable with an identical
   6    interface, for making instruction-processing programs more independent
   7    of the instruction set being processed.  */
   8
   9 #ifndef DIS_ASM_H
  10 #define DIS_ASM_H
  11
  12 #include <stdio.h>
  13 #include <string.h>
  14 #include <inttypes.h>
  15
  16 #define PARAMS(x) x
  17 typedef void *PTR;
  18 typedef uint64_t bfd_vma;
  19 typedef uint8_t bfd_byte;
  20
  21 enum bfd_flavour {
  22   bfd_target_unknown_flavour,
  23   bfd_target_aout_flavour,
  24   bfd_target_coff_flavour,
  25   bfd_target_ecoff_flavour,
  26   bfd_target_elf_flavour,
  27   bfd_target_ieee_flavour,
  28   bfd_target_nlm_flavour,
  29   bfd_target_oasys_flavour,
  30   bfd_target_tekhex_flavour,
  31   bfd_target_srec_flavour,
  32   bfd_target_ihex_flavour,
  33   bfd_target_som_flavour,
  34   bfd_target_os9k_flavour,
  35   bfd_target_versados_flavour,
  36   bfd_target_msdos_flavour,
  37   bfd_target_evax_flavour
  38 };
  39
  40 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
  41
  42 enum bfd_architecture
  43 {
  44   bfd_arch_unknown,    /* File arch not known */
  45   bfd_arch_obscure,    /* Arch known, not one of these */
  46   bfd_arch_m68k,       /* Motorola 68xxx */
  47 #define bfd_mach_m68000 1
  48 #define bfd_mach_m68008 2
  49 #define bfd_mach_m68010 3
  50 #define bfd_mach_m68020 4
  51 #define bfd_mach_m68030 5
  52 #define bfd_mach_m68040 6
  53 #define bfd_mach_m68060 7
  54   bfd_arch_vax,        /* DEC Vax */
  55   bfd_arch_i960,       /* Intel 960 */
  56      /* The order of the following is important.
  57        lower number indicates a machine type that
  58        only accepts a subset of the instructions
  59        available to machines with higher numbers.
  60        The exception is the "ca", which is
  61        incompatible with all other machines except
  62        "core". */
  63
  64 #define bfd_mach_i960_core      1
  65 #define bfd_mach_i960_ka_sa     2
  66 #define bfd_mach_i960_kb_sb     3
  67 #define bfd_mach_i960_mc        4
  68 #define bfd_mach_i960_xa        5
  69 #define bfd_mach_i960_ca        6
  70 #define bfd_mach_i960_jx        7
  71 #define bfd_mach_i960_hx        8
  72
  73   bfd_arch_a29k,       /* AMD 29000 */
  74   bfd_arch_sparc,      /* SPARC */
  75 #define bfd_mach_sparc                 1
  76  /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
  77 #define bfd_mach_sparc_sparclet        2
  78 #define bfd_mach_sparc_sparclite       3
  79 #define bfd_mach_sparc_v8plus          4
  80 #define bfd_mach_sparc_v8plusa         5  /* with ultrasparc add'ns */
  81 #define bfd_mach_sparc_v9              6
  82 #define bfd_mach_sparc_v9a             7  /* with ultrasparc add'ns */
  83  /* Nonzero if MACH has the v9 instruction set.  */
  84 #define bfd_mach_sparc_v9_p(mach) \
  85   ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
  86   bfd_arch_mips,       /* MIPS Rxxxx */
  87 #define bfd_mach_mips3000              3000
  88 #define bfd_mach_mips3900              3900
  89 #define bfd_mach_mips4000              4000
  90 #define bfd_mach_mips4010              4010
  91 #define bfd_mach_mips4100              4100
  92 #define bfd_mach_mips4300              4300
  93 #define bfd_mach_mips4400              4400
  94 #define bfd_mach_mips4600              4600
  95 #define bfd_mach_mips4650              4650
  96 #define bfd_mach_mips5000              5000
  97 #define bfd_mach_mips6000              6000
  98 #define bfd_mach_mips8000              8000
  99 #define bfd_mach_mips10000             10000
 100 #define bfd_mach_mips16                16
 101   bfd_arch_i386,       /* Intel 386 */
 102 #define bfd_mach_i386_i386 0
 103 #define bfd_mach_i386_i8086 1
 104   bfd_arch_we32k,      /* AT&T WE32xxx */
 105   bfd_arch_tahoe,      /* CCI/Harris Tahoe */
 106   bfd_arch_i860,       /* Intel 860 */
 107   bfd_arch_romp,       /* IBM ROMP PC/RT */
 108   bfd_arch_alliant,    /* Alliant */
 109   bfd_arch_convex,     /* Convex */
 110   bfd_arch_m88k,       /* Motorola 88xxx */
 111   bfd_arch_pyramid,    /* Pyramid Technology */
 112   bfd_arch_h8300,      /* Hitachi H8/300 */
 113 #define bfd_mach_h8300   1
 114 #define bfd_mach_h8300h  2
 115 #define bfd_mach_h8300s  3
 116   bfd_arch_powerpc,    /* PowerPC */
 117   bfd_arch_rs6000,     /* IBM RS/6000 */
 118   bfd_arch_hppa,       /* HP PA RISC */
 119   bfd_arch_d10v,       /* Mitsubishi D10V */
 120   bfd_arch_z8k,        /* Zilog Z8000 */
 121 #define bfd_mach_z8001         1
 122 #define bfd_mach_z8002         2
 123   bfd_arch_h8500,      /* Hitachi H8/500 */
 124   bfd_arch_sh,         /* Hitachi SH */
 125 #define bfd_mach_sh            0
 126 #define bfd_mach_sh3        0x30
 127 #define bfd_mach_sh3e       0x3e
 128 #define bfd_mach_sh4        0x40
 129   bfd_arch_alpha,      /* Dec Alpha */
 130   bfd_arch_arm,        /* Advanced Risc Machines ARM */
 131 #define bfd_mach_arm_2         1
 132 #define bfd_mach_arm_2a                2
 133 #define bfd_mach_arm_3         3
 134 #define bfd_mach_arm_3M        4
 135 #define bfd_mach_arm_4                 5
 136 #define bfd_mach_arm_4T        6
 137   bfd_arch_ns32k,      /* National Semiconductors ns32000 */
 138   bfd_arch_w65,        /* WDC 65816 */
 139   bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
 140   bfd_arch_v850,       /* NEC V850 */
 141 #define bfd_mach_v850          0
 142   bfd_arch_arc,        /* Argonaut RISC Core */
 143 #define bfd_mach_arc_base 0
 144   bfd_arch_m32r,       /* Mitsubishi M32R/D */
 145 #define bfd_mach_m32r          0  /* backwards compatibility */
 146   bfd_arch_mn10200,    /* Matsushita MN10200 */
 147   bfd_arch_mn10300,    /* Matsushita MN10300 */
 148   bfd_arch_last
 149   };
 150
 151 typedef struct symbol_cache_entry
 152 {
 153     const char *name;
 154     union
 155     {
 156         PTR p;
 157         bfd_vma i;
 158     } udata;
 159 } asymbol;
 160
 161 typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
 162
 163 enum dis_insn_type {
 164   dis_noninsn,                  /* Not a valid instruction */
 165   dis_nonbranch,                /* Not a branch instruction */
 166   dis_branch,                   /* Unconditional branch */
 167   dis_condbranch,               /* Conditional branch */
 168   dis_jsr,                      /* Jump to subroutine */
 169   dis_condjsr,                  /* Conditional jump to subroutine */
 170   dis_dref,                     /* Data reference instruction */
 171   dis_dref2                     /* Two data references in instruction */
 172 };
 173
 174 /* This struct is passed into the instruction decoding routine,
 175    and is passed back out into each callback.  The various fields are used
 176    for conveying information from your main routine into your callbacks,
 177    for passing information into the instruction decoders (such as the
 178    addresses of the callback functions), or for passing information
 179    back from the instruction decoders to their callers.
 180
 181    It must be initialized before it is first passed; this can be done
 182    by hand, or using one of the initialization macros below.  */
 183
 184 typedef struct disassemble_info {
 185   fprintf_ftype fprintf_func;
 186   FILE *stream;
 187   PTR application_data;
 188
 189   /* Target description.  We could replace this with a pointer to the bfd,
 190      but that would require one.  There currently isn't any such requirement
 191      so to avoid introducing one we record these explicitly.  */
 192   /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
 193   enum bfd_flavour flavour;
 194   /* The bfd_arch value.  */
 195   enum bfd_architecture arch;
 196   /* The bfd_mach value.  */
 197   unsigned long mach;
 198   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
 199   enum bfd_endian endian;
 200
 201   /* An array of pointers to symbols either at the location being disassembled
 202      or at the start of the function being disassembled.  The array is sorted
 203      so that the first symbol is intended to be the one used.  The others are
 204      present for any misc. purposes.  This is not set reliably, but if it is
 205      not NULL, it is correct.  */
 206   asymbol **symbols;
 207   /* Number of symbols in array.  */
 208   int num_symbols;
 209
 210   /* For use by the disassembler.
 211      The top 16 bits are reserved for public use (and are documented here).
 212      The bottom 16 bits are for the internal use of the disassembler.  */
 213   unsigned long flags;
 214 #define INSN_HAS_RELOC  0x80000000
 215   PTR private_data;
 216
 217   /* Function used to get bytes to disassemble.  MEMADDR is the
 218      address of the stuff to be disassembled, MYADDR is the address to
 219      put the bytes in, and LENGTH is the number of bytes to read.
 220      INFO is a pointer to this struct.
 221      Returns an errno value or 0 for success.  */
 222   int (*read_memory_func)
 223     PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
 224              struct disassemble_info *info));
 225
 226   /* Function which should be called if we get an error that we can't
 227      recover from.  STATUS is the errno value from read_memory_func and
 228      MEMADDR is the address that we were trying to read.  INFO is a
 229      pointer to this struct.  */
 230   void (*memory_error_func)
 231     PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
 232
 233   /* Function called to print ADDR.  */
 234   void (*print_address_func)
 235     PARAMS ((bfd_vma addr, struct disassemble_info *info));
 236
 237   /* Function called to determine if there is a symbol at the given ADDR.
 238      If there is, the function returns 1, otherwise it returns 0.
 239      This is used by ports which support an overlay manager where
 240      the overlay number is held in the top part of an address.  In
 241      some circumstances we want to include the overlay number in the
 242      address, (normally because there is a symbol associated with
 243      that address), but sometimes we want to mask out the overlay bits.  */
 244   int (* symbol_at_address_func)
 245     PARAMS ((bfd_vma addr, struct disassemble_info * info));
 246
 247   /* These are for buffer_read_memory.  */
 248   bfd_byte *buffer;
 249   bfd_vma buffer_vma;
 250   int buffer_length;
 251
 252   /* This variable may be set by the instruction decoder.  It suggests
 253       the number of bytes objdump should display on a single line.  If
 254       the instruction decoder sets this, it should always set it to
 255       the same value in order to get reasonable looking output.  */
 256   int bytes_per_line;
 257
 258   /* the next two variables control the way objdump displays the raw data */
 259   /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
 260   /* output will look like this:
 261      00:   00000000 00000000
 262      with the chunks displayed according to "display_endian". */
 263   int bytes_per_chunk;
 264   enum bfd_endian display_endian;
 265
 266   /* Results from instruction decoders.  Not all decoders yet support
 267      this information.  This info is set each time an instruction is
 268      decoded, and is only valid for the last such instruction.
 269
 270      To determine whether this decoder supports this information, set
 271      insn_info_valid to 0, decode an instruction, then check it.  */
 272
 273   char insn_info_valid;         /* Branch info has been set. */
 274   char branch_delay_insns;      /* How many sequential insn's will run before
 275                                    a branch takes effect.  (0 = normal) */
 276   char data_size;               /* Size of data reference in insn, in bytes */
 277   enum dis_insn_type insn_type; /* Type of instruction */
 278   bfd_vma target;               /* Target address of branch or dref, if known;
 279                                    zero if unknown.  */
 280   bfd_vma target2;              /* Second target address for dref2 */
 281
 282 } disassemble_info;
 283
 284 \f
 285 /* Standard disassemblers.  Disassemble one instruction at the given
 286    target address.  Return number of bytes processed.  */
 287 typedef int (*disassembler_ftype)
 288      PARAMS((bfd_vma, disassemble_info *));
 289
 290 extern int print_insn_big_mips          PARAMS ((bfd_vma, disassemble_info*));
 291 extern int print_insn_little_mips       PARAMS ((bfd_vma, disassemble_info*));
 292 extern int print_insn_i386              PARAMS ((bfd_vma, disassemble_info*));
 293 extern int print_insn_m68k              PARAMS ((bfd_vma, disassemble_info*));
 294 extern int print_insn_z8001             PARAMS ((bfd_vma, disassemble_info*));
 295 extern int print_insn_z8002             PARAMS ((bfd_vma, disassemble_info*));
 296 extern int print_insn_h8300             PARAMS ((bfd_vma, disassemble_info*));
 297 extern int print_insn_h8300h            PARAMS ((bfd_vma, disassemble_info*));
 298 extern int print_insn_h8300s            PARAMS ((bfd_vma, disassemble_info*));
 299 extern int print_insn_h8500             PARAMS ((bfd_vma, disassemble_info*));
 300 extern int print_insn_alpha             PARAMS ((bfd_vma, disassemble_info*));
 301 extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
 302 extern int print_insn_big_arm           PARAMS ((bfd_vma, disassemble_info*));
 303 extern int print_insn_little_arm        PARAMS ((bfd_vma, disassemble_info*));
 304 extern int print_insn_sparc             PARAMS ((bfd_vma, disassemble_info*));
 305 extern int print_insn_big_a29k          PARAMS ((bfd_vma, disassemble_info*));
 306 extern int print_insn_little_a29k       PARAMS ((bfd_vma, disassemble_info*));
 307 extern int print_insn_i960              PARAMS ((bfd_vma, disassemble_info*));
 308 extern int print_insn_sh                PARAMS ((bfd_vma, disassemble_info*));
 309 extern int print_insn_shl               PARAMS ((bfd_vma, disassemble_info*));
 310 extern int print_insn_hppa              PARAMS ((bfd_vma, disassemble_info*));
 311 extern int print_insn_m32r              PARAMS ((bfd_vma, disassemble_info*));
 312 extern int print_insn_m88k              PARAMS ((bfd_vma, disassemble_info*));
 313 extern int print_insn_mn10200           PARAMS ((bfd_vma, disassemble_info*));
 314 extern int print_insn_mn10300           PARAMS ((bfd_vma, disassemble_info*));
 315 extern int print_insn_ns32k             PARAMS ((bfd_vma, disassemble_info*));
 316 extern int print_insn_big_powerpc       PARAMS ((bfd_vma, disassemble_info*));
 317 extern int print_insn_little_powerpc    PARAMS ((bfd_vma, disassemble_info*));
 318 extern int print_insn_rs6000            PARAMS ((bfd_vma, disassemble_info*));
 319 extern int print_insn_w65               PARAMS ((bfd_vma, disassemble_info*));
 320 extern int print_insn_d10v              PARAMS ((bfd_vma, disassemble_info*));
 321 extern int print_insn_v850              PARAMS ((bfd_vma, disassemble_info*));
 322 extern int print_insn_tic30             PARAMS ((bfd_vma, disassemble_info*));
 323 extern int print_insn_ppc               PARAMS ((bfd_vma, disassemble_info*));
 324
 325 #if 0
 326 /* Fetch the disassembler for a given BFD, if that support is available.  */
 327 extern disassembler_ftype disassembler  PARAMS ((bfd *));
 328 #endif
 329
 330 \f
 331 /* This block of definitions is for particular callers who read instructions
 332    into a buffer before calling the instruction decoder.  */
 333
 334 /* Here is a function which callers may wish to use for read_memory_func.
 335    It gets bytes from a buffer.  */
 336 extern int buffer_read_memory
 337   PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
 338
 339 /* This function goes with buffer_read_memory.
 340    It prints a message using info->fprintf_func and info->stream.  */
 341 extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
 342
 343
 344 /* Just print the address in hex.  This is included for completeness even
 345    though both GDB and objdump provide their own (to print symbolic
 346    addresses).  */
 347 extern void generic_print_address
 348   PARAMS ((bfd_vma, struct disassemble_info *));
 349
 350 /* Always true.  */
 351 extern int generic_symbol_at_address
 352   PARAMS ((bfd_vma, struct disassemble_info *));
 353
 354 /* Macro to initialize a disassemble_info struct.  This should be called
 355    by all applications creating such a struct.  */
 356 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
 357   (INFO).flavour = bfd_target_unknown_flavour, \
 358   (INFO).arch = bfd_arch_unknown, \
 359   (INFO).mach = 0, \
 360   (INFO).endian = BFD_ENDIAN_UNKNOWN, \
 361   INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
 362
 363 /* Call this macro to initialize only the internal variables for the
 364    disassembler.  Architecture dependent things such as byte order, or machine
 365    variant are not touched by this macro.  This makes things much easier for
 366    GDB which must initialize these things seperatly.  */
 367
 368 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
 369   (INFO).fprintf_func = (FPRINTF_FUNC), \
 370   (INFO).stream = (STREAM), \
 371   (INFO).symbols = NULL, \
 372   (INFO).num_symbols = 0, \
 373   (INFO).buffer = NULL, \
 374   (INFO).buffer_vma = 0, \
 375   (INFO).buffer_length = 0, \
 376   (INFO).read_memory_func = buffer_read_memory, \
 377   (INFO).memory_error_func = perror_memory, \
 378   (INFO).print_address_func = generic_print_address, \
 379   (INFO).symbol_at_address_func = generic_symbol_at_address, \
 380   (INFO).flags = 0, \
 381   (INFO).bytes_per_line = 0, \
 382   (INFO).bytes_per_chunk = 0, \
 383   (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
 384   (INFO).insn_info_valid = 0
 385
 386 #endif /* ! defined (DIS_ASM_H) */