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1 /* Interface between the opcode library and its callers.
2 Written by Cygnus Support, 1993.
3
4 The opcode library (libopcodes.a) provides instruction decoders for
5 a large variety of instruction sets, callable with an identical
6 interface, for making instruction-processing programs more independent
7 of the instruction set being processed. */
8
9 #ifndef DIS_ASM_H
10 #define DIS_ASM_H
11
12 #include <stdlib.h>
13 #include <stdio.h>
14 #include <string.h>
15 #include <inttypes.h>
16
17 #define PARAMS(x) x
18 typedef void *PTR;
19 typedef uint64_t bfd_vma;
20 typedef int64_t bfd_signed_vma;
21 typedef uint8_t bfd_byte;
22 #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
23
24 #define BFD64
25
26 enum bfd_flavour {
27 bfd_target_unknown_flavour,
28 bfd_target_aout_flavour,
29 bfd_target_coff_flavour,
30 bfd_target_ecoff_flavour,
31 bfd_target_elf_flavour,
32 bfd_target_ieee_flavour,
33 bfd_target_nlm_flavour,
34 bfd_target_oasys_flavour,
35 bfd_target_tekhex_flavour,
36 bfd_target_srec_flavour,
37 bfd_target_ihex_flavour,
38 bfd_target_som_flavour,
39 bfd_target_os9k_flavour,
40 bfd_target_versados_flavour,
41 bfd_target_msdos_flavour,
42 bfd_target_evax_flavour
43 };
44
45 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
46
47 enum bfd_architecture
48 {
49 bfd_arch_unknown, /* File arch not known */
50 bfd_arch_obscure, /* Arch known, not one of these */
51 bfd_arch_m68k, /* Motorola 68xxx */
52 #define bfd_mach_m68000 1
53 #define bfd_mach_m68008 2
54 #define bfd_mach_m68010 3
55 #define bfd_mach_m68020 4
56 #define bfd_mach_m68030 5
57 #define bfd_mach_m68040 6
58 #define bfd_mach_m68060 7
59 #define bfd_mach_cpu32 8
60 #define bfd_mach_mcf5200 9
61 #define bfd_mach_mcf5206e 10
62 #define bfd_mach_mcf5307 11
63 #define bfd_mach_mcf5407 12
64 #define bfd_mach_mcf528x 13
65 #define bfd_mach_mcfv4e 14
66 #define bfd_mach_mcf521x 15
67 #define bfd_mach_mcf5249 16
68 #define bfd_mach_mcf547x 17
69 #define bfd_mach_mcf548x 18
70 bfd_arch_vax, /* DEC Vax */
71 bfd_arch_i960, /* Intel 960 */
72 /* The order of the following is important.
73 lower number indicates a machine type that
74 only accepts a subset of the instructions
75 available to machines with higher numbers.
76 The exception is the "ca", which is
77 incompatible with all other machines except
78 "core". */
79
80 #define bfd_mach_i960_core 1
81 #define bfd_mach_i960_ka_sa 2
82 #define bfd_mach_i960_kb_sb 3
83 #define bfd_mach_i960_mc 4
84 #define bfd_mach_i960_xa 5
85 #define bfd_mach_i960_ca 6
86 #define bfd_mach_i960_jx 7
87 #define bfd_mach_i960_hx 8
88
89 bfd_arch_a29k, /* AMD 29000 */
90 bfd_arch_sparc, /* SPARC */
91 #define bfd_mach_sparc 1
92 /* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
93 #define bfd_mach_sparc_sparclet 2
94 #define bfd_mach_sparc_sparclite 3
95 #define bfd_mach_sparc_v8plus 4
96 #define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
97 #define bfd_mach_sparc_sparclite_le 6
98 #define bfd_mach_sparc_v9 7
99 #define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
100 #define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
101 #define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
102 /* Nonzero if MACH has the v9 instruction set. */
103 #define bfd_mach_sparc_v9_p(mach) \
104 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
105 && (mach) != bfd_mach_sparc_sparclite_le)
106 bfd_arch_mips, /* MIPS Rxxxx */
107 #define bfd_mach_mips3000 3000
108 #define bfd_mach_mips3900 3900
109 #define bfd_mach_mips4000 4000
110 #define bfd_mach_mips4010 4010
111 #define bfd_mach_mips4100 4100
112 #define bfd_mach_mips4300 4300
113 #define bfd_mach_mips4400 4400
114 #define bfd_mach_mips4600 4600
115 #define bfd_mach_mips4650 4650
116 #define bfd_mach_mips5000 5000
117 #define bfd_mach_mips6000 6000
118 #define bfd_mach_mips8000 8000
119 #define bfd_mach_mips10000 10000
120 #define bfd_mach_mips16 16
121 bfd_arch_i386, /* Intel 386 */
122 #define bfd_mach_i386_i386 0
123 #define bfd_mach_i386_i8086 1
124 #define bfd_mach_i386_i386_intel_syntax 2
125 #define bfd_mach_x86_64 3
126 #define bfd_mach_x86_64_intel_syntax 4
127 bfd_arch_we32k, /* AT&T WE32xxx */
128 bfd_arch_tahoe, /* CCI/Harris Tahoe */
129 bfd_arch_i860, /* Intel 860 */
130 bfd_arch_romp, /* IBM ROMP PC/RT */
131 bfd_arch_alliant, /* Alliant */
132 bfd_arch_convex, /* Convex */
133 bfd_arch_m88k, /* Motorola 88xxx */
134 bfd_arch_pyramid, /* Pyramid Technology */
135 bfd_arch_h8300, /* Hitachi H8/300 */
136 #define bfd_mach_h8300 1
137 #define bfd_mach_h8300h 2
138 #define bfd_mach_h8300s 3
139 bfd_arch_powerpc, /* PowerPC */
140 #define bfd_mach_ppc 0
141 #define bfd_mach_ppc64 1
142 #define bfd_mach_ppc_403 403
143 #define bfd_mach_ppc_403gc 4030
144 #define bfd_mach_ppc_505 505
145 #define bfd_mach_ppc_601 601
146 #define bfd_mach_ppc_602 602
147 #define bfd_mach_ppc_603 603
148 #define bfd_mach_ppc_ec603e 6031
149 #define bfd_mach_ppc_604 604
150 #define bfd_mach_ppc_620 620
151 #define bfd_mach_ppc_630 630
152 #define bfd_mach_ppc_750 750
153 #define bfd_mach_ppc_860 860
154 #define bfd_mach_ppc_a35 35
155 #define bfd_mach_ppc_rs64ii 642
156 #define bfd_mach_ppc_rs64iii 643
157 #define bfd_mach_ppc_7400 7400
158 bfd_arch_rs6000, /* IBM RS/6000 */
159 bfd_arch_hppa, /* HP PA RISC */
160 bfd_arch_d10v, /* Mitsubishi D10V */
161 bfd_arch_z8k, /* Zilog Z8000 */
162 #define bfd_mach_z8001 1
163 #define bfd_mach_z8002 2
164 bfd_arch_h8500, /* Hitachi H8/500 */
165 bfd_arch_sh, /* Hitachi SH */
166 #define bfd_mach_sh 1
167 #define bfd_mach_sh2 0x20
168 #define bfd_mach_sh_dsp 0x2d
169 #define bfd_mach_sh2a 0x2a
170 #define bfd_mach_sh2a_nofpu 0x2b
171 #define bfd_mach_sh2e 0x2e
172 #define bfd_mach_sh3 0x30
173 #define bfd_mach_sh3_nommu 0x31
174 #define bfd_mach_sh3_dsp 0x3d
175 #define bfd_mach_sh3e 0x3e
176 #define bfd_mach_sh4 0x40
177 #define bfd_mach_sh4_nofpu 0x41
178 #define bfd_mach_sh4_nommu_nofpu 0x42
179 #define bfd_mach_sh4a 0x4a
180 #define bfd_mach_sh4a_nofpu 0x4b
181 #define bfd_mach_sh4al_dsp 0x4d
182 #define bfd_mach_sh5 0x50
183 bfd_arch_alpha, /* Dec Alpha */
184 bfd_arch_arm, /* Advanced Risc Machines ARM */
185 #define bfd_mach_arm_2 1
186 #define bfd_mach_arm_2a 2
187 #define bfd_mach_arm_3 3
188 #define bfd_mach_arm_3M 4
189 #define bfd_mach_arm_4 5
190 #define bfd_mach_arm_4T 6
191 bfd_arch_ns32k, /* National Semiconductors ns32000 */
192 bfd_arch_w65, /* WDC 65816 */
193 bfd_arch_tic30, /* Texas Instruments TMS320C30 */
194 bfd_arch_v850, /* NEC V850 */
195 #define bfd_mach_v850 0
196 bfd_arch_arc, /* Argonaut RISC Core */
197 #define bfd_mach_arc_base 0
198 bfd_arch_m32r, /* Mitsubishi M32R/D */
199 #define bfd_mach_m32r 0 /* backwards compatibility */
200 bfd_arch_mn10200, /* Matsushita MN10200 */
201 bfd_arch_mn10300, /* Matsushita MN10300 */
202 bfd_arch_last
203 };
204
205 typedef struct symbol_cache_entry
206 {
207 const char *name;
208 union
209 {
210 PTR p;
211 bfd_vma i;
212 } udata;
213 } asymbol;
214
215 typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
216
217 enum dis_insn_type {
218 dis_noninsn, /* Not a valid instruction */
219 dis_nonbranch, /* Not a branch instruction */
220 dis_branch, /* Unconditional branch */
221 dis_condbranch, /* Conditional branch */
222 dis_jsr, /* Jump to subroutine */
223 dis_condjsr, /* Conditional jump to subroutine */
224 dis_dref, /* Data reference instruction */
225 dis_dref2 /* Two data references in instruction */
226 };
227
228 /* This struct is passed into the instruction decoding routine,
229 and is passed back out into each callback. The various fields are used
230 for conveying information from your main routine into your callbacks,
231 for passing information into the instruction decoders (such as the
232 addresses of the callback functions), or for passing information
233 back from the instruction decoders to their callers.
234
235 It must be initialized before it is first passed; this can be done
236 by hand, or using one of the initialization macros below. */
237
238 typedef struct disassemble_info {
239 fprintf_ftype fprintf_func;
240 FILE *stream;
241 PTR application_data;
242
243 /* Target description. We could replace this with a pointer to the bfd,
244 but that would require one. There currently isn't any such requirement
245 so to avoid introducing one we record these explicitly. */
246 /* The bfd_flavour. This can be bfd_target_unknown_flavour. */
247 enum bfd_flavour flavour;
248 /* The bfd_arch value. */
249 enum bfd_architecture arch;
250 /* The bfd_mach value. */
251 unsigned long mach;
252 /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
253 enum bfd_endian endian;
254
255 /* An array of pointers to symbols either at the location being disassembled
256 or at the start of the function being disassembled. The array is sorted
257 so that the first symbol is intended to be the one used. The others are
258 present for any misc. purposes. This is not set reliably, but if it is
259 not NULL, it is correct. */
260 asymbol **symbols;
261 /* Number of symbols in array. */
262 int num_symbols;
263
264 /* For use by the disassembler.
265 The top 16 bits are reserved for public use (and are documented here).
266 The bottom 16 bits are for the internal use of the disassembler. */
267 unsigned long flags;
268 #define INSN_HAS_RELOC 0x80000000
269 PTR private_data;
270
271 /* Function used to get bytes to disassemble. MEMADDR is the
272 address of the stuff to be disassembled, MYADDR is the address to
273 put the bytes in, and LENGTH is the number of bytes to read.
274 INFO is a pointer to this struct.
275 Returns an errno value or 0 for success. */
276 int (*read_memory_func)
277 PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
278 struct disassemble_info *info));
279
280 /* Function which should be called if we get an error that we can't
281 recover from. STATUS is the errno value from read_memory_func and
282 MEMADDR is the address that we were trying to read. INFO is a
283 pointer to this struct. */
284 void (*memory_error_func)
285 PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
286
287 /* Function called to print ADDR. */
288 void (*print_address_func)
289 PARAMS ((bfd_vma addr, struct disassemble_info *info));
290
291 /* Function called to determine if there is a symbol at the given ADDR.
292 If there is, the function returns 1, otherwise it returns 0.
293 This is used by ports which support an overlay manager where
294 the overlay number is held in the top part of an address. In
295 some circumstances we want to include the overlay number in the
296 address, (normally because there is a symbol associated with
297 that address), but sometimes we want to mask out the overlay bits. */
298 int (* symbol_at_address_func)
299 PARAMS ((bfd_vma addr, struct disassemble_info * info));
300
301 /* These are for buffer_read_memory. */
302 bfd_byte *buffer;
303 bfd_vma buffer_vma;
304 int buffer_length;
305
306 /* This variable may be set by the instruction decoder. It suggests
307 the number of bytes objdump should display on a single line. If
308 the instruction decoder sets this, it should always set it to
309 the same value in order to get reasonable looking output. */
310 int bytes_per_line;
311
312 /* the next two variables control the way objdump displays the raw data */
313 /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
314 /* output will look like this:
315 00: 00000000 00000000
316 with the chunks displayed according to "display_endian". */
317 int bytes_per_chunk;
318 enum bfd_endian display_endian;
319
320 /* Results from instruction decoders. Not all decoders yet support
321 this information. This info is set each time an instruction is
322 decoded, and is only valid for the last such instruction.
323
324 To determine whether this decoder supports this information, set
325 insn_info_valid to 0, decode an instruction, then check it. */
326
327 char insn_info_valid; /* Branch info has been set. */
328 char branch_delay_insns; /* How many sequential insn's will run before
329 a branch takes effect. (0 = normal) */
330 char data_size; /* Size of data reference in insn, in bytes */
331 enum dis_insn_type insn_type; /* Type of instruction */
332 bfd_vma target; /* Target address of branch or dref, if known;
333 zero if unknown. */
334 bfd_vma target2; /* Second target address for dref2 */
335
336 /* Command line options specific to the target disassembler. */
337 char * disassembler_options;
338
339 } disassemble_info;
340
341 \f
342 /* Standard disassemblers. Disassemble one instruction at the given
343 target address. Return number of bytes processed. */
344 typedef int (*disassembler_ftype)
345 PARAMS((bfd_vma, disassemble_info *));
346
347 extern int print_insn_big_mips PARAMS ((bfd_vma, disassemble_info*));
348 extern int print_insn_little_mips PARAMS ((bfd_vma, disassemble_info*));
349 extern int print_insn_i386 PARAMS ((bfd_vma, disassemble_info*));
350 extern int print_insn_m68k PARAMS ((bfd_vma, disassemble_info*));
351 extern int print_insn_z8001 PARAMS ((bfd_vma, disassemble_info*));
352 extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*));
353 extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*));
354 extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*));
355 extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*));
356 extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*));
357 extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
358 extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
359 extern int print_insn_arm PARAMS ((bfd_vma, disassemble_info*));
360 extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*));
361 extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*));
362 extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*));
363 extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*));
364 extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*));
365 extern int print_insn_shl PARAMS ((bfd_vma, disassemble_info*));
366 extern int print_insn_hppa PARAMS ((bfd_vma, disassemble_info*));
367 extern int print_insn_m32r PARAMS ((bfd_vma, disassemble_info*));
368 extern int print_insn_m88k PARAMS ((bfd_vma, disassemble_info*));
369 extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
370 extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
371 extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
372 extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*));
373 extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*));
374 extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
375 extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*));
376 extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*));
377 extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
378 extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
379 extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*));
380
381 #if 0
382 /* Fetch the disassembler for a given BFD, if that support is available. */
383 extern disassembler_ftype disassembler PARAMS ((bfd *));
384 #endif
385
386 \f
387 /* This block of definitions is for particular callers who read instructions
388 into a buffer before calling the instruction decoder. */
389
390 /* Here is a function which callers may wish to use for read_memory_func.
391 It gets bytes from a buffer. */
392 extern int buffer_read_memory
393 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
394
395 /* This function goes with buffer_read_memory.
396 It prints a message using info->fprintf_func and info->stream. */
397 extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
398
399
400 /* Just print the address in hex. This is included for completeness even
401 though both GDB and objdump provide their own (to print symbolic
402 addresses). */
403 extern void generic_print_address
404 PARAMS ((bfd_vma, struct disassemble_info *));
405
406 /* Always true. */
407 extern int generic_symbol_at_address
408 PARAMS ((bfd_vma, struct disassemble_info *));
409
410 /* Macro to initialize a disassemble_info struct. This should be called
411 by all applications creating such a struct. */
412 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
413 (INFO).flavour = bfd_target_unknown_flavour, \
414 (INFO).arch = bfd_arch_unknown, \
415 (INFO).mach = 0, \
416 (INFO).endian = BFD_ENDIAN_UNKNOWN, \
417 INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
418
419 /* Call this macro to initialize only the internal variables for the
420 disassembler. Architecture dependent things such as byte order, or machine
421 variant are not touched by this macro. This makes things much easier for
422 GDB which must initialize these things seperatly. */
423
424 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
425 (INFO).fprintf_func = (FPRINTF_FUNC), \
426 (INFO).stream = (STREAM), \
427 (INFO).symbols = NULL, \
428 (INFO).num_symbols = 0, \
429 (INFO).buffer = NULL, \
430 (INFO).buffer_vma = 0, \
431 (INFO).buffer_length = 0, \
432 (INFO).read_memory_func = buffer_read_memory, \
433 (INFO).memory_error_func = perror_memory, \
434 (INFO).print_address_func = generic_print_address, \
435 (INFO).symbol_at_address_func = generic_symbol_at_address, \
436 (INFO).flags = 0, \
437 (INFO).bytes_per_line = 0, \
438 (INFO).bytes_per_chunk = 0, \
439 (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
440 (INFO).disassembler_options = NULL, \
441 (INFO).insn_info_valid = 0
442
443 #define _(x) x
444 #define ATTRIBUTE_UNUSED __attribute__((unused))
445
446 /* from libbfd */
447
448 bfd_vma bfd_getl32 (const bfd_byte *addr);
449 bfd_vma bfd_getb32 (const bfd_byte *addr);
450 bfd_vma bfd_getl16 (const bfd_byte *addr);
451 bfd_vma bfd_getb16 (const bfd_byte *addr);
452 typedef enum bfd_boolean {false, true} boolean;
453 typedef boolean bfd_boolean;
454
455 #endif /* ! defined (DIS_ASM_H) */