drivers/misc/eeprom/at24.c

   1 /*
   2  * at24.c - handle most I2C EEPROMs
   3  *
   4  * Copyright (C) 2005-2007 David Brownell
   5  * Copyright (C) 2008 Wolfram Sang, Pengutronix
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/of_device.h>
  16 #include <linux/slab.h>
  17 #include <linux/delay.h>
  18 #include <linux/mutex.h>
  19 #include <linux/mod_devicetable.h>
  20 #include <linux/log2.h>
  21 #include <linux/bitops.h>
  22 #include <linux/jiffies.h>
  23 #include <linux/property.h>
  24 #include <linux/acpi.h>
  25 #include <linux/i2c.h>
  26 #include <linux/nvmem-provider.h>
  27 #include <linux/platform_data/at24.h>
  28 #include <linux/pm_runtime.h>
  29
  30 /*
  31  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
  32  * Differences between different vendor product lines (like Atmel AT24C or
  33  * MicroChip 24LC, etc) won't much matter for typical read/write access.
  34  * There are also I2C RAM chips, likewise interchangeable. One example
  35  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
  36  *
  37  * However, misconfiguration can lose data. "Set 16-bit memory address"
  38  * to a part with 8-bit addressing will overwrite data. Writing with too
  39  * big a page size also loses data. And it's not safe to assume that the
  40  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
  41  * uses 0x51, for just one example.
  42  *
  43  * Accordingly, explicit board-specific configuration data should be used
  44  * in almost all cases. (One partial exception is an SMBus used to access
  45  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
  46  *
  47  * So this driver uses "new style" I2C driver binding, expecting to be
  48  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
  49  * similar kernel-resident tables; or, configuration data coming from
  50  * a bootloader.
  51  *
  52  * Other than binding model, current differences from "eeprom" driver are
  53  * that this one handles write access and isn't restricted to 24c02 devices.
  54  * It also handles larger devices (32 kbit and up) with two-byte addresses,
  55  * which won't work on pure SMBus systems.
  56  */
  57
  58 struct at24_data {
  59         struct at24_platform_data chip;
  60         int use_smbus;
  61         int use_smbus_write;
  62
  63         ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
  64         ssize_t (*write_func)(struct at24_data *,
  65                               const char *, unsigned int, size_t);
  66
  67         /*
  68          * Lock protects against activities from other Linux tasks,
  69          * but not from changes by other I2C masters.
  70          */
  71         struct mutex lock;
  72
  73         u8 *writebuf;
  74         unsigned write_max;
  75         unsigned num_addresses;
  76
  77         struct nvmem_config nvmem_config;
  78         struct nvmem_device *nvmem;
  79
  80         /*
  81          * Some chips tie up multiple I2C addresses; dummy devices reserve
  82          * them for us, and we'll use them with SMBus calls.
  83          */
  84         struct i2c_client *client[];
  85 };
  86
  87 /*
  88  * This parameter is to help this driver avoid blocking other drivers out
  89  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
  90  * clock, one 256 byte read takes about 1/43 second which is excessive;
  91  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
  92  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
  93  *
  94  * This value is forced to be a power of two so that writes align on pages.
  95  */
  96 static unsigned io_limit = 128;
  97 module_param(io_limit, uint, 0);
  98 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
  99
 100 /*
 101  * Specs often allow 5 msec for a page write, sometimes 20 msec;
 102  * it's important to recover from write timeouts.
 103  */
 104 static unsigned write_timeout = 25;
 105 module_param(write_timeout, uint, 0);
 106 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
 107
 108 #define AT24_SIZE_BYTELEN 5
 109 #define AT24_SIZE_FLAGS 8
 110
 111 #define AT24_BITMASK(x) (BIT(x) - 1)
 112
 113 /* create non-zero magic value for given eeprom parameters */
 114 #define AT24_DEVICE_MAGIC(_len, _flags)                 \
 115         ((1 << AT24_SIZE_FLAGS | (_flags))              \
 116             << AT24_SIZE_BYTELEN | ilog2(_len))
 117
 118 /*
 119  * Both reads and writes fail if the previous write didn't complete yet. This
 120  * macro loops a few times waiting at least long enough for one entire page
 121  * write to work while making sure that at least one iteration is run before
 122  * checking the break condition.
 123  *
 124  * It takes two parameters: a variable in which the future timeout in jiffies
 125  * will be stored and a temporary variable holding the time of the last
 126  * iteration of processing the request. Both should be unsigned integers
 127  * holding at least 32 bits.
 128  */
 129 #define loop_until_timeout(tout, op_time)                               \
 130         for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \
 131              op_time ? time_before(op_time, tout) : true;               \
 132              usleep_range(1000, 1500), op_time = jiffies)
 133
 134 static const struct i2c_device_id at24_ids[] = {
 135         /* needs 8 addresses as A0-A2 are ignored */
 136         { "24c00",      AT24_DEVICE_MAGIC(128 / 8,      AT24_FLAG_TAKE8ADDR) },
 137         /* old variants can't be handled with this generic entry! */
 138         { "24c01",      AT24_DEVICE_MAGIC(1024 / 8,     0) },
 139         { "24cs01",     AT24_DEVICE_MAGIC(16,
 140                                 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
 141         { "24c02",      AT24_DEVICE_MAGIC(2048 / 8,     0) },
 142         { "24cs02",     AT24_DEVICE_MAGIC(16,
 143                                 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
 144         { "24mac402",   AT24_DEVICE_MAGIC(48 / 8,
 145                                 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
 146         { "24mac602",   AT24_DEVICE_MAGIC(64 / 8,
 147                                 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
 148         /* spd is a 24c02 in memory DIMMs */
 149         { "spd",        AT24_DEVICE_MAGIC(2048 / 8,
 150                                 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
 151         { "24c04",      AT24_DEVICE_MAGIC(4096 / 8,     0) },
 152         { "24cs04",     AT24_DEVICE_MAGIC(16,
 153                                 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
 154         /* 24rf08 quirk is handled at i2c-core */
 155         { "24c08",      AT24_DEVICE_MAGIC(8192 / 8,     0) },
 156         { "24cs08",     AT24_DEVICE_MAGIC(16,
 157                                 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
 158         { "24c16",      AT24_DEVICE_MAGIC(16384 / 8,    0) },
 159         { "24cs16",     AT24_DEVICE_MAGIC(16,
 160                                 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
 161         { "24c32",      AT24_DEVICE_MAGIC(32768 / 8,    AT24_FLAG_ADDR16) },
 162         { "24cs32",     AT24_DEVICE_MAGIC(16,
 163                                 AT24_FLAG_ADDR16 |
 164                                 AT24_FLAG_SERIAL |
 165                                 AT24_FLAG_READONLY) },
 166         { "24c64",      AT24_DEVICE_MAGIC(65536 / 8,    AT24_FLAG_ADDR16) },
 167         { "24cs64",     AT24_DEVICE_MAGIC(16,
 168                                 AT24_FLAG_ADDR16 |
 169                                 AT24_FLAG_SERIAL |
 170                                 AT24_FLAG_READONLY) },
 171         { "24c128",     AT24_DEVICE_MAGIC(131072 / 8,   AT24_FLAG_ADDR16) },
 172         { "24c256",     AT24_DEVICE_MAGIC(262144 / 8,   AT24_FLAG_ADDR16) },
 173         { "24c512",     AT24_DEVICE_MAGIC(524288 / 8,   AT24_FLAG_ADDR16) },
 174         { "24c1024",    AT24_DEVICE_MAGIC(1048576 / 8,  AT24_FLAG_ADDR16) },
 175         { "at24", 0 },
 176         { /* END OF LIST */ }
 177 };
 178 MODULE_DEVICE_TABLE(i2c, at24_ids);
 179
 180 static const struct of_device_id at24_of_match[] = {
 181         {
 182                 .compatible = "atmel,24c00",
 183                 .data = (void *)AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR)
 184         },
 185         {
 186                 .compatible = "atmel,24c01",
 187                 .data = (void *)AT24_DEVICE_MAGIC(1024 / 8, 0)
 188         },
 189         {
 190                 .compatible = "atmel,24c02",
 191                 .data = (void *)AT24_DEVICE_MAGIC(2048 / 8, 0)
 192         },
 193         {
 194                 .compatible = "atmel,spd",
 195                 .data = (void *)AT24_DEVICE_MAGIC(2048 / 8,
 196                                 AT24_FLAG_READONLY | AT24_FLAG_IRUGO)
 197         },
 198         {
 199                 .compatible = "atmel,24c04",
 200                 .data = (void *)AT24_DEVICE_MAGIC(4096 / 8, 0)
 201         },
 202         {
 203                 .compatible = "atmel,24c08",
 204                 .data = (void *)AT24_DEVICE_MAGIC(8192 / 8, 0)
 205         },
 206         {
 207                 .compatible = "atmel,24c16",
 208                 .data = (void *)AT24_DEVICE_MAGIC(16384 / 8, 0)
 209         },
 210         {
 211                 .compatible = "atmel,24c32",
 212                 .data = (void *)AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16)
 213         },
 214         {
 215                 .compatible = "atmel,24c64",
 216                 .data = (void *)AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16)
 217         },
 218         {
 219                 .compatible = "atmel,24c128",
 220                 .data = (void *)AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16)
 221         },
 222         {
 223                 .compatible = "atmel,24c256",
 224                 .data = (void *)AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16)
 225         },
 226         {
 227                 .compatible = "atmel,24c512",
 228                 .data = (void *)AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16)
 229         },
 230         {
 231                 .compatible = "atmel,24c1024",
 232                 .data = (void *)AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16)
 233         },
 234         { },
 235 };
 236 MODULE_DEVICE_TABLE(of, at24_of_match);
 237
 238 static const struct acpi_device_id at24_acpi_ids[] = {
 239         { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
 240         { }
 241 };
 242 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
 243
 244 /*-------------------------------------------------------------------------*/
 245
 246 /*
 247  * This routine supports chips which consume multiple I2C addresses. It
 248  * computes the addressing information to be used for a given r/w request.
 249  * Assumes that sanity checks for offset happened at sysfs-layer.
 250  *
 251  * Slave address and byte offset derive from the offset. Always
 252  * set the byte address; on a multi-master board, another master
 253  * may have changed the chip's "current" address pointer.
 254  *
 255  * REVISIT some multi-address chips don't rollover page reads to
 256  * the next slave address, so we may need to truncate the count.
 257  * Those chips might need another quirk flag.
 258  *
 259  * If the real hardware used four adjacent 24c02 chips and that
 260  * were misconfigured as one 24c08, that would be a similar effect:
 261  * one "eeprom" file not four, but larger reads would fail when
 262  * they crossed certain pages.
 263  */
 264 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
 265                                                 unsigned int *offset)
 266 {
 267         unsigned i;
 268
 269         if (at24->chip.flags & AT24_FLAG_ADDR16) {
 270                 i = *offset >> 16;
 271                 *offset &= 0xffff;
 272         } else {
 273                 i = *offset >> 8;
 274                 *offset &= 0xff;
 275         }
 276
 277         return at24->client[i];
 278 }
 279
 280 static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
 281                                       unsigned int offset, size_t count)
 282 {
 283         unsigned long timeout, read_time;
 284         struct i2c_client *client;
 285         int status;
 286
 287         client = at24_translate_offset(at24, &offset);
 288
 289         if (count > io_limit)
 290                 count = io_limit;
 291
 292         /* Smaller eeproms can work given some SMBus extension calls */
 293         if (count > I2C_SMBUS_BLOCK_MAX)
 294                 count = I2C_SMBUS_BLOCK_MAX;
 295
 296         loop_until_timeout(timeout, read_time) {
 297                 status = i2c_smbus_read_i2c_block_data_or_emulated(client,
 298                                                                    offset,
 299                                                                    count, buf);
 300
 301                 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
 302                                 count, offset, status, jiffies);
 303
 304                 if (status == count)
 305                         return count;
 306         }
 307
 308         return -ETIMEDOUT;
 309 }
 310
 311 static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
 312                                     unsigned int offset, size_t count)
 313 {
 314         unsigned long timeout, read_time;
 315         struct i2c_client *client;
 316         struct i2c_msg msg[2];
 317         int status, i;
 318         u8 msgbuf[2];
 319
 320         memset(msg, 0, sizeof(msg));
 321         client = at24_translate_offset(at24, &offset);
 322
 323         if (count > io_limit)
 324                 count = io_limit;
 325
 326         /*
 327          * When we have a better choice than SMBus calls, use a combined I2C
 328          * message. Write address; then read up to io_limit data bytes. Note
 329          * that read page rollover helps us here (unlike writes). msgbuf is
 330          * u8 and will cast to our needs.
 331          */
 332         i = 0;
 333         if (at24->chip.flags & AT24_FLAG_ADDR16)
 334                 msgbuf[i++] = offset >> 8;
 335         msgbuf[i++] = offset;
 336
 337         msg[0].addr = client->addr;
 338         msg[0].buf = msgbuf;
 339         msg[0].len = i;
 340
 341         msg[1].addr = client->addr;
 342         msg[1].flags = I2C_M_RD;
 343         msg[1].buf = buf;
 344         msg[1].len = count;
 345
 346         loop_until_timeout(timeout, read_time) {
 347                 status = i2c_transfer(client->adapter, msg, 2);
 348                 if (status == 2)
 349                         status = count;
 350
 351                 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
 352                                 count, offset, status, jiffies);
 353
 354                 if (status == count)
 355                         return count;
 356         }
 357
 358         return -ETIMEDOUT;
 359 }
 360
 361 static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
 362                                        unsigned int offset, size_t count)
 363 {
 364         unsigned long timeout, read_time;
 365         struct i2c_client *client;
 366         struct i2c_msg msg[2];
 367         u8 addrbuf[2];
 368         int status;
 369
 370         client = at24_translate_offset(at24, &offset);
 371
 372         memset(msg, 0, sizeof(msg));
 373         msg[0].addr = client->addr;
 374         msg[0].buf = addrbuf;
 375
 376         /*
 377          * The address pointer of the device is shared between the regular
 378          * EEPROM array and the serial number block. The dummy write (part of
 379          * the sequential read protocol) ensures the address pointer is reset
 380          * to the desired position.
 381          */
 382         if (at24->chip.flags & AT24_FLAG_ADDR16) {
 383                 /*
 384                  * For 16 bit address pointers, the word address must contain
 385                  * a '10' sequence in bits 11 and 10 regardless of the
 386                  * intended position of the address pointer.
 387                  */
 388                 addrbuf[0] = 0x08;
 389                 addrbuf[1] = offset;
 390                 msg[0].len = 2;
 391         } else {
 392                 /*
 393                  * Otherwise the word address must begin with a '10' sequence,
 394                  * regardless of the intended address.
 395                  */
 396                 addrbuf[0] = 0x80 + offset;
 397                 msg[0].len = 1;
 398         }
 399
 400         msg[1].addr = client->addr;
 401         msg[1].flags = I2C_M_RD;
 402         msg[1].buf = buf;
 403         msg[1].len = count;
 404
 405         loop_until_timeout(timeout, read_time) {
 406                 status = i2c_transfer(client->adapter, msg, 2);
 407                 if (status == 2)
 408                         return count;
 409         }
 410
 411         return -ETIMEDOUT;
 412 }
 413
 414 static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
 415                                     unsigned int offset, size_t count)
 416 {
 417         unsigned long timeout, read_time;
 418         struct i2c_client *client;
 419         struct i2c_msg msg[2];
 420         u8 addrbuf[2];
 421         int status;
 422
 423         client = at24_translate_offset(at24, &offset);
 424
 425         memset(msg, 0, sizeof(msg));
 426         msg[0].addr = client->addr;
 427         msg[0].buf = addrbuf;
 428         /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
 429         addrbuf[0] = 0xa0 - at24->chip.byte_len + offset;
 430         msg[0].len = 1;
 431         msg[1].addr = client->addr;
 432         msg[1].flags = I2C_M_RD;
 433         msg[1].buf = buf;
 434         msg[1].len = count;
 435
 436         loop_until_timeout(timeout, read_time) {
 437                 status = i2c_transfer(client->adapter, msg, 2);
 438                 if (status == 2)
 439                         return count;
 440         }
 441
 442         return -ETIMEDOUT;
 443 }
 444
 445 /*
 446  * Note that if the hardware write-protect pin is pulled high, the whole
 447  * chip is normally write protected. But there are plenty of product
 448  * variants here, including OTP fuses and partial chip protect.
 449  *
 450  * We only use page mode writes; the alternative is sloooow. These routines
 451  * write at most one page.
 452  */
 453
 454 static size_t at24_adjust_write_count(struct at24_data *at24,
 455                                       unsigned int offset, size_t count)
 456 {
 457         unsigned next_page;
 458
 459         /* write_max is at most a page */
 460         if (count > at24->write_max)
 461                 count = at24->write_max;
 462
 463         /* Never roll over backwards, to the start of this page */
 464         next_page = roundup(offset + 1, at24->chip.page_size);
 465         if (offset + count > next_page)
 466                 count = next_page - offset;
 467
 468         return count;
 469 }
 470
 471 static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
 472                                              const char *buf,
 473                                              unsigned int offset, size_t count)
 474 {
 475         unsigned long timeout, write_time;
 476         struct i2c_client *client;
 477         ssize_t status = 0;
 478
 479         client = at24_translate_offset(at24, &offset);
 480         count = at24_adjust_write_count(at24, offset, count);
 481
 482         loop_until_timeout(timeout, write_time) {
 483                 status = i2c_smbus_write_i2c_block_data(client,
 484                                                         offset, count, buf);
 485                 if (status == 0)
 486                         status = count;
 487
 488                 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
 489                                 count, offset, status, jiffies);
 490
 491                 if (status == count)
 492                         return count;
 493         }
 494
 495         return -ETIMEDOUT;
 496 }
 497
 498 static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
 499                                             const char *buf,
 500                                             unsigned int offset, size_t count)
 501 {
 502         unsigned long timeout, write_time;
 503         struct i2c_client *client;
 504         ssize_t status = 0;
 505
 506         client = at24_translate_offset(at24, &offset);
 507
 508         loop_until_timeout(timeout, write_time) {
 509                 status = i2c_smbus_write_byte_data(client, offset, buf[0]);
 510                 if (status == 0)
 511                         status = count;
 512
 513                 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
 514                                 count, offset, status, jiffies);
 515
 516                 if (status == count)
 517                         return count;
 518         }
 519
 520         return -ETIMEDOUT;
 521 }
 522
 523 static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
 524                                      unsigned int offset, size_t count)
 525 {
 526         unsigned long timeout, write_time;
 527         struct i2c_client *client;
 528         struct i2c_msg msg;
 529         ssize_t status = 0;
 530         int i = 0;
 531
 532         client = at24_translate_offset(at24, &offset);
 533         count = at24_adjust_write_count(at24, offset, count);
 534
 535         msg.addr = client->addr;
 536         msg.flags = 0;
 537
 538         /* msg.buf is u8 and casts will mask the values */
 539         msg.buf = at24->writebuf;
 540         if (at24->chip.flags & AT24_FLAG_ADDR16)
 541                 msg.buf[i++] = offset >> 8;
 542
 543         msg.buf[i++] = offset;
 544         memcpy(&msg.buf[i], buf, count);
 545         msg.len = i + count;
 546
 547         loop_until_timeout(timeout, write_time) {
 548                 status = i2c_transfer(client->adapter, &msg, 1);
 549                 if (status == 1)
 550                         status = count;
 551
 552                 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
 553                                 count, offset, status, jiffies);
 554
 555                 if (status == count)
 556                         return count;
 557         }
 558
 559         return -ETIMEDOUT;
 560 }
 561
 562 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
 563 {
 564         struct at24_data *at24 = priv;
 565         struct device *dev = &at24->client[0]->dev;
 566         char *buf = val;
 567         int ret;
 568
 569         if (unlikely(!count))
 570                 return count;
 571
 572         if (off + count > at24->chip.byte_len)
 573                 return -EINVAL;
 574
 575         ret = pm_runtime_get_sync(dev);
 576         if (ret < 0) {
 577                 pm_runtime_put_noidle(dev);
 578                 return ret;
 579         }
 580
 581         /*
 582          * Read data from chip, protecting against concurrent updates
 583          * from this host, but not from other I2C masters.
 584          */
 585         mutex_lock(&at24->lock);
 586
 587         while (count) {
 588                 int     status;
 589
 590                 status = at24->read_func(at24, buf, off, count);
 591                 if (status < 0) {
 592                         mutex_unlock(&at24->lock);
 593                         pm_runtime_put(dev);
 594                         return status;
 595                 }
 596                 buf += status;
 597                 off += status;
 598                 count -= status;
 599         }
 600
 601         mutex_unlock(&at24->lock);
 602
 603         pm_runtime_put(dev);
 604
 605         return 0;
 606 }
 607
 608 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
 609 {
 610         struct at24_data *at24 = priv;
 611         struct device *dev = &at24->client[0]->dev;
 612         char *buf = val;
 613         int ret;
 614
 615         if (unlikely(!count))
 616                 return -EINVAL;
 617
 618         if (off + count > at24->chip.byte_len)
 619                 return -EINVAL;
 620
 621         ret = pm_runtime_get_sync(dev);
 622         if (ret < 0) {
 623                 pm_runtime_put_noidle(dev);
 624                 return ret;
 625         }
 626
 627         /*
 628          * Write data to chip, protecting against concurrent updates
 629          * from this host, but not from other I2C masters.
 630          */
 631         mutex_lock(&at24->lock);
 632
 633         while (count) {
 634                 int status;
 635
 636                 status = at24->write_func(at24, buf, off, count);
 637                 if (status < 0) {
 638                         mutex_unlock(&at24->lock);
 639                         pm_runtime_put(dev);
 640                         return status;
 641                 }
 642                 buf += status;
 643                 off += status;
 644                 count -= status;
 645         }
 646
 647         mutex_unlock(&at24->lock);
 648
 649         pm_runtime_put(dev);
 650
 651         return 0;
 652 }
 653
 654 static void at24_get_pdata(struct device *dev, struct at24_platform_data *chip)
 655 {
 656         int err;
 657         u32 val;
 658
 659         if (device_property_present(dev, "read-only"))
 660                 chip->flags |= AT24_FLAG_READONLY;
 661
 662         err = device_property_read_u32(dev, "size", &val);
 663         if (!err)
 664                 chip->byte_len = val;
 665
 666         err = device_property_read_u32(dev, "pagesize", &val);
 667         if (!err) {
 668                 chip->page_size = val;
 669         } else {
 670                 /*
 671                  * This is slow, but we can't know all eeproms, so we better
 672                  * play safe. Specifying custom eeprom-types via platform_data
 673                  * is recommended anyhow.
 674                  */
 675                 chip->page_size = 1;
 676         }
 677 }
 678
 679 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
 680 {
 681         struct at24_platform_data chip;
 682         kernel_ulong_t magic = 0;
 683         bool writable;
 684         int use_smbus = 0;
 685         int use_smbus_write = 0;
 686         struct at24_data *at24;
 687         int err;
 688         unsigned i, num_addresses;
 689         u8 test_byte;
 690
 691         if (client->dev.platform_data) {
 692                 chip = *(struct at24_platform_data *)client->dev.platform_data;
 693         } else {
 694                 /*
 695                  * The I2C core allows OF nodes compatibles to match against the
 696                  * I2C device ID table as a fallback, so check not only if an OF
 697                  * node is present but also if it matches an OF device ID entry.
 698                  */
 699                 if (client->dev.of_node &&
 700                     of_match_device(at24_of_match, &client->dev)) {
 701                         magic = (kernel_ulong_t)
 702                                 of_device_get_match_data(&client->dev);
 703                 } else if (id) {
 704                         magic = id->driver_data;
 705                 } else {
 706                         const struct acpi_device_id *aid;
 707
 708                         aid = acpi_match_device(at24_acpi_ids, &client->dev);
 709                         if (aid)
 710                                 magic = aid->driver_data;
 711                 }
 712                 if (!magic)
 713                         return -ENODEV;
 714
 715                 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
 716                 magic >>= AT24_SIZE_BYTELEN;
 717                 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
 718
 719                 at24_get_pdata(&client->dev, &chip);
 720
 721                 chip.setup = NULL;
 722                 chip.context = NULL;
 723         }
 724
 725         if (!is_power_of_2(chip.byte_len))
 726                 dev_warn(&client->dev,
 727                         "byte_len looks suspicious (no power of 2)!\n");
 728         if (!chip.page_size) {
 729                 dev_err(&client->dev, "page_size must not be 0!\n");
 730                 return -EINVAL;
 731         }
 732         if (!is_power_of_2(chip.page_size))
 733                 dev_warn(&client->dev,
 734                         "page_size looks suspicious (no power of 2)!\n");
 735
 736         /*
 737          * REVISIT: the size of the EUI-48 byte array is 6 in at24mac402, while
 738          * the call to ilog2() in AT24_DEVICE_MAGIC() rounds it down to 4.
 739          *
 740          * Eventually we'll get rid of the magic values altoghether in favor of
 741          * real structs, but for now just manually set the right size.
 742          */
 743         if (chip.flags & AT24_FLAG_MAC && chip.byte_len == 4)
 744                 chip.byte_len = 6;
 745
 746         /* Use I2C operations unless we're stuck with SMBus extensions. */
 747         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
 748                 if (chip.flags & AT24_FLAG_ADDR16)
 749                         return -EPFNOSUPPORT;
 750
 751                 if (i2c_check_functionality(client->adapter,
 752                                 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
 753                         use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
 754                 } else if (i2c_check_functionality(client->adapter,
 755                                 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
 756                         use_smbus = I2C_SMBUS_WORD_DATA;
 757                 } else if (i2c_check_functionality(client->adapter,
 758                                 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
 759                         use_smbus = I2C_SMBUS_BYTE_DATA;
 760                 } else {
 761                         return -EPFNOSUPPORT;
 762                 }
 763
 764                 if (i2c_check_functionality(client->adapter,
 765                                 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
 766                         use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
 767                 } else if (i2c_check_functionality(client->adapter,
 768                                 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
 769                         use_smbus_write = I2C_SMBUS_BYTE_DATA;
 770                         chip.page_size = 1;
 771                 }
 772         }
 773
 774         if (chip.flags & AT24_FLAG_TAKE8ADDR)
 775                 num_addresses = 8;
 776         else
 777                 num_addresses = DIV_ROUND_UP(chip.byte_len,
 778                         (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
 779
 780         at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
 781                 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
 782         if (!at24)
 783                 return -ENOMEM;
 784
 785         mutex_init(&at24->lock);
 786         at24->use_smbus = use_smbus;
 787         at24->use_smbus_write = use_smbus_write;
 788         at24->chip = chip;
 789         at24->num_addresses = num_addresses;
 790
 791         if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
 792                 dev_err(&client->dev,
 793                         "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
 794                 return -EINVAL;
 795         }
 796
 797         if (chip.flags & AT24_FLAG_SERIAL) {
 798                 at24->read_func = at24_eeprom_read_serial;
 799         } else if (chip.flags & AT24_FLAG_MAC) {
 800                 at24->read_func = at24_eeprom_read_mac;
 801         } else {
 802                 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
 803                                                   : at24_eeprom_read_i2c;
 804         }
 805
 806         if (at24->use_smbus) {
 807                 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
 808                         at24->write_func = at24_eeprom_write_smbus_block;
 809                 else
 810                         at24->write_func = at24_eeprom_write_smbus_byte;
 811         } else {
 812                 at24->write_func = at24_eeprom_write_i2c;
 813         }
 814
 815         writable = !(chip.flags & AT24_FLAG_READONLY);
 816         if (writable) {
 817                 if (!use_smbus || use_smbus_write) {
 818
 819                         unsigned write_max = chip.page_size;
 820
 821                         if (write_max > io_limit)
 822                                 write_max = io_limit;
 823                         if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
 824                                 write_max = I2C_SMBUS_BLOCK_MAX;
 825                         at24->write_max = write_max;
 826
 827                         /* buffer (data + address at the beginning) */
 828                         at24->writebuf = devm_kzalloc(&client->dev,
 829                                 write_max + 2, GFP_KERNEL);
 830                         if (!at24->writebuf)
 831                                 return -ENOMEM;
 832                 } else {
 833                         dev_warn(&client->dev,
 834                                 "cannot write due to controller restrictions.");
 835                 }
 836         }
 837
 838         at24->client[0] = client;
 839
 840         /* use dummy devices for multiple-address chips */
 841         for (i = 1; i < num_addresses; i++) {
 842                 at24->client[i] = i2c_new_dummy(client->adapter,
 843                                         client->addr + i);
 844                 if (!at24->client[i]) {
 845                         dev_err(&client->dev, "address 0x%02x unavailable\n",
 846                                         client->addr + i);
 847                         err = -EADDRINUSE;
 848                         goto err_clients;
 849                 }
 850         }
 851
 852         i2c_set_clientdata(client, at24);
 853
 854         /* enable runtime pm */
 855         pm_runtime_set_active(&client->dev);
 856         pm_runtime_enable(&client->dev);
 857
 858         /*
 859          * Perform a one-byte test read to verify that the
 860          * chip is functional.
 861          */
 862         err = at24_read(at24, 0, &test_byte, 1);
 863         pm_runtime_idle(&client->dev);
 864         if (err) {
 865                 err = -ENODEV;
 866                 goto err_clients;
 867         }
 868
 869         at24->nvmem_config.name = dev_name(&client->dev);
 870         at24->nvmem_config.dev = &client->dev;
 871         at24->nvmem_config.read_only = !writable;
 872         at24->nvmem_config.root_only = true;
 873         at24->nvmem_config.owner = THIS_MODULE;
 874         at24->nvmem_config.compat = true;
 875         at24->nvmem_config.base_dev = &client->dev;
 876         at24->nvmem_config.reg_read = at24_read;
 877         at24->nvmem_config.reg_write = at24_write;
 878         at24->nvmem_config.priv = at24;
 879         at24->nvmem_config.stride = 1;
 880         at24->nvmem_config.word_size = 1;
 881         at24->nvmem_config.size = chip.byte_len;
 882
 883         at24->nvmem = nvmem_register(&at24->nvmem_config);
 884
 885         if (IS_ERR(at24->nvmem)) {
 886                 err = PTR_ERR(at24->nvmem);
 887                 goto err_clients;
 888         }
 889
 890         dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
 891                 chip.byte_len, client->name,
 892                 writable ? "writable" : "read-only", at24->write_max);
 893         if (use_smbus == I2C_SMBUS_WORD_DATA ||
 894             use_smbus == I2C_SMBUS_BYTE_DATA) {
 895                 dev_notice(&client->dev, "Falling back to %s reads, "
 896                            "performance will suffer\n", use_smbus ==
 897                            I2C_SMBUS_WORD_DATA ? "word" : "byte");
 898         }
 899
 900         /* export data to kernel code */
 901         if (chip.setup)
 902                 chip.setup(at24->nvmem, chip.context);
 903
 904         return 0;
 905
 906 err_clients:
 907         for (i = 1; i < num_addresses; i++)
 908                 if (at24->client[i])
 909                         i2c_unregister_device(at24->client[i]);
 910
 911         pm_runtime_disable(&client->dev);
 912
 913         return err;
 914 }
 915
 916 static int at24_remove(struct i2c_client *client)
 917 {
 918         struct at24_data *at24;
 919         int i;
 920
 921         at24 = i2c_get_clientdata(client);
 922
 923         nvmem_unregister(at24->nvmem);
 924
 925         for (i = 1; i < at24->num_addresses; i++)
 926                 i2c_unregister_device(at24->client[i]);
 927
 928         pm_runtime_disable(&client->dev);
 929         pm_runtime_set_suspended(&client->dev);
 930
 931         return 0;
 932 }
 933
 934 /*-------------------------------------------------------------------------*/
 935
 936 static struct i2c_driver at24_driver = {
 937         .driver = {
 938                 .name = "at24",
 939                 .of_match_table = at24_of_match,
 940                 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
 941         },
 942         .probe = at24_probe,
 943         .remove = at24_remove,
 944         .id_table = at24_ids,
 945 };
 946
 947 static int __init at24_init(void)
 948 {
 949         if (!io_limit) {
 950                 pr_err("at24: io_limit must not be 0!\n");
 951                 return -EINVAL;
 952         }
 953
 954         io_limit = rounddown_pow_of_two(io_limit);
 955         return i2c_add_driver(&at24_driver);
 956 }
 957 module_init(at24_init);
 958
 959 static void __exit at24_exit(void)
 960 {
 961         i2c_del_driver(&at24_driver);
 962 }
 963 module_exit(at24_exit);
 964
 965 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
 966 MODULE_AUTHOR("David Brownell and Wolfram Sang");
 967 MODULE_LICENSE("GPL");